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Efficient Data Transfer Protocols for Big Data
Efficient Data Transfer Protocols for Big Data

ADM1067 数据手册DataSheet 下载
ADM1067 数据手册DataSheet 下载

... GENERAL DESCRIPTION The ADM1067 Super Sequencer® is a configurable supervisory/ sequencing device that offers a single-chip solution for supply monitoring and sequencing in multiple supply systems. In addition to these functions, the ADM1067 integrates six 8-bit voltage output DACs. These circuits c ...
a LC MOS 4-Channel, 12-Bit Simultaneous Sampling Data Acquisition System
a LC MOS 4-Channel, 12-Bit Simultaneous Sampling Data Acquisition System

... circuits is small and, more importantly, is well matched across the four track/holds on one device and also well matched from device to device. This allows the relative phase information between different input channels to be accurately preserved. It also allows multiple AD7874s to sample more than ...
TSC-50/IC
TSC-50/IC

... Serial communication mode will be established if a serial command is received appropriately from the host computer. USB communication mode will be established once USB configuration with the host computer is completed. *Note The two types of the communication methods, serial and ...
AD7938-6 数据手册DataSheet下载
AD7938-6 数据手册DataSheet下载

... with either single-ended, fully differential, or pseudo differential analog inputs. The conversion process and data acquisition are controlled using standard control inputs that allow easy interfacing with microprocessors and DSPs. The input signal is sampled on the falling edge of CONVST and the co ...
12-Bit DAC with EEPROM Memory in SOT-23-6
12-Bit DAC with EEPROM Memory in SOT-23-6

... Differential nonlinearity error (Figure 4-2) is the measure of step size between codes in actual transfer function. The ideal step size between codes is 1 LSB. A DNL error of zero would imply that every code is exactly 1 LSB wide. If the DNL error is less than 1 LSB, the DAC guarantees monotonic out ...
IS62/65WV20488FALL/FBLL - Integrated Silicon Solution
IS62/65WV20488FALL/FBLL - Integrated Silicon Solution

... TTL compatible interface levels ...
AD1974 数据手册DataSheet下载
AD1974 数据手册DataSheet下载

... The clock should be stable before it is enabled. Unless a standalone mode is selected (see the Serial Control Port section), the clock is disabled by reset and must be enabled by writing to the SPI or I2C port for normal operation. To maintain the highest performance possible, it is recommended that ...
WAN_Unit_8-SMDS
WAN_Unit_8-SMDS

... The addressing scheme used by the SMDS network is formatted using the same structure as the North American Numbering Plan (NANP) This scheme was chosen to speed the integration of SMDS into the telephone network addressing infrastructure for integration of voice and data operations CPE interface met ...
IDT Press Contact: Dean Solov Public Relations Manager Phone
IDT Press Contact: Dean Solov Public Relations Manager Phone

... (NASDAQ: IDTI) today expanded its RF portfolio with the addition of a new family of digital step attenuators (DSAs) optimized for the demanding requirements of the broadband and CATV markets. The ultra-high-linearity 75-ohm DSAs feature IDT’s industry-first Glitch-FreeTM technology for enhanced perf ...
TCP Congestion Control
TCP Congestion Control

... • encode cipher in sequence number from server to client • Client must reflect it  check integrity; if okay, generate state from ACK – Only requires changes at the server – Not specified in RFC - no specification change needed – See http://cr.yp.to/syncookies.html for details (how to activate in Li ...
Elektronischer Hšrsaal - univ
Elektronischer Hšrsaal - univ

... • encode cipher in sequence number from server to client • Client must reflect it  check integrity; if okay, generate state from ACK – Only requires changes at the server – Not specified in RFC - no specification change needed – See http://cr.yp.to/syncookies.html for details (how to activate in Li ...
DS1856M - Part Number Search
DS1856M - Part Number Search

... The position values of each resistor can be independently programmed. The user can assign a unique value to each resistor for every 2°C increment over the -40°C to +102°C range. Two buffers are provided to convert logic-level inputs into open-drain outputs. Typically, these buffers are used to imple ...
TLC59108F 数据资料 dataSheet 下载
TLC59108F 数据资料 dataSheet 下载

... fixed frequency of 190 Hz and an adjustable frequency between 24 Hz to once every 10.73 seconds with a duty cycle that is adjustable from 0% to 99.6% that is used to either dim or blink all LEDs with the same value. Each LED output can be off, on (no PWM control), set at its individual PWM controlle ...
This document is designed to help North Carolina educators teach...
This document is designed to help North Carolina educators teach...

... This document is a general comparison of the current 2004 Science Standard Course of Study and the new 2009 Science Essential Standards. It provides initial insight into sameness and difference between these two sets of standards. This document is not intended to answer all questions about the nuanc ...
Vodafone Kabel Deutschland pNTP Interface Specification
Vodafone Kabel Deutschland pNTP Interface Specification

AD5243,48 - Analog Devices
AD5243,48 - Analog Devices

... Operating from a 2.7 V to 5.5 V power supply and consuming less than 6 µA allows the AD5243/AD5248 to be used in portable battery-operated applications. For applications that program the AD5243/AD5248 at the factory, Analog Devices, Inc., offers device programming software running on Windows® NT/200 ...
TLV1571 数据资料 dataSheet 下载
TLV1571 数据资料 dataSheet 下载

... The TLV1571/1578 is a 10-bit data acquisition system that combines an 8-channel input multiplexer (MUX), a high-speed 10-bit ADC, and a parallel interface. The device contains two on-chip control registers allowing control of channel selection, software conversion start, and power down via the bidir ...
Slides
Slides

... • Automatic classification, collection of evidence • Detection of anomaly entry points, suggestion of ACLs • Give correct indications also in presence of sudden traffic shifts due to routing changing/network outages • Robustness to occasional loss of NetFlow records • Work well also with sampled Net ...
Network Training 2008-05-25
Network Training 2008-05-25

... this still in use today, because IBM went long on this one. It runs at 4 Mbps. Cat 3, also know as 10baseT and as Ethernet, and ran at 10Mbps. Cat 4, didn’t last long and had very limited installs, as it ran at 17Mbps, and Cat 5 was out about 18 months later. ...
AD7390 数据手册DataSheet 下载
AD7390 数据手册DataSheet 下载

... operating from power supplies in the 2.7 V to 5.5 V range making them ideal for battery operated applications. They contain a voltage-switched, 12-bit/10-bit, laser-trimmed digital-to-analog converter, rail-to-rail output op amps, serial-input register, and a DAC register. The external reference inp ...
DS90LV110T 1 to 10 LVDS Data/Clock Distributor General Description
DS90LV110T 1 to 10 LVDS Data/Clock Distributor General Description

... (Low Voltage Differential Signaling) technology for low power, high speed operation. Data paths are fully differential from input to output for low noise generation and low pulse width distortion. The design allows connection of 1 input to all 10 outputs. LVDS I/O enable high speed data transmission ...
Introduction to Computer Networks
Introduction to Computer Networks

... for a request in round-robin fashion. » The central hub maintains two pointers: a highpriority pointer and a normal-priority pointer. » If at any time there are no pending highpriority requests, the hub will grant any normalpriority requests that it encounters. ...


74VHC161284 IEEE 1284 Transceiver 7 4
74VHC161284 IEEE 1284 Transceiver 7 4

... and eleven control/status buffers to implement a full IEEE 1284 compliant interface. The device supports the IEEE 1284 standard and is intended to be used in Extended Capabilities Port mode (ECP). The pinout allows for easy connection from the Peripheral (A-side) to the Host (cable side). ...
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UniPro protocol stack

In mobile-telephone technology, the UniPro protocol stack follows the architecture of the classical OSI Reference Model. In UniPro, the OSI Physical Layer is split into two sublayers: Layer 1 (the actual physical layer) and Layer 1.5 (the PHY Adapter layer) which abstracts from differences between alternative Layer 1 technologies. The actual physical layer is a separate specification as the various PHY options are reused in other MIPI Alliance specifications.The UniPro specification itself covers Layers 1.5, 2, 3, 4 and the DME (Device Management Entity). The Application Layer (LA) is out of scope because different uses of UniPro will require different LA protocols. The Physical Layer (L1) is covered in separate MIPI specifications in order to allow the PHY to be reused by other (less generic) protocols if needed.OSI Layers 5 (Session) and 6 (Presentation) are, where applicable, counted as part of the Application Layer.
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