Download D to A Converter R2R reduction

Introductory Digital
Electronics
CTEC 103
R2R Reduction
Supplement
Prepared by Mike Crompton (Revised 27 January 2005)
D to A Converter R2R reduction
At right is the diagram of a binary counter
with an R2R network connected to 3 of the
Q O/Ps (Q1 pin 9, Q2 pin 8 and Q3 pin 11
of the chip). This changes the circuit into a
Digital to Analog (D to A) converter. The
resistor values are twice (or ½ ) the size of
each other, hence the name R2R.
The R2R network will produce a voltage at
‘Analog Vout’ that will be dependant on
which Q O/Ps are Hi and which are Lo. This
in turn will depend on the binary count.
When the count is 0002 all 3 Q O/Ps will be
Lo (which is 0V or the same potential as
ground), and the analog Vout will be 0V. If
the count is 0012, then Q1 the LSB (pin 9)
will be Hi or at +5V, and the other two Q
O/Ps will remain at 0V or ground. This will give a voltage at Analog Vout that represents
the value 1 (0012). That voltage will also be equal to the ‘Step’ voltage which can be
calculated as:
VQ O/P / Number of steps
That is, the typical Q O/P voltage (theoretically 5V) divided by the number of steps,
which is calculated as 2N where N is the number of bits (in this case 3 bits, and 23 = 8).
So the Step Voltage should be:
0012 = 5/8 = 0.625V
If the count is 1002 then Q3 (pin 11) will be Hi and the other two Q O/Ps will be at
ground. This means that the 5V is applied to a different point in the R2R network giving
a different analog Vout. This time the voltage should be equal to 4 (1002) or 4 times the
step voltage.
1002 = 4 * 0.625 = 2.5V.
Each time the binary count changes, 5V or 0V will be applied to any 1, 2 or 3 of the Q
O/Ps basically changing the R2R network and therefore changing the Analog Vout.
On the following pages are a series of circuit reductions showing how the R2R network
changes under just 2 of the 8 different combinations of Q O/Ps. The first example, when
Q3 (the MSB) is Hi for a binary count of 1002 , is the most straight forward. The second
example when Q1 (the LSB) is Hi (binary 0012) is a little more involved. Both examples
employ the voltage divider rule, probably the most commonly used rule/formula in
electronics and certainly one that will appear time and time again in the Ceng courses.
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If Q3 O/P is at 5V and
Q1 & 2 are at 0V
(ground) the circuit on
the previous page can
be redrawn as shown
in diagram ‘A’ at
right. Following the
normal series/parallel
rules
for
circuit
reduction, the first
thing to do is to
combine the 6k
parallel R3 & R6 into
one equivalent resistor
of 3k as shown in
diagram ‘B’.
Step 2 is to combine
the series 3k R5 and
3k REQUIV into a new
equivalent resistance
of 6k as depicted in
circuit ‘C’.
Step 3 is the parallel
combination of the
two 6k resistances
(R6 and the new
REQUIV) which give a
third new equivalent
resistance of 3k as
per diagram ‘D’
The last step is to combine the 3k series pair of R4 and the latest REQUIV to give an
equivalent resistance for all of resistors R2 to R6 equal to 6k. Diagram ‘E’.
It is now a simple matter of applying the voltage divider formula to the circuit shown in
the last diagram (‘E’) to calculate the voltage at Analog Vout. In fact, it can immediately
be seen that the voltage is 2.5V. However the voltage divider formula can be applied:
VRX = (VSUPPLY/ RTOTAL) * RX
VREQUIV = 5V/12k * 6k = 2.5V
To cross check if this is correct we use the calculated step voltage of 0.625V per step and
multiply it by the binary count 1002 or 4:
4 * 0.625V = 2.5V
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This second example is a
little more involved as
the voltages at each
junction point have to be
determined in order to
arrive at the Analog
Vout. It presumes that
Q1 is at 5V and Q2 &
Q3 are at ground. The
circuit at right, diagram
‘A’,
depicts
this
situation.
The voltages shown on
diagram ‘A’ cannot be
calculated
until
the
circuit has been reduced
to the two resistances
shown in diagram ‘E’.
The reduction process is
similar to the first
example, step 1 being
R1 and R4 in series,
giving the REQUIV of
9k shown in diagram ‘B’.
The 2nd step is the 9k REQUIV in parallel with the R2 of 6k yielding a new REQUIV of
3.6k, see diagram ‘C’.
Diagram ‘D’ shows the result of combining the 2 series resistors of R5 at 3k and REQUIV
of 3.6k to give the third REQUIV of 6.6k.
The final step, is the parallel pair of R6 at 6k and REQUIV at 6.6k giving the final 2
resistor series circuit of R3 at 6k and REQUIV of R1, 2, 4, 5 &6 at 3.14k, as seen in
diagram ‘E’.
Applying the voltage divider formula to these final 2 resistances will give us a voltage at
their junction, or across REQUIV of:
V REQUIV = (5V/9.14k) * 3.14k = 1.7177V
Looking at diagram ‘A’ again we see that this is the voltage at the top of R5.
We now have to apply the voltage divider formula to the circuit in diagram ‘C’ to get the
voltage at the top of R4 or across REQUIV. Remembering that the VSUPPLY for this
combination is 1.7177v and not 5V:
V REQUIV = (1.7177V/6.6k) * 3.6k = 0.9369V
This voltage becomes the VSUPPLY for the R4, R1 combination and will give us the
Analog Vout (VR1) by once again using the voltage divider formula:
VR1 = 0.9369V/9k * 6k = 0.6246V
This is essentially the calculated value for 0012 (or the step voltage) of 0.625 volts.
Other binary counts will give different circuit configurations and Analog O/P voltages.
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