Download A Modified CMOS Differential-Pair-Based Triangular-and-Trapezoidal-to-Sine Converter Kanitpong Pengwon and Ekachai Leelarasmee

A Modified CMOS Differential-Pair-Based
Triangular-and-Trapezoidal-to-Sine Converter
Kanitpong Pengwon1 and Ekachai Leelarasmee2
Electrical Engineering Department, Chulalongkorn University
459 Phaya-thai Road
Patumwan, Bangkok 10330 Thailand
Email: [email protected], [email protected]
Abstract - To simplify structure of a sinusoidal generator
without serious performance degradation is one of major
challenges in circuit design. An extremely simplified architecture
triangular-and-trapezoidal-to-sine converter is presented. Curve
of output signal, generated by the converter, is also low sensitive
to temperature. Results from HSPICE simulations show that the
approximated signal with a total harmonic content of 0.54 percent
and an SFDR of –46 dBc at 1 kHz is achieved. The SDFR of
output signal is adequate to be used in instrumentation systems.
I.
INTRODUCTION
Sinusoidal-function generators have been used in widely
ranges of applications such as in modern communication
module, instrument and motor control application. For
communication applications, a waveform with -60 dBc of
SFDR or better is acceptable while only -40 dBc one is
required for instrument applications [2]. Many techniques to
realize sinusoidal waveforms have been reported. Most of them,
such as [1], [3] and [6], are based on nonlinear or picewiselinear approximations because it is difficult to directly generate
a sinusoidal waveform.
Fig. 1 shows the general structure of sinusoidal generators
that is divided into two parts. The first part is a signal generator,
which is controlled by other circuits. The generator could
employ triangular and trapezoidal function generators that are
basic building blocks, [5]. The signals are fed to the second
part called a converter. It converts linear signals to sinusoidal
signals using nonlinear approximations. The study adopts this
architecture to realize sinusoidal waveform. This paper reports
the modification of the design of the converter structure, based
on MOS differential pair amplifiers. The purposed circuits are
based on n-well CMOS technology that provide isolated n-well
PMOS transistor, which is useful to eliminate the body effect.
On the specified domain, the first function that is always
lower than the sine function is named the inner function or fI(x).
The second function is always larger than the sine function, so
it is called the outer function or fO(x). These properties of the
two functions are averaged and this average results in the
average function denoted by fA(x). Since it is very close to the
sine function, the error between the average and sine functions
can be observed and shown in Fig. 2 (b).
A triangular-and-trapezoidal-to-sine converter (TTSC) is
employed to generate the average function. The TTSC inputs,
generated by amplifiers whose details are not reported in this
paper, consist of two triangular waveforms (vA and vB), two
trapezoidal waveforms (vM and vN) and constant voltage
reference (VREF). The amplifiers provide four input waveforms,
derived from a triangular waveform denoted by vPH. The
signals are expressed in (2) that shown in Fig. 4.
f I $ x 2 & x2
f O $ x!2 & x "
f A $ ! f I % fO " 2
f S ( x) $ sin(# 2 x)
II. NONLINEAR FUNCTIONS
A set of nonlinear functions, whose domain and range are
{x| 0
x
1}, is used to approximate an ideal sinusoidal
function in the 1st quadrant. These functions are defined in (1)
as shown in Fig. 2 (a).
Control
signal
signal
generator
Converter
Fig. 1. General structure of sinusoidal generators
Fig. 2. (a) Nonlinear functions (b) fS(x) – fA(x)
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(1)
vPH
Amplifiers /
Rectifiers
vM
vN
Triangular-andTrapezodal-to-Sine
Converter
(TTSC)
vA
vB
VREF
vA
vB
IX
IY
Inner
Function
Generator
VREF
THVC
vM
THVC
vN
Fig. 3. Block diagram
IX
IY
Outer
Function
Generator
THVC
Fig. 5. Structure of TTSC
vA $
d AB
vPH % VCM
2VPH & PK
vB $
& d AB
vPH % VCM
2VPH & PK
(2)
)
, d
vM $ min + MN vPH % d MN , d MN (
'
*VPH & PK
)
, d
vN $ min +& MN vPH % d MN , d MN (
V
* PH & PK
'
A. Square Law Based Functions
In order to generate the inner function, vA and vB are fed at
the inputs of a differential pair amplifier, shown in Fig. 6 (a).
According to Razavi [4], given that the second order effects are
neglected, the description of a relation between (vA – vB) and
(iA – iB) using square law model as shown in (3) can be
achieved based on the assumption that two NMOS transistors,
MA and MB, are identical match and in a saturated region.
!i A & iB " $ k AB !v A & vB "
vPH
1
VPH-PK
t
vA
dAB
VCM
vB
t
vM
dMN
t
vN
dMN
(3)
where
k AB $ 1 2 -C ox !W L "AB
(W/L)AB
aspect ratio of MA and MB
When vA is more highly positive enough than vB, it causes
MB to turn off. As a result, MA drains the entire current. In this
condition, (iA – iB) equals to ISS. We define a minimum value of
|vA – vB| that can put the circuit into the condition, as dAB. The
proper value of dAB is expressed in (4).
d AB $ I SS k AB
t
IX - IY
2 I SS
2
& !v A & vB "
k AB
(4)
2ISS
t
Fig. 4. Input and output signals of TTSC
Fig. 5 shows more details of the TTSC block diagram. The
(vA – vB) is a differential signal whose common-mode voltage
denoted by VCM. The vA and vB are fed directly into the inner
function generator, while vM and vN are pre-compensated
before being fed into the outer function generator. Finally,
outputs of the two generators are summed and divided by 2 in
order to achieve the average function. Dividing the summation
by 2 is not necessary because the curve of the final output
(IX – IY), which is two times of the average function, is also
close to a sine function.
From Fig. 4, (vA – vB) equals to dAB when t = 1. Equation (5)
which is a normalized function is derived from (4) and (3)
which is divided by ISS.
!i A & iB " $ t
I SS
iA
MA
iB
P
MB
(5)
2 & t2
iA
vB
ISS
vA
MA
iB
P
MSS
MB
vB
V'REF
III. PRACTICAL DESIGN
There are three kinds of building block circuits used to
construct the TTSC, shown in Fig. 5. The inner function
generator employs a differential pair amplifier. Secondly, the
outer function generator composes of two MOS transistors.
The two MOS transistors can be considered as a very basic
differential amplifier without a current tail. The third circuit is
a threshold-voltage compensated circuit denoted by THVC.
(a)
(b)
Fig. 6. A differential pair amplifier with (a) an ideal current source
(b) an NMOS as bias current
Sweeping (vA – vB) over the proper range of .dAB brings the
achievement of the inner function in (5). Unfortunately, if
temperature increases, kAB will considerably decrease while dAB
remains constant. The output cannot reach ISS while input
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reaches its maximum dAB. This causes a pointed distortion,
shown in Fig 7. On the other hand, when temperature decreases,
kAB considerably increases. The output reaches Iss while the
input is lower than dAB. This causes another kind of distortion,
called clipped distortion [1].
To eliminate temperature dependency, MSS is used as bias
current instead of an ideal current source ISS, shown in Fig. 6
(b). The ratio of MA and MSS aspect-ratio is given by (W/L)AB =
F1(W/L)SS. The override voltage of MSS is V’REF – VTH and VP is
high enough to put MSS in saturated region. Because the value
of VP tracks VCM, the minimum value of VCM should agree with
the expression in (7) in order to ensure that MSS is in saturated
region. Then the proper value of dAB is redefined as (6).
d AB $ (V 'REF &VTH )
!
VCM / 1 % 1
(6)
F1
"
2 F1 !V ' REF &VTH " % VTH
(7)
The right-hand side of (6) remains sensitive to temperature
because VTH also depends on temperature. However, (6) is
more practical than (4) because kAB is more sensitive to
temperature than VTH, reported in [2]. VTH effect can be
compensated with a THVC circuit, shown below.
depends on kSS whose temperature-dependency is very high,
the function’s curve is not changed.
!iA & iB " $ t
2
k SSVREF
(10)
2 & t2
Let’s revisit the expression of the outer function in (1). In
order to achieve the outer function, x(2-x), negative, shift and
mirror operations are requested to perform on a basic square
function, x2. As a result, the outer function generator circuit is
nothing more than two identical match NMOS transistors
whose characteristics obey the square law, shown in Fig. 9 (a).
The gate terminals of two NMOS transistors: MM and MN, are
driven by threshold voltage compensated signals, v’M and v’N.
The effective override voltages are vM and vN, respectively. The
maximum current, created by MM and MN, must equal the
current generated by MSS in the inner function generator. This
gives an expression, shown in (11). And the ratio of MM,N and
MSS aspect-ratio is given by (W/L)MN = F2(W/L)SS. Then the
relation between dNM and VREF is expressed in (12).
2
2
k MN d MN
$ k SSVREF
(11)
IX
Clipped
Inner fn.
iA
t
iM
Pointed
v'M
iN
MM MN
vA
iB
MA
MB
MSS
v'N
IY
vB
V'REF
iM
v'M
iN
MM MN
v'N
Fig. 7. Distortions due to change of kAB
IT
(a)
(b)
Fig. 9 (a) A differential amplifier without a current tail
(b) a combination of the inner and outer function generators
RT
V'REF
d MN $ VREF
VREF
iM & i N $ k MN vM2 & k MN v N2
Figure 8. A threshold voltage compensated circuit
VDD & V 'REF
$
V 'REF &VREF & VTH
1
2
-Cox !W L "T RT
(8)
The expression in (8) is achieved from applying Ohm’s law
and square law to the circuit shown in Fig. 8. Enlarging the
right-hand side of (8) makes V’REF close to VREF + VTH. Then
the value of term (W/L)TRT should be large. Again, the proper
value of dAB is redefined as (9).
d AB $ VREF
F1
F2
(9)
From (9), the proper input range becomes temperature
independent. From (5), by replacing ISS with kSSV2REF, the inner
function becomes (10). Although the function’s amplitude
(12)
(13)
From Fig. 4, on the range 0 t 1, vM is constant and equals
dMN while vN changes with a negative slope, – dMN. Thus, vN
can be written in term of t, shown below.
vN (t ) $ d MN & d MN t
(14)
From (11) and (14), (13) is rearranged to achieve the outer
function, expressed in (15). Like the inner function, amplitude
of the outer function is also proportional to kSS, but its curve is
not. If constant in amplitude is request, the output can be
multiplied by a current which is inverse proportional to
mobility, purposed in [2].
To achieve the final output of TTSC, the outputs of the two
generators are connected to each other, shown in Fig. 9 (b).
IX = iA + iM and IY = iB + iN, then the final output is defined in a
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differential term of (IX – IY), shown in (16). A normalized
function of the averaged function is derived from (10), (15)
and (16) divided by kSSV2REF, shown in (17).
Each PMOS is also located in an isolated n-well to minimize
the body effect.
!iM & iN " $ 1 & !1 & t "2 $ t !2 & t "
(15)
I X & I Y $ !i A & iB " % !iM & i N "
(16)
I X & IY
$ t 2 & t 2 % t (2 & t )
2
k SSVREF
(17)
A 0.18-micron n-well CMOS technology is used to model
the test circuit, implemented with PMOS as shown in Fig. 10,
for HSPICE simulating. Fig. 11 shows output curve in the
temperature range of 0 to 100 3C, and Table I indicates that
output with better than – 40 dBc of SFDR is achieved on the
temperature range of 0 to 75 3C.
k SSV
2
REF
B. Second-Order Effects
All functions derived previously are based on square law
model. Two second-order effects are neglected in the previous
analysis. They are short-channel and body effects. The volume
of short-channel effect can be indicated by 0-parameter. The 0
in a short-channel transistor is larger than in a long-channel
transistor. In order to make the effects less significant, longchannel transistors should be used in the design.
For another effect, the body effect is not significant in the
operation of the differential pair amplifier, although the source
terminals of MA and MB are not connected to VSS. The different
voltage between bulk and source terminals causes an increase
in threshold voltage. If common-mode voltage of differential
input is high enough, the increase in threshold voltage can be
neglected, as shown in (7). The body effect causes significant
effects in operation of MM, MN and MSS. These transistors are
driven by compensated voltages, which are outputs of THVC
circuits. Including the body effect, output voltage of THVC
circuit, shown in Fig. 8, can be expressed in (18).
V 'i $ Vi % VTH 0 % 2
!
"
2I T
21 FB & Vi & 21 FB %
-Cox !W L "T
where VTH0 is threshold voltage without the body effect.
MSS
vA
MA
iA
MM
V'REF
MB
v'M
iM
vB
MN
v'N
(18)
Vi
iN
IV. SIMULATION RESULTS
Fig. 11. Output signals in various temperature conditions
TABLE I
HSPICE SIMULATION RESULTS
Temperature
(3C)
0
25
50
75
100
IX
IY
(a)
SFDR
(dBc)
-43.8
-46.4
-47.2
-40.0
-35.7
20*log(aN/a1)
a3
a5
a7
-44.6
-58.3
-47.2
-40.0
-35.7
-43.8
-46.4
-51.0
-67.2
-53.2
-61.2
-53.5
-49.3
-46.9
-45.3
V. CONCLUSION
The design of CMOS nonlinear circuits for sinusoidal
function approximations and a threshold voltage compensated
circuit reported in this paper. These circuits are noncomplicated CMOS circuits. They are fed by triangular and
trapezoidal waveform in order to convert the input signal to a
sinusoidal waveform. The HSPICE simulations show that the
circuits generate a sinusoidal waveform with total harmonic
content of 0.538 percent and SFDR = – 46.4 dBc at 1 kHz, at
the room temperature 25 3C. The purposed architecture
provides a moderate level of performance which is needed in
some instrumentation systems.
V'i
iB
THD
(%)
0. 878
0. 538
0. 616
1.089
1.729
REFERENCES
IT
RT
[1]
(b)
[2]
Fig. 10. A PMOS version of (a) TTSC (b) THVC
[3]
Errors in compensation are the 3rd and the last term of the
right-hand side in (18). The value of the last term is very small
because (W/L)T is large. The 3rd term is the body effect that can
be completely removed by connecting the bulk terminal to its
own source terminal. The bulk-source connection in NMOS is
not allowed in general CMOS process. PMOS transistors are
employed instead of NMOS transistors, as shown in Fig. 10.
[4]
[5]
[6]
J.W. Fattaruso and R. G. Meyer, “Triangle to sine wave conversion with
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