Download NDS8434 Single P-Channel Enhancement Mode Field Effect Transistor June 1996 Ω

June 1996
NDS8434
Single P-Channel Enhancement Mode Field Effect Transistor
General Description
Features
These P-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary, high cell
density, DMOS technology. This very high density process is
especially tailored to minimize on-state resistance and provide
superior switching performance. These devices are particularly
suited for low voltage applications such as notebook computer
power management and other battery powered circuits where
fast switching, low in-line power loss, and resistance to
transients are needed.
-6.5A, -20V. RDS(ON) = 0.035Ω @ VGS = -4.5V
RDS(ON) = 0.05Ω @ VGS = -2.7V.
High density cell design for extremely low RDS(ON).
High power and current handling capability in a widely used
surface mount package.
___________________________________________________________________________________________
Absolute Maximum Ratings
Symbol
Parameter
VDSS
Drain-Source Voltage
VGSS
Gate-Source Voltage
ID
Drain Current - Continuous
(Note 1a)
6
3
7
2
8
1
Maximum Power Dissipation
NDS8434
Units
-20
V
-8
V
-6.5
A
-20
(Note 1a)
2.5
(Note 1b)
1.2
(Note 1c)
TJ,TSTG
4
T A = 25°C unless otherwise noted
- Pulsed
PD
5
Operating and Storage Temperature Range
W
1
-55 to 150
°C
THERMAL CHARACTERISTICS
RθJA
Thermal Resistance, Junction-to-Ambient
(Note 1a)
50
°C/W
RθJC
Thermal Resistance, Junction-to-Case
(Note 1)
25
°C/W
© 1997 Fairchild Semiconductor Corporation
NDS8434 Rev. A3
Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
-20
Typ
Max
Units
-1
µA
OFF CHARACTERISTICS
BVDSS
Drain-Source Breakdown Voltage
VGS = 0 V, ID = -250 µA
IDSS
Zero Gate Voltage Drain Current
VDS = -16 V, VGS = 0 V
V
TJ = 55oC
-10
µA
IGSSF
Gate - Body Leakage, Forward
VGS = 8 V, VDS = 0 V
100
nA
IGSSR
Gate - Body Leakage, Reverse
VGS = -8 V, VDS= 0 V
-100
nA
V
ON CHARACTERISTICS (Note 2)
VGS(th)
Gate Threshold Voltage
VDS = VGS, ID = -250 µA
TJ = 125oC
RDS(ON)
Static Drain-Source On-Resistance
-0.4
-0.7
-1
-0.3
-0.45
-0.8
0.026
0.035
0.037
0.07
0.036
0.05
VGS = -4.5 V, ID = -6.5 A
TJ = 125oC
VGS = -2.7 V, ID = -5.5 A
ID(on)
On-State Drain Current
gFS
Forward Transconductance
VGS = -4.5 V, VDS = -5 V
-15
VGS = -2.7 V, VDS = -5 V
-10
Ω
A
VDS = -10 V, ID = -6.5 A
18
S
VDS = -10 V, VGS = 0 V,
f = 1.0 MHz
2330
pF
1070
pF
360
pF
DYNAMIC CHARACTERISTICS
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
SWITCHING CHARACTERISTICS (Note 2)
tD(on)
Turn - On Delay Time
tr
Turn - On Rise Time
tD(off)
tf
Qg
Total Gate Charge
Qgs
Gate-Source Charge
Qgd
Gate-Drain Charge
VDD = -6 V, ID = -1 A,
VGEN = -4.5 V, RGEN = 6 Ω
20
40
ns
38
80
ns
Turn - Off Delay Time
169
300
ns
Turn - Off Fall Time
63
120
ns
40
80
nC
VDS = -5 V,
ID = -6.5 A, VGS = -4.5 V
5.3
nC
11
nC
NDS8434 Rev. A3
Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
-2.1
A
-1.2
V
DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS
IS
Maximum Continuous Drain-Source Diode Forward Current
VSD
Drain-Source Diode Forward Voltage
VGS = 0 V, IS = -2.1 A
-0.8
(Note 2)
Notes:
1. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by
design while RθCA is determined by the user's board design.
PD (t ) =
TJ
−TA
R θJ A(t )
=
TJ
−TA
R θJ C+RθCA(t )
= I 2D (t ) × RDS (ON )
TJ
Typical RθJA using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
a. 50oC/W when mounted on a 1 in2 pad of 2oz copper.
b. 105oC/W when mounted on a 0.04 in2 pad of 2oz copper.
c. 125oC/W when mounted on a 0.006 in2 pad of 2oz copper.
1a
1b
1c
Scale 1 : 1 on letter size paper
2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.
NDS8434 Rev. A3
Typical Electrical Characteristics
2.5
I D , DRAIN-SOURCE CURRENT (A)
VGS = -4.5V
-3.0
-20
-2.7
R DS(on) , NORMALIZED
-2.5
-15
-2.0
-10
-5
0
-1.5
0
-0.5
-1
-1.5
-2
V DS , DRAIN-SOURCE VOLTAGE (V)
-2.5
DRAIN-SOURCE ON-RESISTANCE
-25
VGS = -2.0V
2
-2.5
1.5
-3.0
-3.5
-4.5
1
0.5
-3
-2.7
0
1.4
R DS(on) , NORMALIZED
V GS = -4.5V
1.2
1
0.8
-25
0
25
50
75
100
T , JUNCTION TEMPERATURE (°C)
125
DRAIN-SOURCE ON-RESISTANCE
R DS(ON), NORMALIZED
-20
-25
2
I D = -6.5A
0.6
-50
V GS = -4.5V
T J = 125°C
1.5
25°C
1
-55°C
0.5
150
0
-5
J
-10
-15
I D , DRAIN CURRENT (A)
-20
-25
Figure 4. On-Resistance Variation
with Drain Current and Temperature.
Figure 3. On-Resistance Variation
with Temperature.
1.4
V DS = -5.0V
T = -55°C
J
125°C
-20
V th , NORMALIZED
25°C
-15
-10
-5
0
-0.5
-1
-1.5
-2
-2.5
V GS , GATE TO SOURCE VOLTAGE (V)
Figure 5. Transfer Characteristics.
-3
GATE-SOURCE THRESHOLD VOLTAGE
-25
I D , DRAIN CURRENT (A)
-15
Figure 2. On-Resistance Variation
with Drain Current and Gate Voltage.
1.6
0
-10
I D , DRAIN CURRENT (A)
Figure 1. On-Region Characteristics.
DRAIN-SOURCE ON-RESISTANCE
-5
VDS = V GS
I D = -250µA
1.2
1
0.8
0.6
0.4
-50
-25
0
25
50
75
100
TJ , JUNCTION TEMPERATURE (°C)
125
150
Figure 6. Gate Threshold Variation
with Temperature.
NDS8434 Rev. A3
Typical Electrical Characteristics (continued)
25
I D = -250µA
10
-IS , REVERSE DRAIN CURRENT (A)
BV DSS, NORMALIZED
DRAIN-SOURCE BREAKDOWN VOLTAGE
1.08
1.06
1.04
1.02
1
0.98
0.96
0.94
-50
-25
0
25
50
75
100
T J , JUNCTION TEMPERATURE (°C)
125
Figure 7. Breakdown Voltage
Variation with Temperature.
= 0V
T = 125°C
J
-55°C
0.01
0.001
0
0.2
0.4
0.6
0.8
1
-V SD , BODY DIODE FORWARD VOLTAGE (V)
1.2
Figure 8. Body Diode Forward Voltage Variation
with Source Current and
Temperature.
5
I D = -6.5A
4000
-V GS , GATE-SOURCE VOLTAGE (V)
C iss
2000
C oss
1000
800
500
f = 1 MHz
C rss
V GS = 0 V
300
200
0.1
0.2
0.5
1
2
5
10
20
V DS = -5.0V
-10V
3
2
1
0
0
10
40
t on
-VDD
t d(on)
RL
50
t off
tr
t d(off)
tf
90%
90%
V OUT
D
R GEN
20
30
Q g , GATE CHARGE (nC)
Figure 10. Gate Charge Characteristics.
Figure 9. Capacitance Characteristics.
V IN
-15V
4
-V DS , DRAIN TO SOURCE VOLTAGE (V)
VGS
25°C
0.1
5500
CAPACITANCE (pF)
GS
1
0.0001
150
V
VOUT
10%
10%
DUT
G
90%
S
V IN
50%
50%
10%
PULSE W IDTH
Figure 11. Switching Test Circuit.
INVERTED
Figure 12. Switching Waveforms.
NDS8434 Rev. A3
Typical Electrical and Thermal Characteristics (continued)
2.5
STEADY-STATE POWER DISSIPATION (W)
V DS = -5.0V
TJ = -55°C
32
25°C
24
125°C
16
8
g
FS
, TRANSCONDUCTANCE (SIEMENS)
40
0
0
-4
-8
I
D
-12
-16
-20
1b
1c
1
4.5"x5" FR-4 Board
o
TA = 2 5 C
Still Air
0.5
0
0.2
0.4
0.6
0.8
2oz COPPER MOUNTING PAD AREA (in 2 )
50
30
10
1a
6
1b
4.5"x5" FR-4 Board
1c
-I D , DRAIN CURRENT (A)
7
5
S
RD
TA = 2 5 C
VG S = - 4 . 5 V
0.2
0.4
0.6
0.8
2oz COPPER MOUNTING PAD AREA (in 2 )
LIM
10
0
1m us
s
IT
10
10
0m
ms
s
1s
10
0.3
DC
s
V GS = -4.5V
0.1
SINGLE PULSE
R
0.01
0.1
1
N)
1
0.03
Still Air
(O
3
o
0
1
Figure 14. SO-8 Maximum Steady-State Power
Dissipation versus Copper Mounting Pad Area.
8
= See Note 1c
T A = 25°C
θJ A
0.2
0.5
1
2
5
10
- VDS , DRAIN-SOURCE VOLTAGE (V)
20
50
Figure 16. Maximum Safe Operating Area.
Figure 15. Maximum Steady-State Drain
Current versus Copper Mounting Pad
Area.
TRANSIENT THERMAL RESISTANCE
1
r(t), NORMALIZED EFFECTIVE
-I D , STEADY-STATE DRAIN CURRENT (A)
1.5
, DRAIN CURRENT (A)
Figure 13. Transconductance Variation with Drain
Current and Temperature.
4
1a
2
0 .5
D = 0.5
0 .2
0.2
0 .1
0 .0 5
R JA (t) = r(t) * R JA
θ
θ
R JA = See Note 1c
θ
0.1
0.05
P(pk)
0.02
0 .0 2
0.01
0 .0 1
t1
Single Pulse
0 .0 0 5
t2
TJ - T
= P * R JA (t)
θ
Duty Cycle, D = t 1 / t 2
A
0 .0 0 2
0 .0 0 1
0 .0001
0 .001
0 .0 1
0 .1
1
10
100
300
t 1 , TIME (sec)
Figure 17. Transient Thermal Response Curve.
Note:
Thermal characterization performed using the conditions described in note 1c. Transient thermal response will change
depending on the circuit board design.
NDS8434 Rev. A3
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DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT
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be reasonably expected to cause the failure of the life
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failure to perform when properly used in accordance
with instructions for use provided in the labeling, can be
effectiveness.
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PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.