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RF3931D
30W GaN ON SiC POWER AMPLIFIER DIE
Package: Die
Features




Broadband Operation DC4GHz
Advanced GaN HEMT
Technology
Packaged Small Signal
Gain=14dB at 2GHz
48V Typical Packaged
Performance
RF OUT
VD
RF IN
VG
•Output Power 50W at P3dB
•Drain Efficiency 65% at P3dB



Large Signal Models Available
Active Area Periphery:
6.6mm
Chip Dimensions:
0.96mmx1.33mmx0.10mm
Applications






Commercial Wireless
Infrastructure
Cellular and WiMAX
Infrastructure
Civilian and Military Radar
General Purpose Broadband
Amplifiers
Public Mobile Radios
Industrial, Scientific and
Medical
GND
Functional Block Diagram
Product Description
The RF3931D is a 48V, 30W, GaN on SiC high power discrete amplifier die designed for commercial wireless infrastructure, cellular and WiMAX infrastructure, industrial/scientific/medical and
general purpose broadband amplifier applications. Using an advanced high power density Gallium Nitride (GaN) semiconductor process, the RF3931D is able to achieve high efficiency and
flat gain over a broad frequency range in a single amplifier design with proper packaging and
assembly. The RF3931D is an unmatched 0.5m gate, GaN transistor die suitable for many
applications with >46.5dBm saturated power, >63% drain efficiency, and >14dB small signal
gain at 2GHz.
Ordering Information
RF3931D
30W GaN on SiC Power Amplifier Die
Optimum Technology Matching® Applied
GaAs HBT
GaAs MESFET
InGaP HBT
SiGe BiCMOS
Si BiCMOS
SiGe HBT
GaAs pHEMT
Si CMOS
Si BJT
GaN HEMT
RF MEMS
LDMOS
RF MICRO DEVICES®, RFMD®, Optimum Technology Matching®, Enabling Wireless Connectivity™, PowerStar®, POLARIS™ TOTAL RADIO™ and UltimateBlue™ are trademarks of RFMD, LLC. BLUETOOTH is a trademark owned by Bluetooth SIG, Inc., U.S.A. and licensed for use by RFMD. All other trade names, trademarks and registered trademarks are the property of their respective owners. ©2006, RF Micro Devices, Inc.
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1 of 9
RF3931D
Absolute Maximum Ratings
Parameter
Rating
Unit
Drain Voltage (VD)
150
V
Gate Voltage (VG)
-8 to +2
V
Gate Current (IG)
23
mA
Operational Voltage
50
V
-55 to +125
°C
200
°C
Storage Temperature Range
Operating Junction Temperature (TJ)
Human Body Model (based on packaged
device)
Class 1A
MTTF (TJ < 200°C, 95% Confidence Limits)*
3E+06
hours
Thermal Resistance, RTH (junction to case)**
measured at TC = 85°C, DC bias only
3.6
°C/W
Caution! ESD sensitive device.
Exceeding any one or a combination of the Absolute Maximum Rating conditions may
cause permanent damage to the device. Extended application of Absolute Maximum
Rating conditions to the device may reduce device reliability. Specified typical performance or functional operation of the device under Absolute Maximum Rating conditions is not implied.
RoHS status based on EUDirective2002/95/EC (at time of this document revision).
The information in this publication is believed to be accurate and reliable. However, no
responsibility is assumed by RF Micro Devices, Inc. ("RFMD") for its use, nor for any
infringement of patents, or other rights of third parties, resulting from its use. No
license is granted by implication or otherwise under any patent or patent rights of
RFMD. RFMD reserves the right to change component circuitry, recommended application circuitry and specifications at any time without prior notice.
Operation of this device beyond any one of these limits may cause permanent damage. For
reliable continuous operation, the device voltage and current must not exceed the maximum
operating values specified in the table below.
* MTTF - Median Time to Failure for wear-out failure mode (30% IDSS degradation) which is
determined by the technology process reliability. Refer to product qualification report for FIT
(random) failure rate.
** Thermal resistance assumes AuSn die attach on 1.5mm thick CPC carrier similar to
Kyocera A1933. User will need to define this specification in the final application and ensure
bias conditions satisfy the following expression: PDISS < (TJ - TC) / RTH J-C and TC = TCASE to
maintain maximum operating junction temperature and MTTF.
Specification
Min.
Typ.
Max.
Parameter
Unit
Condition
Recommended Operating Conditions
Drain Voltage (VDSQ)
24
Gate Voltage (VGSQ)
-4.5
Drain Bias Current
48
-3.5
-2.5
130
Frequency of Operation
DC
V
V
mA
4000
MHz
Die Capacitance from Packaged
Capacitance Measurements
Package Capacitance Removed During Calibration
CRSS
4
pF
VG= -8V, VD = 0V
CISS
17
pF
VG= -8V, VD = 0V
COSS
12
pF
VG= -8V, VD = 0V
DC Functional Test
IG (on) - Forward Bias Diode Gate Current
IG (off) - Gate Leakage
3
mA
VG =1.1V, VD =0V
0.2
mA
VG =-8V, VD =0V
ID (off) - Drain Leakage
0.2
mA
VG =-8V, VD =0V
ID (off) - 48V Drain Leakage
2.0
mA
VG =-8V, VD =48V
4.0
mA
VG =-8V, VD =150V
-2.5
V
VD=48V, ID =6mA
V
VG = 0V, ID =1.0A
ID (off) - 150V Drain Leakage
VGS (th) - Threshold Voltage
-4.8
VDS (on) - Drain Voltage at high current
-3.4
0.84
RF Typical Performance of Packaged Die
VGS (q)
-3.5
V
Small Signal Gain
20
dB
CW, f=900MHz
Small Signal Gain
14
dB
CW, f=2140MHz
2 of 9
Vd=48V, ID = 130 mA
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RF3931D
Specification
Min.
Typ.
Max.
Parameter
Unit
RF Typical Performance of Packaged Die
(continued)
Condition
[1]
Output Power at P3dB
47
dBm
Output Power at P3dB
46.5
dBm
CW, f=900MHz
CW, f=2140MHz
Drain Efficiency at P3dB
65
%
CW, f=900MHz
Drain Efficiency at P3dB
63
%
CW, f=2140MHz
[1] Test Conditions: CW Operation, VDSQ=48V, IDQ=130mA, T=25ºC, in Standard Tuned Test Circuit
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RF3931D
Typical Performance
Non-internally matched package die in tuned circuit (T=25°C, unless noted)
Efficiency vs. Output Power (f = 2140MHz)
Gain vs. Output Power (f = 2140MHz)
(Pulsed 10% duty cycle, 10uS, Vd = 48V, Idq = 130mA)
(Pulsed 10% duty cycle, 10uS, Vd = 48V, Idq = 130mA)
18
70
17
60
Drain Efficiency (%)
16
14
13
Gain 25C
11
30
20
Gain 85C
12
Eff -40C
40
10
Gain -40C
0
10
30
32
34
36
38
40
42
44
30
46
34
32
36
46
44
(Vd = 48V, Idq = 130mA)
(Pulsed 10% duty cycle, 10uS, Vd = 48V, Idq = 130mA)
0
16
-2
15
IRL 85C
-5
Fixed tuned test circuit
-7
IRL 25C
14
-9
IRL -40C
13
-11
12
-13
11
-15
10
-17
-14
9
-19
-16
8
-18
7
-4
-6
-8
Gain (dB)
IRL, Input Return Loss (dB)
42
40
Small Signal Performance vs. Frequency, Pout = 30dBm
Input Return Loss vs. Output Power (f = 2140MHz)
-10
-12
-20
-23
32
34
36
38
40
42
44
46
-25
2080
2110
2140
Output Power (dBm)
(CW, Vd = 48V, Idq = 130mA)
15
-5
Fixed tuned test circuit
-11
11
-13
10
-15
9
-17
8
-19
7
-21
IRL
6
Drain Efficiency (%)
12
Fixed tuned test circuit
58
Input Return Loss (dB)
-9
56
54
Eff
52
-23
5
2080
60
-7
13
Gain
2200
Drain Efficiency vs. Frequency, Pout = 46dBm
(CW, Vd = 48V, Idq = 130mA)
14
2170
Frequency (MHz)
Gain/IRL vs. Frequency, Pout = 46dBm
-25
2100
2120
2140
2160
Frequency (MHz)
4 of 9
-21
IRL
Gain
6
30
Gain (dB)
38
Output Power (dBm)
Output Power (dBm)
Input Return Loss (dB)
Gain (dB)
15
Eff 85C
Eff 25C
50
2180
2200
50
2080
2100
2120
2140
2160
2180
2200
Frequency (MHz)
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RF3931D
Gain/ Efficiency vs. Pout, f = 2140MHz
Gain/ Efficiency vs. Pout, f = 2140MHz
16
70
14
60
14
60
12
50
12
50
10
40
10
40
8
30
8
30
6
20
6
Gain
20
10
4
Drain Eff
10
0
2
Gain
ain (dB)
Gain
Drain Eff
4
2
29
31
33
35
37
39
41
43
45
47
0
30
Pout, Output Power (dBm)
Drain Efficiency (%)
(Pulsed 10% duty cycle, 10uS, Vd = 48V, Idq = 130mA)
70
Drain Efficiency (%)
Gain (dB)
(CW, Vd = 48V, Idq = 130mA)
16
32
34
36
38
40
42
44
46
P t O
Pout,
Output
PPower (dB
(dBm))
IMD3 vs. Pout
Gain vs. Pout
(2-Tone 1MHz Seperaon, Vd = 48V, Idq varied, fc = 2140MHz)
(2-Tone 1MHz Seperaon, Vd = 48V, Idq varied, fc = 2140MHz)
18
65mA
100mA
130mA
260mA
390mA
-15
-20
-25
17
16
15
Gain (dB)
IMD3, Intermodulaon Distoron (dBc)
-10
-30
14
-35
13
-40
12
-45
11
65mA
100mA
130 A
130mA
260mA
390mA
10
-50
1
10
1
100
10
100
Pout, Output Power (W-PEP)
Pout, Output Power (W-PEP)
IMD vs. Output Power
(Vd = 48V, Idq = 130mA, f1 = 2139.5MHz, f2 = 2140.5MHz)
0
Intermodulaon Distoron (IMD - dBc)
-IMD3
-10
IMD3
-IMD5
IMD5
-IMD7
IMD7
-20
-30
-40
-50
-60
-70
1
1
0
10
100
100
Pout, Output Power (W- PEP)
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RF3931D
Gain/IRL vs. Frequency, Pout = 47dBm
Small Signal Performance vs. Frequency, Pout = 30dBm
(CW, Vd = 48V, Idq = 130mA)
(Vd = 48V, Idq = 130mA)
21
-2
20
-2
-3
19
-3
18
-4
17
-5
18
-4
17
-5
16
-6
15
Gain
-7
IRL
14
13
12
880
890
900
910
0
Fixed tuned test circuit
16
-6
15
Gain
-7
IRL
-8
14
-8
-9
13
-9
-10
12
-10
880
920
890
900
910
920
Frequency (MHz)
Frequency (MHz)
G i / Efficiency
Gain/
Effii
vs. Pout,
P t f = 900MHz
900MH
Drain Efficiency vs. Frequency, Pout = 47dBm
(CW, Vd = 48V, Idq = 130mA)
(CW, Vd = 48V, Idq = 130mA)
70
Fixed tuned test circuit
68
22
70
21
60
20
50
19
66
Gain (dB)
B)
Drain Efficiency (%)
-1
64
40
18
30
17
Eff
16
Drain Eff
15
60
20
Gain
62
10
14
880
890
900
910
Frequency (MHz)
6 of 9
920
Drain Efficiency
ncy (%)
Gain (dB)
19
-1
Input Return Loss (dB)
20
22
Gain (dB)
Fixed tuned test circuit
21
0
Input
ut Return Loss
ss (dB)
22
0
29
31
33
35
37
39
41
43
45
47
Pout, Output Power (dBm)
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RF3931D
Die Drawing
All dimensions in mm
External dimension tolerance due to dicing
process development.
Bond Pad Key
G = Gate
S = Source
D = Drain
Die thickness = 0.101mm
Die backside metal = Au
Bias Instruction for RF3931D Die
ESD Sensitive Material. Please use proper ESD precautions when handling devices die. Die must be mounted with minimal die
attach voids for proper thermal dissipation. This device is a depletion mode HEMT and must have gate voltage applied for
pinched off prior to applying drain voltage.
1. Mount device on carrier or package with minimal die attach voiding and applying proper heat removal techniques.
2. Connect ground to the ground supply terminal, and ensure that both the VG and VD grounds are also connected to this
ground terminal.
3. Apply -8V to VG.
4. Apply 48V to VD.
5. Increase VG until drain current reaches desired bias point.
6. Apply RF input.
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RF3931D
Assembly Notes
Die Storage
• Individual bare die should be held in appropriately sized ESD waffle trays or ESD GEL packs.
• Die should be stored in CDA/N2 cabinets and in a controlled temperature and humidity environment.
Die Handling
• Die should only be picked using an auto or semi-automated pick system and an appropriate pick tool.
• Pick parameters will need to be carefully defined so not to cause damage to either the top or bottom die surface.
• GaN HEMT devices are ESD sensitive materials. Please use proper ESD precautions when handling devices or evaluation boards.
• RFMD does not recommend operating this device with typical drain voltage applied and the gate pinched off in a high
humidity, high temperature environment.
Caution: The use of inappropriate or worn-out ejector needle and improper ejection parameter settings can
cause die backside tool marks or micro-cracks that can eventually lead to die cracking.
Die Attach
There are two commonly applied die attach processes: adhesive die attach and eutectic die attach. Both processes use special equipment and tooling to mount the die.
EUTECTIC ATTACH
•
•
•
•
•
•
•
•
•
80/20 AuSn preform, 0.5 - 1mil thickness, made from virgin melt gold.
Pulsed heat or die scrub attach process using auto / semi-automatic equipment.
Attach process carried out in an inert atmosphere.
Custom die pick collets are required that match the outline of the die and the specific process employed using either
pulsed, fixed heat, or scrub.
Maximum temperature during die attach should be no greater than 320 C and for less than 30 seconds.
Key parameters that need to be considered include: die placement force, die scrub profile and heat profile.
Minimal amount of voiding is desired to ensure maximum heat transfer to the carrier and no voids should be present
under the active area of the die.
Voiding can be measured using X-ray or Acoustic microscopy.
The acceptable level of voiding should be determined using thermal modeling analysis.
ADHESIVE ATTACH
• High thermal silver filled epoxy is dispensed in a controlled manner and die is placed using an appropriate collet.
Assembled parts are cured at temperatures between 150C and 180C.
• Always refer to epoxy manufacturer's data sheet.
• Industry recognized standards for epoxy die attach are clearly defined within MIL-883.
Early Life Screen Conditions
RFMD recommends an Early Life Screen test that subjects this die to TJ =250C (junction temperature) for at least 6 hours
prior to field deployment.
Mounting and Thermal Considerations
The thermal resistance provided as RTH (junction to case) represents only the packaged device thermal characteristics. This is
measured using IR microscopy capturing the device under test temperature at the hottest spot of the die. At the same time, the
package temperature is measured using a thermocouple touching the backside of the die embedded in the device heatsink
but sized to prevent the measurement system from impacting the results. Knowing the dissipated power at the time of the
measurement, the thermal resistance is calculated.
8 of 9
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DS110520
RF3931D
Mounting and Thermal Considerations (continued)
In order to achieve the advertised MTTF, proper heat removal must be considered to maintain the junction at or below the maximum of 200C. Proper thermal design includes consideration of ambient temperature and the thermal resistance from ambient to the back of the package including heatsinking systems and air flow mechanisms. Incorporating the dissipated DC power,
it is possible to calculate the junction temperature of the device.
DC Bias
The GaN HEMT device is a depletion mode high electron mobility transistor (HEMT). At zero volts VGS the drain of the device is
saturated and uncontrolled drain current will destroy the transistor. The gate voltage must be taken to a potential lower than
the source voltage to pinch off the device prior to applying the drain voltage, taking care not to exceed the gate voltage maximum limits. RFMD recommends applying VGS =-5V before applying any VDS.
RF Power transistor performance capabilities are determined by the applied quiescent drain current. This drain current can be
adjusted to trade off power, linearity, and efficiency characteristics of the device. The recommended quiescent drain current
(IDQ) shown in the RF typical performance table is chosen to best represent the operational characteristics for this device, considering manufacturing variations and expected performance. The user may choose alternate conditions for biasing this device
based on performance trade-offs.
GaN HEMT Capacitances
The physical structure of the GaN HEMT results in three terminal capacitors similar to other FET technologies. These capacitances exist across all three terminals of the device. The physical manufactured characteristics of the device determine the
value of the CDS (drain to source), CGS (gate to source) and CGD (gate to drain). These capacitances change value as the terminal voltages are varied. RFMD presents the three terminal capacitances measured with the gate pinched off (VGS =-8V) and
zero volts applied to the drain. During the measurement process, the parasitic capacitances of the package that holds the
amplifier is removed through a calibration step. Any internal matching is included in the terminal capacitance measurements.
The capacitance values presented in the typical characteristics table of the device represent the measured input (CISS), output
(COSS), and reverse (CRSS) capacitance at the stated bias voltages. The relationship to three terminal capacitances is as follows:
CISS =CGD +CGS
COSS = CGD + CDS
CRSS = CGD
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support, contact RFMD at (+1) 336-678-5570 or [email protected].
9 of 9