Download AD827

Survey
yes no Was this document useful for you?
   Thank you for your participation!

* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project

Document related concepts

Power dividers and directional couplers wikipedia , lookup

Oscilloscope wikipedia , lookup

Immunity-aware programming wikipedia , lookup

Superheterodyne receiver wikipedia , lookup

Phase-locked loop wikipedia , lookup

Josephson voltage standard wikipedia , lookup

TRIAC wikipedia , lookup

Standing wave ratio wikipedia , lookup

Oscilloscope history wikipedia , lookup

Multimeter wikipedia , lookup

Index of electronics articles wikipedia , lookup

Ohm's law wikipedia , lookup

Test probe wikipedia , lookup

Integrating ADC wikipedia , lookup

CMOS wikipedia , lookup

Analog-to-digital converter wikipedia , lookup

HD-MAC wikipedia , lookup

Wien bridge oscillator wikipedia , lookup

Surge protector wikipedia , lookup

Power MOSFET wikipedia , lookup

Tektronix analog oscilloscopes wikipedia , lookup

Transistor–transistor logic wikipedia , lookup

Regenerative circuit wikipedia , lookup

Amplifier wikipedia , lookup

Wilson current mirror wikipedia , lookup

Radio transmitter design wikipedia , lookup

Voltage regulator wikipedia , lookup

Current source wikipedia , lookup

Power electronics wikipedia , lookup

Schmitt trigger wikipedia , lookup

Valve audio amplifier technical specification wikipedia , lookup

Two-port network wikipedia , lookup

Resistive opto-isolator wikipedia , lookup

Negative-feedback amplifier wikipedia , lookup

Current mirror wikipedia , lookup

Switched-mode power supply wikipedia , lookup

Operational amplifier wikipedia , lookup

Opto-isolator wikipedia , lookup

Valve RF amplifier wikipedia , lookup

Rectiverter wikipedia , lookup

Transcript
AD827—SPECIFICATIONS
(@ T = +25 C, unless otherwise noted.)
A
Model
DC PERFORMANCE
Input Offset Voltage
Conditions
V
1
–5 V
T MIN to T MAX
T MIN to T MAX
Input Offset Current
Offset Current Drift
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Open-Loop Gain
T MIN to T MAX
V
= – 2.5 V
VCM = – 12 V
T MIN to T MAX
CM
T MIN to T MAX
VO = – 2.5 V
R LOAD = 500
T MIN to T MAX
R LOAD = 150
VOUT = – 10 V
R LOAD = 1 k
T MIN to T MAX
MATCHING CHARACTERISTICS
Input Offset Voltage
Crosstalk
2
Slew Rate 3
Settling Time to 0.1%
Phase Margin
Differential Gain Error
Differential Phase Error
Input Voltage Noise
Input Current Noise
Input Common-Mode
Voltage Range
0.5
– 5 V to – 15 V
– 5 V to – 15 V
15
3.3
– 5 V to – 15 V
50
– 5 V to – 15 V
–5 V
78
– 15 V
78
– 5 V to – 15 V 75
– 5 V to – 15 V 75
72
0.5
95
95
–5 V
– 15 V
f = 5 MHz
DYNAMIC PERFORMANCE
Unity-Gain Bandwidth
Full Power Bandwidth
3.5
3
1.5
5.5
Short-Circuit Current Limit
–
–
–
–
2
3.5
4
6
AD827A/S
Typ Max
0.3
15
3.3
7
8.2
300
400
50
80
80
75
75
72
0.5
95
95
86
2
1
3.5
3
1.5
5.5
1.6
2
4
4
6
7
9.5
300
400
Unit
mV
mV
mV
mV
V/ C
A
A
nA
nA
nA/ C
dB
dB
dB
dB
dB
V/mV
V/mV
V/mV
V/mV
V/mV
0.4
85
0.2
85
mV
dB
–5 V
– 15 V
35
50
35
50
MHz
MHz
12.7
12.7
MHz
4.7
200
300
4.7
200
300
MHz
V/ s
V/ s
65
120
65
120
ns
ns
50
0.04
0.19
15
1.5
50
0.04
0.19
15
1.5
Degrees
%
Degrees
nV/ Hz
pA/ Hz
–5 V
= 500
= 150
=1k
= 500
1.6
Min
–5 V
–5 V
VO = 5 V p-p,
R LOAD = 500 – 5 V
VO = 20 V p-p,
R LOAD = 1 k
– 15 V
R LOAD = 500
– 5V
– 15 V
R LOAD = 1 k
AV = —1
—2.5 V to +2.5 V – 5 V
—5 V to +5 V
– 15 V
– 15 V
C LOAD = 10 pF
R LOAD = 1 k
f = 4.4 MHz
– 15 V
f = 4.4 MHz
– 15 V
f = 10 kHz
– 15 V
f = 10 kHz
– 15 V
R LOAD
R LOAD
R LOAD
R LOAD
86
2
1
– 15 V
Output Voltage Swing
AD827J
Typ Max
– 15 V
T MIN to T MAX
Offset Voltage Drift
Input Bias Current
Min
S
5V
3.0
5V
2.5
15 V
12
15 V
10
– 5 V to – 15 V
INPUT CHARACTERISTICS
Input Resistance
Input Capacitance
+4.3
—3.4
+14.3
—13.4
3.6
3.0
13.3
12.2
32
300
1.5
—2—
3.0
2.5
12
10
+4.3
—3.4
+14.3
—13.4
3.6
3.0
13.3
12.2
32
300
1.5
V
V
V
V
–V
–V
–V
–V
mA
k
pF
REV. C
AD827
Model
Conditions
OUTPUT RESISTANCE
Open Loop
POWER SUPPLY
Operating Range
Quiescent Current
T MIN to T MAX
T MIN to T MAX
V
Min
S
AD827J
Typ Max
Min
AD827A/S
Typ Max
15
–5 V
– 4.5
– 15 V
15
– 18
13
16
13.5
16.5
10
10.5
TRANSISTOR COUNT
Unit
– 4.5
10
10.5
92
– 18
13
16.5/17.5
13.5
17/18
V
mA
mA
mA
mA
92
NOTES
1
Offset voltage for the AD827 is guaranteed after power is applied and the device is fully warmed up. All other specifications are measured using high speed test equipment,
approximately 1 second after power is applied.
2
Full Power Bandwidth = Slew Rate/2
VPEAK .
3
Gain = +1, rising edge.
All min and max specifications are guaranteed.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS
1
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
– 18 V
Internal Power Dissipation 2
Plastic (N) Package (Derate at 10 mW/
C) . . . . . . . . 1.5 W
Cerdip (Q) Package (Derate at 8.7 mW/
C) . . . . . . . 1.3 W
Small Outline (R) Package (Derate at 10 mW/
C) . . . 1.5 W
LCC (E) Package (Derate at 6.7 mW/
C) . . . . . . . . . 1.0 W
Input Common-Mode Voltage . . . . . . . . . . . . . . . . . . . . .
– VS
Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . 6 V
Indefinite
Output Short Circuit Duration 3 . . . . . . . . . . . . . . . .
Storage Temperature Range (N, R) . . . . . . . —65 C to +125 C
Storage Temperature Range (Q) . . . . . . . . . —65 C to +150 C
Operating Temperature Range
AD827J . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0
C to 70 C
AD827A . . . . . . . . . . . . . . . . . . . . . . . . . . . —40
C to +85 C
AD827S . . . . . . . . . . . . . . . . . . . . . . . . . . —55
C to +125 C
Lead Temperature Range
(Soldering to 60 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 300
C
NOTES
1
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only, and functional operation of
the device at these or any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute maximum ratings
for extended periods may affect device reliability.
2
Maximum internal power dissipation is specified so that T
J does not exceed 175
at an ambient temperature of 25
C.
Thermal Characteristics:
MiniDIP: JA = 100 C/W; JC = 33 C/ W
Cerdip: JA = 110 C/W; JC = 30 C/W
16-Lead Small Outline Package:
JA = 100 C/W
20-Lead LCC: JA = 150 C/W; JC = 35 C/W
3
Indefinite short circuit duration is only permissible as long as the absolute
maximum power rating is not exceeded.
REV. C
ORDERING GUIDE
Temperature
Range
Model
AD827JN
AD827JR
AD827AQ
AD827SQ
AD827SQ/883B
5962-9211701MPA
AD827SE/883B
5962-9211701M2A
AD827JR-REEL
AD827JChips
AD827SChips
0 C to +70 C
0 C to +70 C
—40 C to +85
—55 C to +125
—55 C to +125
—55 C to +125
—55 C to +125
—55 C to +125
0 C to +70 C
0 C to +70 C
—55 C to +125
Package
Description
C
C
C
C
C
C
C
8 -Lead Plastic DIP
16-Lead Plastic SO
8-L ead Cerdip
8-L ead Cerdip
8-L ead Cerdip
8-L ead Cerdip
20-Lead LCC
20-Lead LCC
Tap e & Reel
Die
Die
METALLIZATION PHOTOGRAPH
Contact factory for latest dimensions.
Dimensions shown in inches and (mm).
Substrate is connected to V+.
C
—3—
Package
Option
N-8
R-16
Q-8
Q-8
Q-8
Q-8
E-20A
E-20A
—Typical Performance Characteristics
(@ +25 C &
AD827
20
OUTPUT VOLTAGE SWING – Volts
20
INPUT COMMON-MODE RANGE – Volts
15 V, unless otherwise noted)
15
+VIN
10
–VIN
5
15
+VOUT
10
–VOUT
RLOAD = 1k
5
0
0
0
5
10
15
SUPPLY VOLTAGE – Volts
20
0
5
10
15
SUPPLY VOLTAGE – Volts
20
Figure1. InputCommon-Mode
Range vs. Supply Voltage
Figure 2. Output Voltage
Swing vs. Supply Voltage
Figure 3. Output Voltage
Swing vs. Load Resistance
Figure 4. Quiescent Current
vs. Supply Voltage
Figure 5. Input Bias Current
vs. Temperature
Figure 6. Closed-Loop Output
Impedance vs. Frequency,
Gain = +1
Figure 8. Short-Circuit
Current Limit vs. Temperature
Figure 9. Gain Bandwidth vs.
Temperature
QUIESCENT CURRENT – mA
14
12
VS = –15V
10
VS = –5V
8
0
–60 –40 –20
0
40 60
20
80
TEMPERATURE – C
100 120 140
Figure 7. Quiescent Current
vs. Temperature
—4—
REV. C
AD827
Figure 10. Open-Loop Gain and
Phase Margin vs. Frequency
Figure 13. Common-Mode
Rejection Ratio vs. Frequency
Figure 11. Open-Loop Gain
vs. Load Resistance
Figure 12. Power Supply Rejection
Ratio vs. Frequency
Figure 15. Output Swing and
Error vs. Settling Time
Figure 14. Large Signal
Frequency Response
400
RISE
350
SLEW RATE – Volts/µs
AV = +1
SLEW RATE 10 – 90%
300
FALL
VS = –15V
250
RISE
200
FALL
VS = –5V
150
100
–60 –40
Figure 16. Harmonic Distortion
vs. Frequency
REV. C
Figure 17. Input Voltage
Noise Spectral Density
—5—
–20
0
20
40
60 80
TEMPERATURE – C
100 120 140
Figure 18. Slew Rate vs.
Temperature
AD827
Figure 20. Crosstalk Test Circuit
Figure 19. Crosstalk vs. Frequency
INPUT PROTECTION PRECAUTIONS
An input resistor (resistor R IN of Figure 21a) is recommended in
circuits where the input common-mode voltage to the AD827
may exceed (on a transient basis) the positive supply voltage.
This resistor provides protection for the input transistors by
limiting the maximum current that can be forced into their bases.
For high performance circuits, it is recommended that a second
resistor (R B in Figures 21a and 22a) be used to reduce biascurrent errors by matching the impedance at each input. This
resistor reduces the error caused by offset voltages by more than
an order of magnitude.
Figure 21a. Follower Connection
Figure 21b. Follower Large
Signal Pulse Response
Figure 21c. Follower Small
Signal Pulse Response
Figure 22a. Inverter Connection
Figure 22b. Inverter Large
Signal Pulse Response
Figure 22c. Inverter Small
Signal Pulse Response
—6—
REV. C
AD827
VIDEO LINE DRIVER
A HIGH SPEED THREE OP AMP INSTRUMENTATION
AMPLIFIER CIRCUIT
The AD827 functions very well as a low cost, high speed line
driver for either terminated or unterminated cables. Figure 23
shows the AD827 driving a doubly terminated cable in a
follower configuration.
The instrumentation amplifier circuit shown in Figure 24 can
provide a range of gains. Table II details performance.
+VS
+VS
TRIM FOR BEST
SETTLING TIME
0.1F
2 – 8pF
–VIN
0.1 µF
VIN
50
3
8
+
1/2
2 AD827
–
RBT
1/2
AD827
2k
1
+VS
VOUT
50
0.1F
1k
RT
50
0.1 µF
2k
500
TRIM FOR
OPTIMUM
BANDWIDTH
7 – 15 pF
RG
2
6
AD847
3
+
4
0.1F
2k
–VS
7
–
3pF
VOUT
2k
RL
2k
6
CC
1k
–
1/2
5 AD827
+
4
500
+VIN
7
–VS
CIRCUIT GAIN = 2000 + 1
RG
0.1F
NOTE: PINOUT SHOWN IS FOR MINIDIP PACKAGE
–VS
Figure 23. A Video Line Driver
Figure 24. A High Bandwidth Three Op Amp
Instrumentation Amplifier
The termination resistor, R T , (when equal to the cables
characteristic impedance) minimizes reflections from the far end
of the cable. While operating from – 5 V supplies, the AD827
maintains a typical slew rate of 200 V/ s, which means it can
drive a – 1 V, 30 MHz signal into a terminated cable.
Table II. Performance Specifications for the
Three Op Amp Instrumentation Amplifier
Table I. Video Line Driver Performance Summary
VIN *
0 dB or
0 dB or
0 dB or
0 dB or
0 dB or
0 dB or
– 500 mV Step
– 500 mV Step
– 500 mV Step
– 500 mV Step
– 500 mV Step
– 500 mV Step
VSUPPLY
CC
– 15
– 15
– 15
–5
–5
–5
20 pF
15 pF
0 pF
20 pF
15 pF
0 pF
—3 dB BW
23 MHz
21 MHz
13 MHz
18 MHz
16 MHz
11 MHz
Overshoot
4%
0%
0%
2%
0%
0%
*—3 dB bandwidth numbers are for the 0 dBm signal input. Overshoot numbers
are the percent overshoot of the 1 V step input.
A back-termination resistor (R BT , also equal to the characteristic
impedance of the cable) may be placed between the AD827
output and the cable input, in order to damp any reflected
signals caused by a mismatch between R T and the cables
characteristic impedance. This will result in a flatter frequency
response, although this requires that the op amp supply
– 2 V to
the output in order to achieve a – 1 V swing at resistor R T .
REV. C
—7—
Gain
R
1
2
10
100
Open
2k
226
20
G
Small Signal
Bandwidth
@ 1 V p-p Output
16.1 MHz
14.7 MHz
4.9 MHz
660 kHz
AD827
A TWO-CHIP VOLTAGE-CONTROLLED AMPLIFIER
(VCA) WITH EXPONENTIAL RESPONSE
Voltage-controlled amplifiers are often used as building blocks
in automatic gain control systems. Figure 25 shows a two-chip
VCA built using the AD827 and the AD539, a dual, currentoutput multiplier. As configured, the circuit has its two
between the CH1 output and Z1, the other between the CH1
output and W1. Likewise, in the CH2 multiplier, one of the
feedback resistors is connected between CH2 and Z2 and the
other is connected between CH2 and Z2. In Figure 25, Z1 and
W1 are tied together, as are Z2 and W2, providing a 3 k
feedback resistor for the op amp. The 2 pF capacitors connected
between the AD539s W1 and CH1 and W2 and CH2 pins are
in parallel with the feedback resistors and thus reduce peaking
in the VCAs frequency response. Increasing the values of C3
and C4 can further reduce the peaking at the expense of
reduced bandwidth. The 1.25 mA full-scale output current of
the AD539 and the 3 k
feedback resistor set the full-scale
output voltage of each multiplier at 3.25 V p-p.
Current limiting in the AD827 (typically 30 mA) limits the output voltage in this application to about 3 V p-p across a 100
load. Driving a 50
reverse-terminated load divides this value
by two, limiting the maximum signal delivered to a 50
load to
about 1.5 V p-p, which suffices for video signal levels. The
dynamic range of this circuit is approximately 55 dB and is
primarily limited by feedthrough at low input levels and by the
maximum output voltage at high levels.
Figure 25. A Wide Range Voltage-Controlled
Amplifier Circuit
multipliers connected in series. They could also be placed in
parallel with an increase in bandwidth and a reduction in gain.
The gain of the circuit is controlled by V X , which can range
from 0 to 3 V dc. Measurements show that this circuit easily
supplies 2 V p-p into a 100
load while operating from – 5 V
supplies. The overall bandwidth of the circuit is approximately
7 MHz with 0.5 dB of peaking.
Each half of the AD827 serves as an I/V converter and converts
the output current of one of the two multipliers in the AD539
into an output voltage. Each of the AD539s two multipliers
contains two internal 6 k
feedback resistors; one is connected
Guidelines for Grounding and Bypassing
When designing practical high frequency circuits using the AD827,
some special precautions are in order. Both short interconnection
leads and a large ground plane are needed whenever possible to
provide low resistance, low inductance circuit paths. One should
remember to minimize the effects of capacitive coupling
between circuits. Furthermore, IC sockets should be avoided.
Feedback resistors should be of a low enough value that the
time constant formed with stray circuit capacitances at the
amplifier summing junction will not limit circuit performance.
As a rule of thumb, use feedback resistor values that are less
than 5 k . If a larger resistor value is necessary, a small (<10 pF)
feedback capacitor in parallel with the feedback resistor may be
used. The use of 0.1 F ceramic disc capacitors is recommended
for bypassing the op amps power supply leads.
—8—
REV. C
AD827
OUTLINE DIMENSIONS
8-Lead Plastic Dual-in-Line Package [PDIP]
(N-8)
8-Lead Ceramic DIP-Glass Hermetic Seal Package [CERDIP]
(Q-8)
Dimensions shown in millimeters and (inches)
Dimensions shown in millimeters and (inches)
0.13 (0.0051) 1.40 (0.0551)
MAX
MIN
10.92 (0.4299)
8.84 (0.3480)
8
8
5
1
7.11 (0.2799)
6.10 (0.2402)
5
7.87 (0.3089)
5.59 (0.2201)
PIN 1
4
1
PIN 1
8.25 (0.3248)
7.62 (0.3000)
2.54 (0.1000)
BSC
2.54 (0.1000) BSC
8.13 (0.3201)
7.37 (0.2902)
10.29 (0.4051) MAX
1.52 (0.0598)
0.38 (0.0150)
( 3.30
(0.1299)
MIN
5.33
(0.2098)
MAX
4.06 (0.1598)
2.93 (0.1154)
0.56 (0.0220)
0.36 (0.0142)
4
4.95 (0.1949)
2.93 (0.1154)
5.08 (0.2000)
MAX
0.38 (0.0150)
0.20 (0.0079)
5.08 (0.2000)
3.18 (0.1252)
SEATING
PLANE
1.77 (0.0697)
1.15 (0.0453)
0.58 (0.0228)
0.36 (0.0142)
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
1.52 (0.0600)
0.38 (0.0150)
3.81 (0.1500)
MIN
SEATING
1.78 (0.0701) PLANE
0.76 (0.0299)
0.38 (0.0150)
0.20 (0.0079)
15
0
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
20-Terminal Ceramic Leadless Chip Carrier [LCC]
(E-20A)
16-Lead Standard Small Outline Package [SOIC]
Wide Body
(R-16)
Dimensions shown in millimeters and (inches)
Dimensions shown in millimeters and (inches)
2.54 (0.1000)
1.63 (0.0642)
10.50 (0.4134)
10.10 (0.3976)
9.09
9.09 (0.3579)
8.69 (0.3421) (0.3579)
MAX
SQ
SQ
7.60 (0.2992)
7.40 (0.2913)
8
1
1.27 (0.0500)
BSC
10.65 (0.4193)
10.00 (0.3937)
2.24 (0.0882)
1.37 (0.0539)
2.65 (0.1043)
2.35 (0.0925)
0.75 (0.0295)
0.25 (0.0098)
45
0.51 (0.0201)
0.33 (0.0130)
SEATING
PLANE
0.32 (0.0126)
0.23 (0.0091)
8
0
1.27 (0.0500)
0.40 (0.0157)
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
COMPLIANT TO JEDEC STANDARDS MS-013AA
REV. C
2.54 (0.1000) BSC
3
4
0.28 (0.0110)
0.18 (0.0071)
R TYP
1.91 (0.0752)
REF
1.40 (0.0551)
1.14 (0.0449)
1
BOTTOM
VIEW
14
13
0.38 (0.0150)
MIN
0.71 (0.0278)
0.56 (0.0220)
1.27 (0.0500)
BSC
8
9
45 TYP
3.81 (0.1500)
BSC
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
0.30 (0.0118)
0.10 (0.0039)
COPLANARITY
0.10
5.08 (0.2000)
BSC
19
18 20
9
16
PIN 1
1.91
(0.0752)
REF
2.41 (0.0949)
1.90 (0.0748)
—9—
AD827
Revision History
Location
Page
8/02Data Sheet changed from REV. B to REV. C.
Updated Outline Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
—10—
. . . . . . . . . . . . . . . . . . . . . . . . . . . .9
REV. C
—11—
—12—
PRINTED IN U.S.A.
C00878—0—8/02(C)