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Inleiding Meten en Modellen – 8C120 Prof.dr.ir. Bart ter Haar Romeny Dr. Andrea Fuster Faculteit Biomedische Technologie Biomedische Beeld Analyse www.bmia.bmt.tue.nl 8C120 - 2010 Chapter 3 - Webster Operational Amplifiers and Signal Processing 8C120 - 2010 Applications of Operational Amplifier In Biological Signals and Systems The three major operations done on biological signals using Op-Amps: 1) Amplifications and Attenuations 2) DC offsetting: add or subtract a DC 3) Filtering: Shape signal’s frequency content 8C120 - 2010 Ideal Op-Amp Most bioelectric signals are small and require amplifications Figure 3.1 Op-amp equivalent circuit. The two inputs are 1 and 2. A differential voltage between them causes current flow through the differential resistance Rd. The differential voltage is multiplied by A, the gain of the op amp, to generate the output-voltage source. Any current flowing to the output terminal vo must pass through the output resistance Ro. 8C120 - 2010 Inside the Op-Amp (IC-chip) 20 transistors 11 resistors 1 capacitor 8C120 - 2010 Ideal Characteristics 12345- A = (gain is infinity) Vo = 0, when v1 = v2 (no offset voltage) Rd = (input impedance is infinity) Ro = 0 (output impedance is zero) Bandwidth = (no frequency response limitations) and no phase shift 8C120 - 2010 Two Basic Rules Rule 1 When the op-amp output is in its linear range, the two input terminals are at the same voltage. Rule 2 No current flows into or out of either input terminal of the op amp. 8C120 - 2010 Inverting Amplifier o 10 V i Rf -10 V i i Ri 10 V i - o Slope = -Rf / Ri + -10 V (a) (b) vo Rf Ri vi Rf vo G vi Ri Figure 3.3 (a) An inverting amplified. Current flowing through the input resistor Ri also flows through the feedback resistor Rf . (b) The input-output plot shows a slope of -Rf / Ri in the central portion, but the output saturates at about ±13 V. 8C120 - 2010 Summing Amplifier Rf R1 1 - R2 2 o + v1 v2 vo R f R1 R2 8C120 - 2010 Example 3.1 The output of a biopotential preamplifier that measures the electro-oculogram is an undesired dc voltage of ±5 V due to electrode half-cell potentials, with a desired signal of ±1 V superimposed. Design a circuit that will balance the dc voltage to zero and provide a gain of -10 for the desired signal without saturating the op amp. Ri Rf 10 kW 100 kW +10 i +15V 5 kW Rb 20 kW vb o + Voltage, V i i + b /2 0 Time -15 V -10 (a) o (b) 8C120 - 2010 Follower (buffer) Used as a buffer, to prevent a high source resistance from being loaded down by a low-resistance load. In other words: it prevents drawing current from the source. - i vo vi o + G 1 8C120 - 2010 Noninverting Amplifier o i Ri i Rf 10 V Slope = (Rf + Ri )/ Ri -10 V 10 V i - i vo o + R f Ri Ri vi -10 V G R f Ri Ri Rf 1 Ri 8C120 - 2010 Differential Amplifiers v3 Differential Gain Gd v4 vo R4 Gd v4 v3 R3 R3 vo R4 Common Mode Gain Gc For ideal op amp if the inputs are equal then the output = 0, and the Gc =0. No differential amplifier perfectly rejects the common-mode voltage. Common-mode rejection ratio CMMR Gd CMRR Gc R4 R3 R4 vo (v4 v3 ) R3 Typical values range from 100 to 10,000 Disadvantage of one-op-amp differential amplifier is its low input resistance 8C120 - 2010 Instrumentation Amplifiers Differential Mode Gain v3 v4 i ( R2 R1 R2 ) v1 v2 iR1 v3 v4 2 R2 R1 Gd v1 v2 R1 2 R2 R1 R4 v2 v1 vo R1 R3 Advantages: High input impedance, High CMRR, Variable gain 8C120 - 2010 Comparator – No Hysteresis v1 > v2, vo = -13 V v1 < v2, vo = +13 V +15 v2 -15 ui uref 10 V R1 - R1 -10 V uo + uo uref R2 ui -10 V If (vi+vref) > 0 then vo = -13 V else R1 will prevent overdriving the op-amp vo = +13 V 8C120 - 2010 Comparator – With Hysteresis Reduces multiple transitions due to mV noise levels by moving the threshold value after each transition. uo ui R1 With hysteresis 10 V - uref uo R1 + -10 V 10 V - uref R2 R3 ui -10 V Width of the Hysteresis = 4VR3 8C120 - 2010 Rectifier o 10 V -10 V R xR (1-x)R D1 i D2 -10 V - i + (b) R D4 - 10 V D3 o= i xR x (1-x)R - + i (a) D2 vo + (a) Full-wave precision rectifier: a) For i > 0, D2 and D3 conduct, whereas D1 and D4 are reverse-biased. Noninverting amplifier at the top is active 8C120 - 2010 Rectifier xRi i R xR (1-x)R D1 - D2 + D4 (a) o 10 V R D4 - vo + - i R D3 o= i -10 V 10 V i x -10 V + (a) (b) Full-wave precision rectifier: b) For i < 0, D1 and D4 conduct, whereas D2 and D3 are reverse-biased. Inverting amplifier at the bottom is active 8C120 - 2010 Rectifier i Ri = 2 kW Rf = 1 kW v - o D RL = 3 kW + (c) One-op-amp full-wave rectifier. For i < 0, the circuit behaves like the inverting amplifier rectifier with a gain of +0.5. For i > 0, the op amp disconnects and the passive resistor chain yields a gain of +0.5. 8C120 - 2010 Logarithmic Amplifiers Rf /9 Ic VBE i Ri VBE Rf - o + IC 0.06 log IS vi vo 0.06 log 13 Ri 10 (a) Figure 3.8 (a) A logarithmic amplifier makes use of the fact that a transistor's VBE is related to the logarithm of its collector current. For range of Ic equal to 10-7 to 10-2 the range of vo is -.36 to -0.66 V. 8C120 - 2010 Logarithmic Amplifiers VBE Ic Ri vo 10 V VBE i Rf /9 9VBE Rf -10 V 10 V - 1 i o + (a) (b) -10 V 10 Figure 3.8 (a) With the switch thrown in the alternate position, the circuit gain is increased by 10. (b) Input-output characteristics show that the logarithmic relation is obtained for only one polarity; 1 and 10 gains are indicated. 8C120 - 2010 Logarithmic Amplifiers Uses of Log Amplifier: 1. Multiply variable 2. Divide variable 3. Raise variable to a power 4. Compress large dynamic range into small ones 5. Linearize the output of devices 8C120 - 2010 1 vo Ri C f t1 v dt v i Integrators ic 0 Zf Vo ( j ) Vi ( j ) Zi Rf Vo j Vi j Ri jR f Ri C A large resistor Rf is used to prevent saturation vo R f vi Ri for f < fc 1 fc 2R f C f 8C120 - 2010 Integrators Figure 3.9 A three-mode integrator With S1 open and S2 closed, the dc circuit behaves as an inverting amplifier. Thus o = ic and o can be set to any desired initial conduction. With S1 closed and S2 open, the circuit integrates. With both switches open, the circuit holds o constant, making possible a leisurely readout. 8C120 - 2010 The output of the piezoelectric sensor may be fed directly into the negative input of the integrator as shown below. Analyze the circuit of this charge amplifier and discuss its advantages. Example 3.2 is R C isC = isR = 0 vo = -vc - dqs/ dt = is = K dx/dt uo isC isR + FET Piezo-electric sensor 1 vo C t1 0 Kdx Kx dt dt C Long cables may be used without changing sensor sensitivity or time constant. 8C120 - 2010 Differentiators dvi vo RC dt Zf Vo ( j ) jRC Vi ( j ) Zi Figure 3.11 A differentiator The dashed lines indicate that a small capacitor must usually be added across the feedback resistor to prevent oscillation. 8C120 - 2010 Active Filters- Low-Pass Filter Vo j 1 Gain = G = V j R 1 jR C i i f f Cf Rf |G| ui Ri - Rf + uo (a) Rf/Ri 0.707 Rf/Ri MMA fc = 1/2RiCf freq Active filters (a) A low-pass filter attenuates high frequencies 8C120 - 2010 Active Filters (High-Pass Filter) Gain = G = Vo j R f jRi Ci Vi j Ri 1 jRi Ci ui Ci Ri - Rf uo + (b) |G| Rf/Ri 0.707 Rf/Ri MMA fc = 1/2RiCf freq Active filters (b) A high-pass filter attenuates low frequencies and blocks dc. 8C120 - 2010 Cf Active Filters (Band-Pass Filter) jR f Ci Vo j Vi j 1 jR f C f 1 jRi Ci Ci ui Ri - Rf + uo (c) |G| Rf/Ri 0.707 Rf/Ri MMA fcL = 1/2RiCi fcH = 1/2RfCf Active filters (c) A bandpass filter attenuates both low and high frequencies. freq 8C120 - 2010 Frequency Response of op-amp and Amplifier Open-Loop Gain Compensation Closed-Loop Gain Loop Gain Gain Bandwidth Product Slew Rate Offset voltage Bias current Noise 8C120 - 2010 Input and Output Resistance - Rd ud ii ui + Ro + - vi Rai ( A 1) Rd ii Typical value of Rd = 2 to 20 M Aud uo io RL CL vo Ro Rao io A 1 Typical value of Ro = 40 8C120 - 2010 Chapter 3 - Webster Operational Amplifiers and Signal Processing Wikipedia: Operational Amplifier 8C120 - 2010