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Computer Systems Architecture
Lesson 2
The Digital Logic Level
Copyright © Genetic Computer School 2008
SA 2- 0
Computer Systems Architecture
LESSON OVERVIEW
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Revolution in electronics industry
Basic logic gates and Boolean Algebra
Combination of logic gates
Clocks
Memory chips
CPU chips and buses
Mulplexers
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Computer Systems Architecture
Logic Devices
Fixed Logic
Programmable Logic
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Computer Systems Architecture
Advantages of PLD
Prototyping Method
With manual wiring reduced to minimum, prototypes can be
constructed, tested, and modified at a much faster rate.
Wiring errors can be avoided.
You can experiment with many digital IC types without
having to stock them in your supply cabinet.
Circuit designs can be saved as electronic files within the
PC and used again when needed.
Since the PLD can be used over and over again,
modifications can easily be made by altering the circuit in the
PC, and then downloading the new design into the PLD.
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Computer Systems Architecture
Logic Gates
Electronic circuits which combine digital
signals according to the Boolean algebra are
referred to as logic gates; because they control
the flow of information.
Positive logic is an electronic representation
in which the true state is at a higher voltage,
while negative logic has the true state at a
lower voltage.
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Computer Systems Architecture
Three Basic Logic Gates
AND gate
OR gate
NOT gate
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Computer Systems Architecture
AND gate
AND
Input Output
A B
AB
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Computer Systems Architecture
OR gate
OR
Input
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Output
A
B
A+B
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Computer Systems Architecture
NOT gate
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NAND gate
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NOR gate
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EOR gate
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ENOR gate
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Computer Systems Architecture
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Computer Systems Architecture
Basic Digital Logic Circuits
RTL : Resistor-Transistor Logic
DTL
: Diode-Transistor Logic
TTL
: Transistor-Transistor Logic
NMOS : N-channel Metal-Oxide Silicon
CMOS : Complementary Metal-Oxide Silicon
ECL
: Emitter-Coupled Logic
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Computer Systems Architecture
Clock
A clock is a circuit that emits a series of
pulses or timing signals with a precise pulse
width and precise time interval between
pulses increasing time.
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Period
The time T for one complete cycle of the
clock is known as the period.
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Computer Systems Architecture
Relation Between
Frequency and Period
It is common to characterize a clock in terms
of its frequency where the frequency f is
related to the period T by:
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Memory Chips
SIMM
Single-inline-memory-module
DIMM
Dual-inline-memory-module
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CPU Chips
All modern CPUs are contained on a single
(very large-scale integrated circuit) chip.
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Computer Systems Architecture
Types of Buses
Processor Bus
Memory Bus
I/O Bus
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Computer Systems Architecture
Processor Bus
is the communication pathway from the
CPU and the system bus and possibly an
external cache.
is to transfer data to and from the cache or
system bus as fast as possible.
 is running at a speed that is equal to the
speed of the CPU.
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Computer Systems Architecture
Memory Bus
is used to transfer data between the CPU
and main memory. is either the processor bus
itself or another stand alone bus.
is much harder to judge the clock rate of the
memory bus (if it is separate form processor
bus).
is definitely not as fast as the processor bus.
is limited by the slowness of main memory.
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Computer Systems Architecture
I/O Bus
allows the computer to communicate with
storage devices, modem printers, and other
peripheral devices.
ISA
Micro Channel Architecture (MCA)
EISA
VESA Local Bus (VLB)
PCI
PCMCIA
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Computer Systems Architecture
Focus
For Increased Performance
Of The Bus
Faster CPUs
Increasing software demands
Greater video requirements
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Computer Systems Architecture
Multiplexers And Decoders_1
Multiplexers and decoders are used when
many lines of information are being gated and
passed from one part of a circuit to another.
A decoder de-multiplexes the signals back
onto several different lines.
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Computer Systems Architecture
Multiplexers And Decoders_2
Multiplexing
Multiplexing is when multiple data signals
share a common propagation path.
Time multiplexing is when different signals
travel along the same wire but at different
times.
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Computer Systems Architecture
Multiplexers And Decoders_3
These devices have data and addresses lines,
and usually include enable/disable input.
When the device is disabled the output is
locked into some particular state and is not
effected by the inputs.
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