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A Class E Power Amplifier for ISO-14443A Elke De Mulder∗ , Wim Aerts∗† , Bart Preneel∗ , Ingrid Verbauwhede∗ and Guy Vandenbosch† ∗ ESAT-COSIC † ESAT-TELEMIC K.U.Leuven, Kasteelpark Arenberg 10 bus 2446, B-3001 Heverlee; Email: [email protected] Abstract—This paper reports on the design and implementation of a class E push-pull amplifier in order to increase the reading range of an ISO-14443A RFID system. With the aid of classical design formulas and some alterations due to parasitic and intrinsic capacitances, a working implementation was made that can provide the loop with an amplified modulated current wave. I. I NTRODUCTION The use of Radio Frequency IDentifier (RFID) technology is (becoming) widespread in different areas of our society and it is employed in various applications like access control, logistics tracking and animal identification. One of the most popular amongst the RFID standards is ISO-14443. This standard defines the physical characteristics, the radio frequency power and signal interface characteristics, the initialization and anti-collision specifications and the transmission protocol to which the identification cards, contactless integrated circuit cards or proximity cards should comply. The MIFARE card by NXP is by far the best known representative for this class of RFID cards. The working frequency is 13.56 MHz and most Commercial, off-the-shelf (COTS) readers are designed for a reading range of 10 cm. In order to extend this range, some alterations to the reader design can be made. A standard reader can be envisioned to be comprised of two main building blocks: the reader logic and the antenna. This paper focuses on a powerful amplifier to boost the signal in between the two building blocks as shown in Fig. 1. The authors focused on the antenna design in a separate publication [1]. A combination of both amplifier and antenna improvements results in an extended reading range. Of course this distance is limited due to physical properties related to the characteristics of the power transfer technique, the working frequency, the components used in the design, and the like. Sfrag replacements RFID logic Class E Fig. 1. Antenna Schematic of the building blocks of the altered RFID system The emphasis of this paper is on the design of a class E amplifier that can deliver a sinusoidal current with a maximum amplitude of 8 A at a frequency of 13.56 MHz to the inductive load, i.e. the antenna, with minimal power consumption. The 8 A is a physical limit, as an amplitude higher than this will break the components. The amplifier should work with a 30 V Fig. 2. Picture of the class E Amplifier. power supply. A picture can be found in Fig. 2. A similar design was done by Kirschenbaum and Wool [2], and although the authors aimed at extending the reading range too, they based their amplifier on an existing design for their reader. In this paper, generic design decisions are made up to the point where they are no longer independent of the choice of the reader. First, in Sect. II some theory is reviewed to choose the appropriate amplifier topology and adapt it to a balanced transmitting antenna. Next, the amplifier is designed in Sect. III-A and simulated in Sect. III-B. Measurements of the field strength and decay time in Sect. III-C conclude the article, indicating that a working implementation was obtained. II. T HEORY Some aspects of the ISO-14443A standard have an influence on the amplifier design. Therefore it is important to identify them (Sect. II-A) before any decision about the amplifier topology is taken (Sect. II-B). This investigation will lead to the conclusion that a class E amplifier is preferred and the corresponding design formulas are shortly reviewed in Sect. II-C. A first design iteration ends here, but as the amplifier will drive a loop antenna, which is a balanced system, a push-pull version of the amplifier is preferred above a single ended implementation in order to avoid balun problems, Sect. II-D. Finally, Sect. II-E concludes the theory review with some peculiarities in case the amplifier is used for amplitude modulation (AM). The ISO-14443 standard is a standard for near field communication with identification cards, contactless integrated circuit(s) cards or proximity cards at a frequency of 13.56 MHz. Extensive information can be found in the standards published by ISO/IEC [3], [4], [5], [6]. In the remainder of the text, only type A of the standard will be discussed and only those specifications that are of importance for the further discussion will be restrained. Part 2 of the standard [4] describes how the Proximity Card (PICC) or tag should be powered and how the data is exchanged between PICC and Proximity Coupling Device (PCD) or reader. The PCD generates an RF field with a carrier frequency fc of 13.56 MHz that couples with the PICC according to the transformer principle and is intended to transmit data to the PICC besides providing energy to the PICC to activate it. Furthermore, this part of the standard elaborates on the encoding method for the communication from PCD to PICC, which is Amplitude Shift Keying (ASK). The RF-field is completely switched ON and OFF (ASK 100%). An amplifier boosting the signal transmitted by PCD to PICC should be able 1) to provide enough energy to the PICC to power it up, which translates in a magnetic field strength of at least 1.5A/m, 2) to work at a frequency of 13.56 MHz and 3) to modulate the waveforms at a data rate of 106 kbit/s according to the specifications in the standard B. Selecting the Power Amplifier Topology Out of the classic amplifier topologies, ranging from class A to F and all its derivations, a class E topology was selected for the following reasons: 1) As stated in [7], the class E amplifier obtains a high power efficiency by minimizing the time in which current and voltage exist simultaneously in the transistor. 2) The class E topology is the natural choice to drive an inductive load such as a loop antenna. 3) To power up an RFID card with inductive coupling over great distances, very large primary coil currents are needed, which build up high coil voltages. A class E amplifier has a parallel-series tuned load network with a series capacitor acting as a DC decoupling capacitor which relieves the stress on the transistor to withstand high voltages. A parallel capacitor bypasses the transistor to guide most of the current. Cser Lchoke A. ISO-14443 A standard Cpar S Fig. 3. R L Schematics of an ideal class E amplifier case of a class E amplifier and a duty cycle of 50%: R = Cpar = Lchoke ≥ L = Cser = 0.577 (Vcc − Vsat )2 PS (1) 0.2 ωR 10 ω 2 Cpar QRLC R ω 1 2 ω L − 1.1525ωR (2) (3) (4) (5) with PS the output power, Vcc the supply voltage, Vsat the saturation voltage of the transistor, ω = 2πfc the pulsation and QRLC the quality factor of the RLC resonance chain. As these formulas model the diodes and transistor as ideal components, the value for Cpar should be the sum of the external capacitor and the intrinsic capacitance of transistor, diodes and any other components added in parallel to the transistor. D. Push-pull topology The single ended class E amplifier treated in Sect. II-C, can be converted into a push-pull configuration by simply doubling the class E amplifier and connecting the load between the two output ports. By doing this, the topology of Fig. 4 is obtained. Vcc Lchoke,1 S1 R1 Cpar,1 Cser,1 L Cdist Cser,2 R2 Cpar,2 Lchoke,2 S2 C. Class E Amplifier Design Formulas Fig. 3 shows a class E amplifier in its most elementary configuration. It consists of a transistor used as a switch S, a series chain of a capacitor Cser , an inductor L, and a resistor R, a parallel capacitor Cpar , and an RF-choke Lchoke . Remark that the output driver is used as a switch rather than a current source. Consequently the transistor will usually be driven by a square waveform that switches the transistor between OFF and completely ON (saturation). Several sets of formulas can be found in the literature. The analysis of Raab [8] coincides with simple formulas in [9] in Fig. 4. The topology of a push-pull class E amplifier. The capacitor in dashed lines is a redistribution of Cpar that can be used to limit the transistor current. Taking Cser,1 = Cser,2 equal to 2 × Cser , and R1 = R2 equal to R2 of the single ended class E, and closing switch S1 when S2 is open and vice versa, this circuit works just as the single ended class E amplifier. Indeed, if S1 is closed (or S2 ), the circuit reduces to the circuit of a single class E amplifier. This push-pull configuration consumes more power, as now during the entire cycle current runs through the transistor E. Modulation If a lower value is required, other design formulas apply due to a non-constant current in the choke inductor that was assumed in the derivation of the formulas. B. Simulations The circuit was simulated with eldo. First the class E amplifier as designed above was simulated, with an extra resistor of Rext = 3.5 Ω added to the loop inductance to meet the ISO-14443 requirements for the quality factor. The envelope of the decay, shown in Fig. 5, reveals that the ISO14443 specifications are met. The measurements were carried out without the extra resistor, as this is inherent to the antenna design and not considered here. The simulation results for this case are also added on Fig. 5. In this case the decay is too slow, according to the explanation above. PSfrag replacements The class E amplifier of Sect. II-C was able to amplify a continuous sine wave. For the ISO-14443A communication, data has to be modulated onto this sine carrier with ASK as explained in Sect. II-A. This can be done by modulating the voltage on the power supply [10]. Changing the amplitude of the square wave on the transistor gate is not an option, because closing the class E transistor causes the continuous current delivered by the choke inductor to charge Cpar to a value that breaks the transistor. The power can be modulated by adding a switch transistor Smod between the power source and the power line of the class E amplifier. The gate of this transistor is driven by a gate driver controlled by the modulation signal (envelope). In case the envelope is high, the switch must close, otherwise the switch must be open. Note on the value of Lchoke : As the current in the choke inductor of the class E amplifier only varies slowly, the current will not immediately drop when the modulation circuit opens the transistor in the power line. This delay adds up to the influence of the quality factor QRLC of the load of the class E amplifier and should be kept low in order to be able to silence the carrier when needed. Therefore it is advised to keep the value of the choke inductor Lchoke low. In [10] is reported that the design values for the class E amplifier will not differ more than 15% from the ones obtained with the formulas of Sect. II-C, as long as: ¶ µ 2 Rl Rl π +1 ≈ 3.5 . (6) Lchoke > 4 fc fc the voltage VDS , as does the junction capacitance Cj of the diodes with varying bias Vbias [12]. Hence the effective output capacitance for a voltage swing can be obtained e.g. via the technique explained in [13] where essentially the transistor is biased and connected in series with a resistor, allowing the derivation of drain-to-source capacitance CDS by measuring the RC time constant. Printed Circuit Board (PCB) traces add up to the series capacitance. Formulas from [14] indicate about 1pF/cm. As a result both Cser and Cpar are smaller in the actual design than obtained with the formulas of Sect. II-C. Trimming capacitors were used to select the appropriate values for both capacitors. 100 90 80 without Rext with Rext 70 current [%] drain-to-source-resistance RDS(ON ) , as opposed to half a cycle in the single ended case. The current drawn from the source also increases, requiring the switch transistors to conduct more current. Fortunately the current through the loop increases too, as now during the entire cycle, one end node of the series chain is excited. 60 50 40 30 20 10 0 2 2.01 2.02 2.03 2.04 2.05 time [s] Fig. 5. 2.06 2.07 2.08 2.09 2.1 −4 x 10 Simulation of loop current with and without Rext . III. I MPLEMENTATION AND M EASUREMENTS The class E amplifier discussed in this work is dimensioned to deliver up to 8 A to the inductive load at a frequency of fc = 13.56 MHz. For the illustrative measurements showing the working implementation, the two turn antenna of [1] was used. This loop antenna has an inductance L = 2.2 µH and resistance Rl = 2 Ω. A. Determining Cser and Cpar The formulas in Sect. II-C combined with the remarks in Sect. II-D lead to Cser = 130 pF and Cpar = 439 pF. The actual values differ from these values as indicated in Sect. II-C: the intrinsic output capacitance of the transistor adds to the effective Cpar of the circuit. This output capacitance Coss can be retrieved from the datasheet [11], but will vary with C. Measurements To illustrate the class E behaviour of the amplifier, Fig. 6 depicts the voltages at the gate and drain of the class E transistors. Apart from the voltage drop due to RDS(ON ) , the voltage over the transistor stays zero when the transistor is conducting. In the remaining half of the cycle, the voltage builds up and decays to zero, with, under perfect conditions, a derivative of zero at turn on. The signal picked up with a magnetic field probe [15] at a distance of 30 cm is represented in Fig. 8. The measured peak-to-peak voltage of approximately 100 mV corresponds to a magnetic field strength of 0.63 A/m. To build up this field, the loop carries 2.8 A. A maximum read out distance of 21.79 cm can be inferred from this. To obtain a modulated PSfrag replacements signal picked up by magnetic probe PSfrag replacements 0.05 35 0.04 30 0.03 amplitude [V] amplitude [V] 25 20 gate voltage drain voltage 15 0.02 0.01 0 −0.01 10 −0.02 5 −0.03 0 −5 −0.04 −0.05 4 5 6 7 8 9 10 11 12 time [s] 13 Fig. 8. Fig. 6. PSfrag replacements 0.05 0.04 0.03 amplitude [V] 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 −7 x 10 Zoom of the signal as received with a magnetic probe at 30 cm. Gate and drain voltage of the class E transistors. signal, given in Fig. 7, an envelope was applied to the gate driver Xenv of the Smod transistor. 0.02 0.01 0 −0.01 −0.02 −0.03 −0.04 −0.05 0.8 0 time [s] −8 x 10 0.9 1 1.1 1.2 time [s] 1.3 1.4 1.5 −5 x 10 Fig. 7. Field transmitted by the loop antenna driven by the class E amplifier. IV. C ONCLUSION In order to increase the reading range of an RFID ISO14443A system, a power amplifier with class E topology was designed and measured. The measurements show that the class E working point was reached, that the loop carries 2.8 A and that the AM signal can be amplified without degradation of the signal integrity. ACKNOWLEDGMENT This research is partially funded by the FWO under project G.0475.05 and the “Institute for the Promotion of Innovation through Science and Technology in Flanders (IWTVlaanderen)”. R EFERENCES [1] Wim Aerts, Elke De Mulder, Bart Preneel, Guy A.E. Vandebosch, and Ingrid Verbauwhede. Dependence of rfid reader antenna design on read out distance. IEEE Transactions on Antennas and Propagation, 56, December 2008. [2] Ilan Kirschenbaum and Avishai Wool. How to build a low-cost, extended-range RFID skimmer. In Proceedings of the 15th USENIX Security Symposium, pages 43–57. USENIX, 31th of July - 4th of August 2006. [3] ISO/IEC/JTC1 Information technology. Identification cards - contactless integrated circuit(s) cards - proximity cards - part 1:physical characteristics. International standard ISO/IEC 14443-1, ISO/IEC/JTC1, 1997. [4] ISO/IEC/JTC1 Information technology. Identification cards - contactless integrated circuit(s) cards - proximity cards - part 2:radio frequency power and signal interface. International standard ISO/IEC 14443-2, ISO/IEC/JTC1, 1999. [5] ISO/IEC/JTC1 Information technology. Identification cards - contactless integrated circuit(s) cards - proximity cards - part 3:initialization and anticollision. International standard ISO/IEC 14443-3, ISO/IEC/JTC1, 1999. [6] ISO/IEC/JTC1 Information technology. Identification cards - contactless integrated circuit(s) cards - proximity cards - part 4:transmission protocol. International standard ISO/IEC 14443-1, ISO/IEC/JTC1, 2000. [7] Nathan O. Sokal and Alan D. Sokal. Class E - a new class of highefficiency tuned single-ended switching power amplifiers. IEEE Journal of Solid-State Circuits, SC-10(3):168–176, June 1975. [8] Frederick H. Raab. Idealized operation of the class E tuned power amplifier. IEEE Transactions on Circuits and Systems, CAS-24(12):725– 735, December 1977. 1977. [9] STMicroelectronics. How to extend the operating range of the crx14 contactless coupler chip. STMicroelectronics Application Note, 2006. [10] Marian Kazimierczuk. Collector amplitude modulation of the class E tuned power amplifier. IEEE Transactions on Circuits and Systems, CAS-31(6), June 1984. [11] IRF510. Datasheet PD-9-325Q, International Rectifier. [12] P. Antognetti and G. Massobio. Semiconductor Device Modeling with Spice. Mc Graw-Hill, 1988. [13] A more realistic characterisation of power MOSFET output capacitance coss . Technical Report AN-1001, International Rectifier. [14] I.J. Bahl and Ramesh Garg. Simple and accurate formulas for a microstrip with finite strip thickness. IEEE Transactions on Microwave Theory and Techniques, MTT-29(10), October 1981. [15] EMC Test Systems (ETS). Users’s Manual Near-Field Probe Set Model 7405. ETS, http://www.emctest.com, EPN399107 edition, January 1999.