Download JF BAI ENGINEERING 3C2 ELECTRICITY AND MAGNETISM

JF BAI ENGINEERING
3C2 ELECTRICITY AND MAGNETISM
SECTION IV: AMPLIFIERS
TUTORIAL PROBLEM SHEET No. 2
2006-07
Q1.
A power amplifier having an output resistance of 10Ω must deliver a power of 5W to
a load of 100Ω. The amplifier has an input resistance of 200kΩ and is fed from a
transducer having an internal resistance of 15kΩ and an open-circuit signal level of
15 mV rms. Determine the gain required in the amplifier and its power conversion
efficiency.
Q2.
An n-channel MOS transistor is operated with a drain-source voltage of 2V. When
the drain source voltage is doubled, while maintaining the gate-source voltage
constant, the drain current increases by 5%. Determine the value of the channel
length modulation factor, , of the transistor.
Q3.
A MOS transistor has fabrication technology parameters µ nCOX = 50µAV-2, VT =
0.5V and λ=0V-1. The manufacturing process allows a minimum dimension of 0.5µm
and all dimensions must be integer multiples of this. A simple common-source
amplifier is to operate with a load resistance of 100kΩ and a bias gate-source
voltage VGS = 1V to provide a gain of 40. Determine the minimum channel
dimensions required in the transistor.
Q4.
The intention in a negative feedback amplifier is to design for an ideal closed-loop
voltage gain AV = 1/β. Given that the actual closed loop gain is AV = AO/(1+AOβ),
derive an expression, reducing it to its simplest form, for the Gain Error, εAv , defined
as:
Av =
Actual Gain – Ideal Gain x 100%
Ideal Gain
Determine the value of the Gain Error, εAv , if AO = 2 x 105, for Ideal Gains of:
(i)
10
(ii)
100
(iii)
1000