Download Lecture 22 Field-Effect Devices: The MOS Capacitor

Lecture 22
ECE 335/1
Lecture 22
Field-Effect Devices: The MOS Capacitor
F. Cerrina
Electrical and Computer Engineering
University of Wisconsin – Madison
Click here for link to F.C. homepage
Spring 1999
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Madison, 1999-II
Lecture 22
ECE 335/1
Topics
• Quantitative relations between gate voltage VG and MOS
carriers
• Focus is on semiconductor potential
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MOS Capacitor
• The field effect is implemented using:
– A gate electrode
– A silicon oxide dielectric insulator
– A semiconductor electrode
• A voltage applied on the gate controls the charge in the
semiconductor
• The voltage is distributed part on the oxide and part on the
semiconductor (series capacitors)
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MOS Band Structure
• In equilibrium EF must be constant
• The gap of the oxide is much larger than that of the semiconductor
• Flat bands model: at VG = 0 there is no band bending
• What happens if we apply a voltage?
– No current flowing: EF remains defined
– Difference between EF is equal to q VG
– Define Surface Potential ψS
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Charging of the MOS capacitor
• The bias voltage shifts up and down the bulk Ei. At the
surface the band edges cannot move. Band bending makes
the bands stretchable
• Assuming flat bands for VG = 0, n-type material (Fig. 16.6)
– VG = 0, nothing happens
– VG > 0, electrons are attracted under the gate → Accumulation
– VG < 0, electrons are repelled, i.e., holes are attracted; bands curve
upward because EF must get closer to EV , → Depletion
– VG = Vi semiconductor becomes “intrinsic” under the gate
– VG = VT semiconductor begins to reverse type, n = p. At this voltage (threshold voltage) the material becomes artificially n-type →
Threshold
– VG > VT semiconducotr is n-type, n > p, under the gate. → Inversion
• The gate voltage controls the semiconductor polarity!
• Also case of n-type, Fig. 16.5
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MOS Capacitor II
• Define bulk and surface potentials:
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ψ = (Ei − Ef )
q
1
(Ei(bulk) − Ei(surf ace))
q
– The sign must be considered carefully and is sometimes
used incorrectly in books; ψ < 0 for n-type, ψ > 0 for
p-type
– The surface potential ψs is the change in potential from
bulk to surface, while the bulk potential is the change in
potential from doped to intrinsic
– Cfr. Fig. 16.7
ψs =
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MOS Band Structure
• As usual carrier density is defined by universal relation:
n = nie(Ef −Ei)/kT = nie−qψ/kt
• At the surface we can write:
EF − Ei(s) = EF − Ei(B) + Ei(B) − Ei(s)
−ψ = −ψbulk + ψs
n=
q
kT
nie (−ψbulk +ψs)
=
q
− kT
ψbulk
nie
q
+ kT
ψs
e
q
+ kT
ψs
n(surf ace) = np0e
q
− kT
ψs
p(surf ace) = pp0e
• This relation is the central relation in the operation of the
MOS
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Charging of the MOS
• Consider a p-type bulk. Hence ψB = (Ei − Ef )/q > 0. We
can distinguish:
– ψs > 0 Accumulation of holes (bands bend up)
– ψs = 0 Flat bands
– ψB > ψs > 0 Depletion (bands bend down)
– ψs = −ψB Intrinsic surface (bands bend down)
– ψs > ψB Inversion (bands bend down)
(-)
Accumulation
0
Depletion
VT
Inversion
(+)
• For ψs = 2ψB we have the transition from depletion to inversion
• Consider Example 16.2
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Delta-depletion Solution
• The main problem is how to find ψs(VG)
• Voltage is divided between depletion layer and oxide:
VG = ψS + Voxide
Qmetal = QSemiconductor
C
VoxCo = CS ψS → Vox = ψs S
Co
s
W (ψ) =
2Ks0
ψS ,
qNA
VG = ψS +
C(ψS ) =
KS
xo
Ko
s
KS 0
W (ψ)
2qNA
ψs
KS 0
• Given VG it is easy to compute ψS
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Charge stages
• Before Inversion: In this stage the gate voltage VG directly
affects the width of the depletion layer:
– No channel of free charge
– Lateral conduction not possible
– Variable depletion layer
• After Inversion: At the surface a thin layer of free carriers is
formed. Further increase in VG increase the amount of free
carriers rather than the depletion layer width
– Channel of free charge
– Lateral conduction possible
– Fixed width of the depletion layer
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Conclusions
• The band structure of the MOS capacitor is controlled by
the gate voltage
• Carrier concentration determined by surface potential
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