Download Lecture 15 P-N Junction Diodes: Part 5 Large signal (complete

Lecture 15
P-N Junction Diodes: Part 5
Large signal (complete model) and small signal
(limited use) models of a Diode
Reading:
Jaeger 3.4-3.14, 13.4, Notes
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ECE 3040 - Dr. Alan Doolittle
Diode Applications: 1/2 Wave Rectifier
id
vs
+
+
vd
-
RLoad
VLoad
vs-vLoad=vd
Id=-Io
vLoad = -Io RLoad
t
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ECE 3040 - Dr. Alan Doolittle
Diode Applications: Peak Detector
id
vs
+
+
-
vd
CLoad
VLoad
vs-vLoad=vd
t
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ECE 3040 - Dr. Alan Doolittle
Diode Applications: 1/2 Wave Rectifier with an RC Load
id
vs
+
-
CLoad
RLoad
VLoad
+
t
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ECE 3040 - Dr. Alan Doolittle
Diode Applications: LED or a Laser Diode
I
Light Emission
under forward Bias
V1=IR
R=1000 ohms
VA
V=9V
Diode made from a direct
bandgap semiconductor.
Quantum well made from
smaller bandgap material
Electron Current
P-type
Al0.5Ga0.5As
-qVA
FP
Hole Current
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GaAs
FN
Light
N-type
Al0.5Ga0.5As
Note: These devices may not be a
simple p-n type diode, but behave
electrically identical to a p-n
junction diode.
Majority Carriers that are injected to the oppposite
side of the diode under forward bias become minority
carriers and recombine. In a direct bandgap material,
this recombination can result in the creation of
photons. In a real device, special areas are used to trap
electrons and holes to increase the rate at which they
recombine. These areas are called quantum wells.
ECE 3040 - Dr. Alan Doolittle
Models used for analysis of Diode Circuits
Mathematical Model (previously developed)
Graphical Analysis
Ideal diode Model
•Treat the diode as an ideal switch
Constant Voltage Drop Model
•Treat as an ideal switch plus a battery
Large signal Model (model used by SPICE transient
analysis)
•multi-components
•generally applicable
Small Signal Model (model used by SPICE AC analysis)
•easier math
•valid only for limited conditions-ie small signals
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ECE 3040 - Dr. Alan Doolittle
Diode Circuits: Graphical Solution
To solve the problem graphically,
we need to find the IV curve for the
resistor:
Intersection of the
two curves gives
the DC operational
voltage and
currents
VA=0V -> I=9V/1000 ohms
ID
I
V1=IR
R=1000 ohms
V=9V
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Load Line
VA
VD
I=0 -> VA=9V
ECE 3040 - Dr. Alan Doolittle
Diode Circuits: Other Models
Besides the direct mathematical solution and the graphical
solution, we can use 2 other models to approximate circuit
solutions:
1.) Ideal Diode Model:
a) The voltage across the diode is zero for forward bias.
b) The slope of the current voltage curve is infinite for
forward bias.
c) The current across the diode is zero for reverse bias.
I
Circuit Symbol
V
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ECE 3040 - Dr. Alan Doolittle
Diode Circuits: Other Models
2.) Constant Voltage Drop (CVD) Model:
a) The voltage across the diode is a non-zero value for
forward bias. Normally this is taken as 0.6 or 0.7 volts.
b) The slope of the current voltage curve is infinite for
forward bias.
c) The current across the diode is zero for reverse bias.
I
Von
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+
-
0.6V
V
ECE 3040 - Dr. Alan Doolittle
Concept of the Small- Signal Model
•Superposition principle allows us to separate DC and AC
analysis of circuits containing active devices (like diodes,
transistors, amplifiers etc...).
•We assume the AC signals are small enough so that the circuit
behaves linearly and can be analyzed by replacing “non-linear”
components by “Linear Elements” such as resistors etc...
•DC analysis is first performed to determine the bias point which
will determine some of the parameters used in the “AC-small
signal analysis”.
•Consider a two terminal device (like a pn diode) at a given DC
operating point (or “Q- point”).
Let: VD = DC voltage applied to the diode
ID = DC current produced by the diode
Total current or voltage = DC part + AC part:
vD = VD + vd
iD = ID + id
Note: (1) all caps = DC; (2) all lower case = AC; (3) lower case
symbol with upper case subscript = total voltage or current
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ECE 3040 - Dr. Alan Doolittle
Small Signal Analysis of Diodes
For small AC voltage
“swings”, vd, about a fixed
DC voltage, VD the diode IV
curve can be approximated as
a resistor (I.e. linear currentvoltage relationship). The
fixed DC operating point,
(VD-ID), is called the bias
point or the quiescent or Qpoint.
Diode Biased in
Forward Bias: Tiny
small signal
resistance, rd.
ID
1
iD=ID+id
3
2
2
2
vD=VD+vd
V1D
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ECE 3040 - Dr. Alan Doolittle
Small Signal Analysis of Diodes
For small AC voltage
“swings”, vd, about a fixed
DC voltage, VD the diode IV
curve can be approximated as
a resistor (I.e. linear currentvoltage relationship). The
fixed DC operating point,
(VD-ID), is called the bias
point or the quiescent or Qpoint.
Diode Biased in
Forward Bias: Tiny
small signal
resistance, rd.
3
3
ID
1
iD=ID+id
3
2
2
2
vD=VD+vd
V1D
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ECE 3040 - Dr. Alan Doolittle
Small Signal Analysis of Diodes
For small AC voltage
“swings”, vd, about a fixed
DC voltage, VD the diode IV
curve can be approximated as
a resistor (I.e. linear currentvoltage relationship). The
fixed DC operating point,
(VD-ID), is called the bias
point or the quiescent or Qpoint.
Diode Biased in
Forward Bias: Tiny
“small signal”
resistance, rd.
3
3
ID
1
iD=ID+id
3
2
2
2
vD=VD+vd
V1D
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ECE 3040 - Dr. Alan Doolittle
Small vs Large Signal Concept For Diodes
Consider the small signal case where
v D (t) = 0.6 + 0.025sin(wt) then,
i D (t) = 1e - 12(e v D (t)/0.0259 - 1)
iD=ID+id
⇒ i d (t) ≈
vD=VD+vd
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0.615
0.0184
0.61
0.0164
0.605
0.0144
0.6
0.0124
0.595
0.0104
0.59
0.0084
Current
Some distortion is
observed because in
this example we have
exceeded the
mathematical limits
valid for small signal
analysis (0.025 is not
<< kT/q). In most
cases, this is tolerable.
Voltage
Both Voltage and
Current are
(approximately) a
sine wave.
1
1
v d (t) but i D (t) ≠ v D (t)
rd
rd
Voltage 0.6V+0.025sin(wt)
I=f(V)
0.585
0.0064
0
10
20
30
40
50
60
70
Time
ECE 3040 - Dr. Alan Doolittle
Small vs Large Signal Concept For Diodes
Consider the Large Signal case where
3
3
v D (t) = 0.6sin(wt) then,
iD=ID+id
2
i D (t) = 1e - 12(e v D (t)/0.0259 - 1)
1
⇒ i D (t) ≠ v D (t)
rd
vD=VD+vd
0.8
0.6sin(wt)
0
0.008
0.006
0.004
0.002
0
10
20
30
40
50
60
70
0
Current
Voltage
Voltage is a sine
0.6
wave but the
0.4
current is
“distorted”
0.2
0.01
I=f(V)
-0.002
-0.2
-0.004
-0.4
-0.006
-0.6
-0.008
-0.8
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-0.01
Time
ECE 3040 - Dr. Alan Doolittle
The transition from valid small signal limits to Large Signal
conditions is a matter of what is acceptable for your requirements
i D (t) = 1e - 12(e v D (t)/0.0259 - 1)
v D (t) = 0.6 + 0.001sin(wt)
0.601
0.009
FFT
0.012
0.008
0.0118
0.6005
0.0116
Current
Voltage
0.01
0.0122
0.6
0.0114
0.5995
Magnitude of Signal
0.6015
0.007
0.006
“No”
Distortion
0.005
0.004
0.003
0.0112
0.002
0.599
0.011
Voltage 0.6V+0.025sin(wt)
0.001
I=f(V)
0
0.5985
0.0108
0
10
20
30
40
50
60
0
70
10
20
30
0.12
0.0164
0.1
0.605
0.0144
0.6
0.0124
0.595
0.0104
0.59
0.0084
Current
Voltage
0.61
0.0184
Voltage 0.6V+0.025sin(wt)
Magnitude of Signal
v D (t) = 0.6 + 0.01sin(wt)
0.615
20
30
40
50
0.04
50
60
70
50
60
70
0
60
0
70
10
20
30
40
Frequency
v D (t) = 0.6 + 0.1sin(wt)
5
0.6
4.5
0.7
0.4
0.6
0
0.55
Current
0.2
-0.2
FFT
4
Magnitude of Signal
0.65
Voltage
70
0.02
Time
0.75
60
Slight
Distortion
0.06
0.0064
10
50
FFT
0.08
I=f(V)
0.585
0
40
Frequency
Time
3.5
3
Major
distortion
2.5
2
1.5
0.5
1
-0.4
0.45
Voltage 0.6V+0.025sin(wt)
I=f(V)
0
0.4
-0.6
0
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10
20
30
40
Time
50
0.5
60
70
0
10
20
30
40
Frequency
ECE 3040 - Dr. Alan Doolittle
Small Signal Analysis of Diodes
g d ≡ small signal conduc tan ce of the diode
rd ≡ small signal resis tan ce of the diode, rd =
gd =
∂i D
∂v D
Bias Po int or "Quiscient " or "Q − po int"
  vD VT

∂  I S  e
− 1


= 
∂v D
I S vD VT
=
e
VT
Q − po int
Q − po int
I S VD VT vd VT
=
e
e
VT
Assu min g small signals, v d 〈〈VT , e
VD
I e
= S
VT
VT
=
ISe
gd =
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1
gd
VD
VT
vd
VT
→ 1 and
− IS + IS
VT
ID + IS
VT
ECE 3040 - Dr. Alan Doolittle
Small Signal Analysis of Diodes

 V A VT
kT
I D = I o  e
− 1 where VT =
q


iD = I D + g d vd
ID + IS
gd =
VT
ID
gd ≈
VT
in General
VA
in Forward Bias
VA >> 0 → I D ≈ I o e
− IS + IS
gd ≈
≈ 0 in Re verse Bias
VT
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VT
VA << 0 →
where VT =
e
VA
VT
kT
q
→0
ECE 3040 - Dr. Alan Doolittle
Small Signal Analysis of Diodes
Diode Biased in
Reverse Bias: Huge
“small signal”
resistance, rd=1/gd
VD
iD=ID+id
vD=VD+vd
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ECE 3040 - Dr. Alan Doolittle
Small Signal Analysis of Diodes:
Application: Diode as an AC variable attenuator
R
vs
rd
C large
enough to be
an AC short
vout
IDC
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ECE 3040 - Dr. Alan Doolittle
Small Signal Analysis of Diodes:
Conversion to AC equivalent circuit
R
vs
rd
R
C large enough
to be an AC
short
vout
ID
rd
vout
C
Steps to Analyze a Diode Circuit
1.) Determine DC operating point and
calculate small signal parameters, rd and
others to come in later lectures)
2.) Convert to the AC only model.
•DC Voltage sources are shorts
•DC Current sources are open circuits
•Large capacitors are short circuits
•Large inductors are open circuits
Georgia Tech
ECE 3040 - Dr. Alan Doolittle
Small Signal Analysis of Diodes:
Application: Diode as an AC variable attenuator
rd
R
vout
vout
vout = vin
1
1+
R
rd
= vin
1
1+
(I DC + I S )R
vout ≈ vin
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rd
= vin
rd + R
or at room temperature
VT
1
1 + 40(I DC + I S )R
ECE 3040 - Dr. Alan Doolittle
Actual voltage drop
across the diode
including resistive
losses from quasineutral regions.
Completing the Large signal model of a diode
iD=IS(exp(v’D/(ηVT)) - 1) where η accounts
vD
v’D
for previously neglected recombinationgeneration in the depletion region
iD=IS(exp[(vD- iDRSeries )/(ηVT)] - 1) accounts
RSeries
for the series resistance drop in the quasineutral regions.
Depletionregion
CJunction
p-region
CDiffusion
ppo
--+ -+
+
-+--+
-+-+
+
npo
x=0
C=
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n
no
+- +- ++- ++- ++
n-region
pno
x=0
dQ
= Change in ch arg e resulting from a change in voltage
'
dv D
ECE 3040 - Dr. Alan Doolittle
Completing the Large signal model of a diode
For an abrupt diode (uniform doping on both sides of the junction):
K sε o A
W
but...
C junction =
W = x p + xn =
C junction
2K S ε o (N A + N D )
(Vbi − V A )
q
NAND
qK S ε o N A N D
1
=A
2 ( N A + N D ) (Vbi − V A )
Thus,
C Jo = C junction
VA =0
qK S ε o N A N D
1
=A
2 ( N A + N D ) (Vbi )
and
CJ =
C Jo
1−
VA
Vbi
Junction capacitance is due to majority carrier charges displaced by the depletion
width (I.e. similar to a parallel plate capacitor).
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ECE 3040 - Dr. Alan Doolittle
Completing the Large signal model of a diode
More generally for a profile with a constant doping on the heavily doped side of
the junction and variable doping profile on the a low doped side that is described
by: N(x)=bxm for all x>0
Kε A
C junction = s o
W
but...
1
 (m + 2 )K S ε o
 (m+ 2 )
(Vbi − V A )
W = x p + xn = 
qb


AK S ε o
C junction =
1
 (m + 2 )K S ε o
 (m+ 2 )
(Vbi − V A )

qb


Thus,
C Jo = C junction
VA =0
=
AK S ε o
1
and
CJ =
C Jo
1
 (m + 2 )K S ε o

 V A  (m+ 2 )
1 −

(Vbi )

qb


 Vbi 
Junction capacitance is due to majority carrier charges displaced by the depletion
width (I.e. similar to a parallel plate capacitor).
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(m+ 2 )
ECE 3040 - Dr. Alan Doolittle
Completing the Large signal model of a diode
C Diffusion =
=
dQD
dv D'
dQD dt
dt dv D'
 vD VT
 − x Lp
 vD VT
 − x Ln
∞



− 1 e
− 1e
QD = qA∫ p no  e
dx + qA∫ n po  e
dx
0
0




'

 vD VT

= e
− 1 p no L p + n po Ln qA


'
dQD
dv D'
1  vD VT 
=
e
 p no L p + n po Ln qA dt
dt
VT 

  vD' V

T

− 1 + 1 
 IS e
dQD
dv D'
1  


p no L p + n po Ln qA
=


dt
VT
IS
dt






Diffusion capacitance due to “excess injected” minority carrier charge at the depletion
region edges. Since this charge results from minority carriers, this capacitance is
negligible at zero or reverse biases.
∞
'
'
[
]
[
]
[
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]
ECE 3040 - Dr. Alan Doolittle
Completing the Large signal model of a diode
1  iD + I S 
dQD
dvD'
=

 pno L p + n po Ln qA
dt
VT  I S 
dt
dQD  iD + I S  pno L p + n po Ln qA dvD'
=

dt
IS
dt
 VT 
[
]
[
[
C Diffusion
where τ t =
[p
[
]
pno L p + n po Ln qA  dvD' dt 
dQD dt


=
= gd
' 
dt dvD'
IS
dt
dv
D 

C Diffusion = g d
C Diffusion = g dτ t
]
pno L p + n po Ln qA dvD'
dQD
= gd
dt
IS
dt
iD=ID+id
iD~ID
]
no
[


−3
2
pno L p + n po Ln qA
 cm cm q cm 
= gd 
 = g d [sec]
q
IS


sec


]
]
L p + n po Ln qA
IS
Unit
analysis
is the transit time or how quickly a carrier can respond
to a change in voltage (physically the carriers have to move across the junction, requiring a finite time to do so)
∂i
or in SPICE , C Diffusion = D τ t
∂vD
Diffusion capacitance due to “excess injected” minority carrier charge at the depletion
region edges.
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ECE 3040 - Dr. Alan Doolittle
Summary of the Large signal model of a diode (SPICE Model)
i D = I S (e
( v D - i D R Series )
ηVT
- 1)
RSeries
C Jo = C junction
CJunction
and
C Diffusion = g d τ t
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CJ =
VA =0
=
AK S ε o
 (m + 2)K S ε o

(
)
V
bi 

qb


C Jo
 VA
1 −
 Vbi



1
(m+ 2 )
1
(m+ 2 )
⇒ f (V A )
1.) Mathematical model
2.) SPICE Model (this page)
3.) Ideal Diode Model
4.) Constant Voltage Drop (CVD) Model
5.) Graphical circuit model
ECE 3040 - Dr. Alan Doolittle
Addition of Capacitance Components
No significant minority carrier
concentration at the depletion
region edges in reverse or smallforward bias => CD<<CJ
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Significant
minority
carrier
concentration
at the
depletion
region edges
in largeforward bias
=> CD>>CJ
ECE 3040 - Dr. Alan Doolittle
Summary of the Small signal model of a diode
iD = I D + g d vd
rd = 1/g d
where
ID + IS
gd =
VT
⇒ f (I D )
RSeries
C Jo = C junction
VA =0
=
CJunction
and
CJ =
AK S ε o
 (m + 2)K S ε o

(
)
V
bi 

qb


C Jo
 VA
1 −
 Vbi



1
(m+ 2 )
1
(m+ 2 )
⇒ f (V A )
C Diffusion = g d τ t ⇒ f (I D )
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ECE 3040 - Dr. Alan Doolittle
Things we have added to account for “Non-ideal” behavior
•Series resistance to account for finite resistance of the quasi-neutral
regions and metal contact resistance's.
•Diode “ideality factor”, η, to account for thermal recombinationgeneration in the depletion region.
•Junction capacitance due to majority carrier charges displaced by
the depletion width (I.e. similar to a parallel plate capacitor).
•Diffusion capacitance due to “excess injected” minority carrier
charge at the depletion region edges. Since this charge results from
minority carriers, this capacitance is negligible at zero or reverse
biases.
Things we still need to add to account for “Non-ideal” behavior
• Reverse “Breakdown” characteristics
•“Breakdown” is a deceptive term because no damage typically
occurs to the device. Often diodes are designed to operate in the
breakdown mode.
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ECE 3040 - Dr. Alan Doolittle
Breakdown Mechanisms
Avalanche Breakdown:
Excess current flows due to
electron-hole pair
multiplication due to impact
ionization. This current
rapidly increases with
increasing reverse bias.
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ECE 3040 - Dr. Alan Doolittle
Breakdown Mechanisms
Zener Breakdown:
Excess current flows due to bonding electrons “tunneling” into empty
conduction band states. The “tunneling barrier” must be sufficiently thin.
This current rapidly increases with increasing reverse bias.
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ECE 3040 - Dr. Alan Doolittle
“Zener” Diodes
Zener diodes may actually operate based on either avalanche or
zener breakdown mechanisms.
Rule of thumb: |VBR|>6EG/q is typically Avalanche Breakdown
Slightly different symbol
I
R
V>VBR
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VBR almost
constant can act
as a high
voltage (~1V 100 V) DC
reference
ECE 3040 - Dr. Alan Doolittle