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The PIC18 Microcontroller
Chapter 1: Introduction to PIC18
The PIC18 Microcontroller
Han-Way Huang
Minnesota State University
University, Mankato
Copyright @ 2005 Thomson Delmar Learning
H. Huang Transparency No.1-1
The PIC18 Microcontroller
What is a computer?
Software
Hardware
Computer Hardware Organization
P ro c e sso r
C o m m o n B us ( addr e s s , data, & c o ntr o l)
C o ntr o l U nit
D atapath
Ar ithm e tic
L o gic U nit
M e m o ry
R e gis te r s
P r o gr am D ata
Sto r age Sto r age
O utput
U nits
Input
U nits
Figur e 1 .1 C o m pute r O r ganizatio n
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H. Huang Transparency No.1-2
The PIC18 Microcontroller
The processor
Th
Registers -- storage locations in the processor
Arithmetic logic unit
Control unit
pprogram
g
counter contains the address of the next instruction to be executed
status register flags the instruction execution result
The microprocessor
A processor implemented on a very large scale integration (VLSI) chip
Peripheral chips are needed to construct a product
The Microcontroller
The processor and peripheral functions implemented on one VLSI chip
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H. Huang Transparency No.1-3
The PIC18 Microcontroller
Features of the PIC18 microcontroller
-
8-bit CPU
-
2 MB program memory space
-
256 bytes to 1KB of data EEPROM
-
Up to 3968 bytes of on-chip SRAM
-
4 KB to 128KB flash program memory
-
Sophisticated timer functions that include: input capture, output compare,
PWM, real-time interrupt, and watchdog timer
-
Serial communication interfaces: SCI,
SCI SPI,
SPI I2C,
I2C and CAN
-
Background debug mode (BDM)
- 10-bit A/D converter
-
M
Memory
protection
t ti capability
bilit
-
Instruction pipelining
-
Operates at up to 40 MHz crystal oscillator
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H. Huang Transparency No.1-4
The PIC18 Microcontroller
Embedded Systems
- A product that uses one or more microcontrollers as controller (s).
- End users are only interested in the functionality of the product but not on
the microcontroller itself.
- Cell phones, home security system, automobiles, and many other products
are examples of embedded products.
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H. Huang Transparency No.1-5
The PIC18 Microcontroller
Semiconductor memoryy
•
•
Random-access memory (RAM): same amount of time is required to access
any location on the same chip
R d l memory (ROM):
Read-only
(ROM) can only
l bbe read
d bbutt nott written
itt tto bby th
the
processor
Random-access memory
•
•
Dynamic random-access memory (DRAM): need periodic refresh
Static random-access memory (SRAM): no periodic refresh is required
Read-only memory
•
•
Mask programmed read-only
Mask-programmed
read only memory (MROM): programmed when being
manufactured
Programmable read-only memory (PROM): can be programmed by the end
user
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H. Huang Transparency No.1-6
The PIC18 Microcontroller
Erasable programmable ROM (EPROM)
1. electrically programmable many times
2. erased by ultraviolet light (through a window)
3 erasable
3.
bl in
i bulk
b lk (whole
( h l chip
hi in
i one erasure operation)
ti )
Electrically erasable programmable ROM (EEPROM)
1. electrically programmable many times
2. electrically erasable many times
3. can be erased one location, one row, or whole chip in one operation
Flash memory
1. electrically programmable many times
2. electrically erasable many times
3. can only be erased in bulk (either a block or the whole chip)
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H. Huang Transparency No.1-7
The PIC18 Microcontroller
Computer software
-
Computer programs are known as software
A program is a sequence of instructions
Machine instruction
-
A sequence of binary digits which can be executed by the processor
Hardd to understand,
d
d program, andd debug
d b for
f human
h
being
b i
Assembly language
-
Defined by assembly instructions
An assembly instruction is a mnemonic representation of a machine
instruction
A
Assembly
bl programs mustt be
b translated
t
l t d before
b f
it can be
b executed
t d -translated by an assembler
Programmers need to work on the program logic at a very low level and can’t
achieve high
g pproductivity.
y
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H. Huang Transparency No.1-8
The PIC18 Microcontroller
High-level language
-
Syntax of a high-level language is similar to English
A translator is required to translate the program written in a
high-level language -- done by a compiler
Allows the user to work on the program logic at higher level.
Source code
-
A program written in assembly or high-level language
Object code
-
The output of an assembler or compiler
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H. Huang Transparency No.1-9
The PIC18 Microcontroller
Source code and object code examples
address
object
j code
line no.
Source code
---------------------------------------------------------------------------------------------00001E
0E06
00010
movlw
0x06
000020
6E11
00011
movwf
0x11,A
,
000022
0E07
00012
movlw
0x07
000024
6E12
00013
movwf
0x12,A
0000266
0000
00E08
08
00014
000
movlw
ov w
00x08
08
000028
6E13
00015
movwf
0x13,A
00002A
0E05
00016
movlw
0x05
00002C
5E10
00017
subwf
0x10,F,A
00002E
5E11
00018
subwf
x11,F,A
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H. Huang Transparency No.1-10
The PIC18 Microcontroller
Radix Specification
p
- Hexadecimal (or hex) number is specified by adding the prefix 0x or by
enclosing the number with single quotes and preceding it by an H.
- 0x02,
0x02 0x1234,
0x1234 H
H`2040’
2040’ are hex numbers
- Decimal numbers are enclosed by single quotes and preceded by letter D.
- D`10’ and D`123’ are decimal numbers
- Octal and binary numbers are similarly specified.
- O`234’ is an octal number; B’01011100’ is a binary number.
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H. Huang Transparency No.1-11
The PIC18 Microcontroller
Memory Addressing
-
Memory consists of a sequence of directly addressable locations.
A llocation
i is
i referred
f
d to as an information
i f
i unit.
i
A memory location can be used to store data, instruction, and the status of
peripheral devices.
A memoryy location has two components:
p
an address and its contents.
Address
Contents
Figure 1.2 The components of a memory location
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H. Huang Transparency No.1-12
The PIC18 Microcontroller
The PIC18 Memory Organization
-
Data Memory and Program Memory are separated
-
Separation of data memory and program memory makes possible the
simultaneous access of data and instruction.
-
Data memory are used as general-purpose registers or special function registers
-
On-chipp Data EEPROM are pprovided in some PIC18 MCUs
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H. Huang Transparency No.1-13
The PIC18 Microcontroller
Separation of Data Memory and Program Memory
Inside the c chip
Program
Memory
Space
(a portion
of this
space is on
th c
the
chip)
12-bit register address
21-bit progam address
PIC18
CPU
16-bit instruction bus
8-bit data bus
Data
Memory
Space
(Special
function
registers and
generall
purpose
RAM)
Figure 1.3 The PIC18 memory spaces
Copyright @ 2005 Thomson Delmar Learning
H. Huang Transparency No.1-14
The PIC18 Microcontroller
PIC18 Data Memory
- Implemented in SRAM and consists of general-purpose registers and
special-function registers. Both are referred to as data registers.
- A PIC18
C 8 MCU
CU may
ay have
ave up to 4096
096 bytes oof data memory.
e o y.
- Data memory is divided into banks. Each bank has 256 bytes.
- General-purpose registers are used to hold dynamic data.
- Special-function registers are used to control the operation of peripheral
functions.
- Only one bank is active at any time. The active bank is specified by the BSR
register.
register
- Bank switching is an overhead and can be error-prone
- PIC18 implements the access bank to reduce the problem caused by bank
switching.
- Access bank consists of the lowest 96 bytes and the highest 160 bytes of the
data memory space.
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H. Huang Transparency No.1-15
The PIC18 Microcontroller
BSR<3:0>
= 0000
= 0001
= 0010
= 0011
Access RAM
Bank 0
Bank 1
GPRs
000h
05Fh
060h
0FFh
100h
GPRs
1FFh
200h
Bank 2
GPRs
2FFh
300h
Bank 3
Access Bank
GPRs
A
Access
RAM llow
3FFh
400h
Bank 4
to
B k 13
Bank
= 1110
= 1111
Access RAM high
SFRs
000h
05Fh
060h
0FFh
GPRs
DFFh
E00h
Bank 14
GPRs
Unused
Bank 15
SFRs
EFFh
F00h
F5Fh
F60h
FFFh
Note. 1. BSR is the 4-bit bank select register.
Figure 1.4 Data memory map for PIC18 devices (redraw with permission of Microchip)
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H. Huang Transparency No.1-16
The PIC18 Microcontroller
Program Memory Organization
- The program counter (PC) is 21-bit long, which enables the user program to
access up to 2 MB of program memory.
- The PIC18 has a 31-entry return address stack to hold the return address for
subroutine call.
- After power-on, the PIC18 starts to execute instructions from address 0.
- The location at address 0x08 is reserved for high-priority interrupt service
routine.
- The location at address 0x18 is reserved for low
low-priority
priority interrupt service
routine.
- Up to 128KB (at present time) of program memory is inside the MCU chip.
- Part
P t off the
th program memory is
i located
l t d outside
t id off the
th MCU chip.
hi
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H. Huang Transparency No.1-17
The PIC18 Microcontroller
P C < 2 0 :0 >
21
s ta c k le v e l 1
.
.
.
s ta c k le v e l 3 1
000000
h
H ig h P r io r ity I n te r r u p t V e c to r
000008h
L o w P r io r ity I n te r r u p t V e c t o r
000018h
O n - c h ip a n d e x te r n a l
p ro gra m m e m o ry
y x x xx x h
User Memory
y Space
R e s e t V e c to r
U n im p le m e n t e d
p ro gra m m e m o ry
R e a d '0 '
1FFFFFh
N o te . y c a n b e 0 o r 1 w h e re a s x c a n b e 0 -F
F ig u r e 1 . 5 P I C 1 8 P r o gr a m m e m o r y O r g a n iz a tio n ( r e d r a w w ith p e r m is s io n o f
M ic r o c h ip )
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H. Huang Transparency No.1-18
The PIC18 Microcontroller
The PIC18 CPU Register
- The group of registers from 0xFD8 to 0xFFF are dedicated to the general
control of MCU operation.
- The
h CPU registers
i
are listed
li d in
i Table
bl 1.2.
- The WREG register is involved in the execution of many instructions.
- The STATUS register holds the status flags for the instruction execution and is
shown in Figure 1.6.
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H. Huang Transparency No.1-19
Copyright @ 2005 Thomson Delmar Learning
TOSU
TOSH
TOSL
STKPTR
PCLATU
PCLATH
PCL
TBLPTRU
TBLPTRH
TBLPTRL
TABLAT
PRODH
PRODL
IN TCON
INTCON 2
INTCON 3
IN DF0 (1)
POSTINC0 (11)
POSTDEC0 ( 1)
PREINC0 (1))
PLUSW 0 (1)
FSR0H
FSR0L
W REG
IN DF1 (1)
POSTINC1 (11)
POSTDEC1 ( 1)
PREINC1 (1))
PLUSW 1 (1)
FSR1H
FSR1L
BSR
IN DF2 (1)
POSTINC2 (11)
POSRDEC2 ((1)
PREINC2 (1))
PLUSW 2 (1)
FSR2H
FSR2L
STATUS
Description
n
Top of staack (upper)
Top of staack (high)
Top of staack (low )
Stack poi nter
Upper prrogram counteer latch
High pro gram counter latch
Program counter low bbyte
Table poiinter upper byyte
Table poiinter high bytee
Table poiinter low byte
Table latcch
High pro duct register
duct register
Low prod
Interrupt control registter
Interrupt control registter 2
Interrupt control registter 3
Indirect f ile register poointer 0
Post increem ent pointer 0 (to GPRs)
Post decr em ent pointerr 0 (to GPRs)
Preincrem
m ent pointer 0 (to GPRs)
Add W RE
EG to FSR0
File selectt register 0 hi gh byte
File selectt register 0 low
w byte
W orking register
Indirect f ile register poointer 1
Post increem ent pointer 1 (to GPRs)
Post decr em ent pointerr 1 (to GPRs)
m ent pointer 1 (to GPRs)
Preincrem
Add W RE
EG to FSR1
File selectt register 1 hi gh byte
File selectt register 1 low
w byte
Bank seleect register
Indirect f ile register poointer 2
Post increem ent pointer 2 (to GPRs)
Post decr em ent pointerr 2 (to GPRs)
m ent pointer 2 (to GPRs)
Preincrem
Add W RE
EG to FSR2
File selectt register 2 hi gh byte
File selectt register 2 low
w byte
Status reggoster
N ote 1. This is not a physsical regiser
0xFFF
0xFFE
0xFFD
0xFFC
0xFFB
0xFFA
0xFF9
0xFF8
0xFF7
0xFF6
0xFF5
0xFF4
0xFF3
0xFF2
0xFF1
0xFF0
0xFEF
0xFEE
0xFED
0xFEC
0xFEB
0xFEA
0xFE9
0xFE8
0xFE7
0xFE6
0xFE5
0xFE4
0xFE3
0xFE2
0xFE1
0xFE0
0xFDF
0xFDE
0xFDD
0xFDC
0xFDB
0xFDA
0xFD9
0xFD8
Table 1.2 PIC
T
C18 CPU reg isters
address
N am e
The PIC18 Microcontroller
H. Huang Transparency No.1-20
--
--
--
5
N
4
OV
3
Z
2
DC
1
Copyright @ 2005 Thomson Delmar Learning
C
0
Figure 1.6 Thhe STATUS register (0xFD8) (reddraw with permisssion of Microchiip)
occcurred.
For boorrow, the polaritty is reversed. For rotate (RRF, RL
LF)
instrucctions, this bit is loaded with eitheer the high or low
w order bit
of the source register.
DC: Digiit carry/borrow biit
For AD
DDWF, ADDLW
W, SUBLW, SUB
BWF instructions..
1 = A carry-out from thhe 4th low-order bit of the result ooccurred.
0 = Noo carry-out from the 4th low-orderr bit of the result occurred.
For boorrow, the polaritty is reversed. For rotate (RRF, RL
LF)
instrucctions, this bit is loaded with eitheer the bit 4 or bit 3 of the
sourcee register.
C: Carry//borrow bit
For AD
DDWF, ADDLW
W, SUBLW, SUB
BWF instructions..
1 = A carry-out from thhe most significannt bit of the resullt occurred.
0 = Noo carry-out from the most significant bit of the resuult has
N: Negattive bit
1 = ariithmetic result is negative
0 = ariithmetic result is positive
OV: Oveerflow bit
1 = Ovverflow occurredd for signed arithm
metic
0 = Noo overflow occurrred
Z: Zero fflag
1 = Thhe result of an ariithmetic or logic ooperation is zero.
0 = Thhe result of an ariithmetic or logic ooperation is not zzero.
6
7
The PIC18 Microcontroller
H. Huang Transparency No.1-21
The PIC18 Microcontroller
The PIC18 Pipelining
p
g
- The PIC18 Divide most of the instruction execution into two stages: instruction
fetch and instruction execution.
- Up to two instructions are overlapped in their execution.
execution One instruction is in
fetch stage while the second instruction is in execution stage.
- Because of pipelining, each instruction appears to take one instruction cycle to
complete.
complete
MOVLW 55h
TCY0
TCY1
fetch 1
execute 1
fetch 2
MOVWF PORTB
TCY2
TCY4
execute 3
fetch 4
BSF PORTA,BIT3
TCY5
execute 2
fetch 3
BRA sub_1
TCY3
Instruction @address sub_1
flush
fetch sub_1
execute
sub_1
Note: All instructions are single cycle, except for any program branches.
Figure 1.7 An example of instruction pipeline flow
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H. Huang Transparency No.1-22
The PIC18 Microcontroller
Instruction Format
- Format for byte oriented instructions
15
10
opcode
9
8
d
a
7
0
f
d = 0 for result destination to be WREG register.
d = 1 for result destination to be file register (f)
a = 0 to force Access Bank
a = 1 for BSR to select bank
f = 8-bit file register address
Figure 1.8 Byte-oriented file register operations (redraw with permission of
Microchip)
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H. Huang Transparency No.1-23
The PIC18 Microcontroller
Byte-to-byte Operations
12 11
15
0
opcode
15
f (source file register)
12 11
0
1111
f (destination file register)
f = 12-bit file register address
Figure 1.9 Byte to byte move operations (2 words) (redraw with permission of Microchip)
Bit-oriented file register operations
15
opcode
9
12 11
b
8
a
7
0
f
b = 3-bit position of bit in the file register (f).
a = 0 to force Access Bank
a = 1 for BSR to select bank
f = 8-bit file register address
Figure 1.10
1 10 Bit-oriented
Bit oriented file register operations (redraw with permission of
Microchip)
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H. Huang Transparency No.1-24
The PIC18 Microcontroller
Literal operations
- A literal is a number to be operated on directly by the CPU
15
8
opcode
7
0
k
k = 8-bit immediate value
Figure 1.11 Literal operations (redraw with permission of Microchip)
Control operations
- These instructions are used to change the program execution sequence and
making subroutine calls.
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H. Huang Transparency No.1-25
The PIC18 Microcontroller
15
8
7
0
opcode
n<7:0> (literal)
15
8
1111
7
0
GOTO label
n<19:8> (literal)
n = 20-bit immediate value
15
8
opcode
7
0
S
15
8
1111
n<7:0> (literal)
7
0
CALL funct_name
n<19:8> (literal)
S = fast bit
15
11 10
0
opcode
15
n<10:0> (literal)
8
7
opcode
BRA label
0
n<7:0> (literal)
BC label
Figure 1.12 Control operations (redraw with permission of Microchip)
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H. Huang Transparency No.1-26
The PIC18 Microcontroller
Access Bank
- In Figures 1.8 to 1.12, PIC18 uses 8 bits to specify a data register (f field).
- Eight bits can specify only 256 registers.
- This limitation forces the PIC18 to divide data registers (up to 4096 bytes) into
banks.
- Onlyy one bank is active at a time.
- When operating on a data register in a different bank, bank switching is
needed.
- Bank switching incurs overhead and may cause program errors.
errors
- Access bank is created to minimize the problems of bank switching.
- Access bank consists of the lowest 96 bytes in general-purpose registers and the
highest 160 bytes of special function registers.
- When operands are in the access bank, no bank switching is needed.
Copyright @ 2005 Thomson Delmar Learning
H. Huang Transparency No.1-27
The PIC18 Microcontroller
Examples of the Use of Access Bank
1. addwf 0x20,F,A
; add the data register at 0x20 in access bank with WREG
; register and store the sum in 0x20.
2 subwf 0x30,F,BANKED
2.
0x30 F BANKED ; subtract the value of WREG from the data register
; 0x30 in the bank specified by the current contents
; of the BSR register. The difference is stored in
; data register 0x30.
33. addwf
dd f 0x40,W,A
0 40 W A ; add
dd the
h WREG register
i
with
i h data
d register
i
at 0x40
0 40 in
i
; access bank and leaves the sum in WREG.
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H. Huang Transparency No.1-28
The PIC18 Microcontroller
PIC18 Addressing Modes
- Register direct: Use an 8-bit value to specify a data register.
movwf 0x20,A
; the value 0x20 is register direct mode
- Immediate Mode : A value in the instruction to be used as an operand
addlw 0x10
; add hex value 0x10 to WREG
movlw 0x30
; load 0x30 into WREG
- Inherent Mode: an implied operand
andlw 0x3C
; the operand WREG is implied
daw
; the operand WREG is implied
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H. Huang Transparency No.1-29
The PIC18 Microcontroller
- Indirect Mode: A special function register (FSRx) is used as a pointer to
the actual data register.
Format
INDFx
Example
x = 0,
0 1,
1 2
movwf
INDF0
POSTINCx
movff
POSTINC0,PRODL
POSTDECx
movf
POSTDEC0,W
PREINCx
addwf
PREINC1,F
PLUSWx
movff
PLUSW2,PRODL
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The PIC18 Microcontroller
PIC18 Instruction Examples
p
Data Movement Instruction
lfsr
FSR1,0xB00
; place the value 0xB00 in FSR1
movf
PRODL,W
; copy PRODL into WREG
movff
0x100,0x300
; copy data register 0x100 to data register 0x300
movwf PRODL,A
; copy WREG to PRODL
swapf
PRODL,F
; swap the upper and lower 4 bits of PRODL
movb
3
; load 3 into BSR
movlw 0x10
; WREG  0x10
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H. Huang Transparency No.1-31
The PIC18 Microcontroller
Add Instructions
addwf
0x20,F,A
; add data register and WREG and place sum in WREG
addwfc
dd f
PRODL W A
PRODL,W,A
; add
dd WREG,
WREG PRODL,
PRODL and
d carry and
d lleave sum
; in WREG
addlw
0x5
; increment WREG byy 5
Subtract Instructions
subfwb
PRODL F
PRODL,F
; PRODL  [WREG] – [PRODL] – borrow flag
subwf
PRODH,W
; WREG  [PRODH] – [WREG]
subwfb
0x10,F,A
; 0x10  [0x10] – [WREG] – borrow flag
sublw
0x10
; WREG  0x10 – [WREG]
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H. Huang Transparency No.1-32
The PIC18 Microcontroller
RISC
CISC
Simple instruction set
Complex instruction set
R l andd fixed
Regular
fi d instruction
i t ti format
f
t
Irregular instruction format
Simple address modes
Complex address modes
Pipelined instruction execution
May also pipeline instruction execution
Separated data and program memory
Combined data and program memory
Most operations are register to register
Most operations can be register to memory
Take shorter time to design and debug
Take longer time to design and debug
Provide large number of CPU registers
Provide smaller number of CPU registers
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H. Huang Transparency No.1-33