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ELEC 225L
Circuit Theory I Laboratory
Fall 2010
Lab #3: Inverting Amplifier with T-Bridge Feedback Network
Introduction
Op-amps are versatile electronic devices and are employed in a wide range of applications in
both analog and digital circuitry. One of these is high-gain analog amplification. The use of
negative feedback makes possible the design of stable high-gain amplifiers, which is a difficult
task with other electronic amplifying devices. Even so, care must be taken to limit the sensitivity
of the feedback network to environmental conditions. The T-bridge amplifier circuit was
developed to address this requirement. In this lab experiment you will build one of these
amplifiers and investigate its robustness with regard to changing environmental conditions.
Theoretical Background
To achieve high gain in a standard op-amp inverting amplifier, like the one shown in Figure 1,
the feedback resistor R2 must have a very large value, especially if the input resistance (set by
resistor R1) has to be relatively large. The use of large resistors to control gain can pose a
problem if there is stray resistance or capacitance in parallel with the feedback resistor. Such
stray impedances, which could be the result of dirt, moisture, or other environmental conditions,
can lower the effective impedance of the feedback path. The problem can be avoided by
employing a T-shaped network made of resistors with comparatively smaller values. An
example of an inverting amplifier with a T-bridge feedback network is shown in Figure 2 on the
next page. A “bridge” circuit is simply one that connects one “significant” node to another; a
“significant” node might be an input terminal, an output terminal, or a node whose voltage must
be monitored.
R2
+15 V
C1
R1
vin
+
−
vo
−
s
+
d
C2
RL
−15 V
Figure 1. Standard inverting amplifier built around an op-amp. The triangle
symbols indicate connections to the circuit ground (the reference node). The
voltage source labeled “vin” is a Thévenin equivalent circuit that represents the
device connected to the input of the amplifier (such as a sensor). Typically, the
source has a Thévenin equivalent resistance much lower than the input resistance
of the amplifier (i.e., Rth << R1), so Rth is not indicated on the diagram. Capacitors
C1 and C2 are connected from the power supply inputs to ground as close as
possible to the op-amp. Their purpose is to suppress oscillation (instability due to
positive feedback at high frequencies).
1
R2
vB
RA
RB
+15 V
R1
C1
vn
vo
−
vin
+
−
+
C2
RL
2
−15 V
Figure 2. Inverting amplifier with a T-bridge feedback network.
The T-bridge circuit is easily analyzed (as are most op-amp circuits) by using nodal analysis.
Because the circuit has negative feedback, we can assume that a virtual short exists across the
op-amp’s input terminals. Therefore, the node voltage at the inverting input (node vn) must be
0 V. Application of Kirchhoff’s current law (KCL) at the inverting input node yields
vin  0 0  v B

,
R1
R2
which simplifies to
vB  
R2
vin ,
R1
where we have made use of the fact that essentially zero current flows into the input terminals of
the op-amp. At the node marked vB, KCL leads to
0  v B 0  v B vo  v B


 0,
R2
RB
RA
which becomes
R

R
vo   A  A  1v B .
 R2 RB

Substitution of the expression for vB into the expression for vo yields the expression for the
voltage gain of the amplifier,
R
R
vo
R
  A  A  1 2 .
vin
 R2 RB
 R1
Comparison of this gain formula to the one for the simple inverting amplifier,
vo
R
 2 ,
vin
R1
illustrates that substantially higher gain can be achieved using smaller resistor values with the
T-bridge circuit than with the standard circuit.
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Experimental Procedure
1. Design and assemble a standard inverting amplifier circuit like the one shown in Figure 1
using an LM741 op-amp. The amplifier should have a closed-loop voltage gain of –60
(5%) and an input resistor (R1) of 150 k (5%). Use power supply voltages of ±15 V, and
use the nearest standard values for all required resistor values. That is, do not combine
multiple resistors in series and/or parallel to achieve an exact resistance value. Let the load
resistance (RL) be infinite (an open circuit) for now. The values of capacitors C1 and C2 are
not critical, but they should be in the 0.1-0.5 F range.
2. Apply a sinusoidal voltage at a frequency of approximately 1 kHz to the input of the
amplifier (i.e., in place of vin). Note that you will have to use a small-amplitude input signal
to avoid driving the amplifier into saturation (i.e., to avoid clipping in the output voltage
waveform). The voltage-divider circuit shown in Figure 3 can be used for this purpose.
Adjust the function generator’s amplitude control so that the output voltage from the op-amp
is approximately 10 Vpp. Connect channels 1 and 2 of the oscilloscope to the input and
output terminals of the amplifier (i.e., at the vin and vo nodes) so that you can monitor the
voltages and measure the voltage gain. Verify that the closed-loop gain is 60.
Function
Generator
output
jack
(Rth = 50 )
5.1 k
51 
+
vin
−
to left side of R1
to ref. node
Figure 3. A voltage-divider circuit to provide a 100:1 reduction in the Thévenin
equivalent voltage of the function generator. Remember that the voltage
displayed on the function generator is half of the actual Thévenin equivalent
voltage of the generator. The Thévenin equivalent resistance of the
generator/attenuator combination is close to 50 .
3. Once you have the circuit operating properly, touch the two ends of the feedback resistor (R2)
with two fingers from one hand and note any effects it has on the output voltage waveform as
displayed on the oscilloscope. What do you think is causing the effects you see? Be
specific.
4. Next, place your fingers across the input resistor (R1). Explain any effects you see.
5. Obtain screen captures of the output waveform with and without your fingers placed across
the two resistors (four images total). Save the screen images for use in the written report.
Remember to identify which trace (channel) is vin and which is vo in each image. Instructions
for capturing screen images on the oscilloscope are available at the lab web site.
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6. Demonstrate to the instructor or TA your working standard inverter circuit. Show him/her
what happens when you place your fingers across each resistor.
7. Now design and build the T-bridge circuit shown in Figure 2 to have a gain as close as
possible to –60 and an input resistance of 150 k. To avoid problems due to noise, the value
of RB should be at least 1 k or so. Again, use single resistors everywhere; use power supply
voltages of ±15 V; leave RL as an open circuit; and apply the same small-amplitude
sinusoidal input signal at a frequency of around 1 kHz that you used for the standard inverter.
8. Once again, place two fingers from one hand across each of the three resistors in the
feedback network. Describe and explain any effects you see, and compare them with those
you observed with the standard inverting amplifier. Highlight any notable differences.
9. Place your fingers across the input resistor. Explain any significant effects you see. You do
not have to capture any screen images for the T-bridge inverter.
10. Demonstrate to the instructor or TA your working T-bridge inverter circuit. Show him/her
what happens when you place your fingers across the various resistors.
11. Increase the amplitude of the function generator’s signal until approximately half of the
waveform is clipped. Capture the screen image, and determine the positive and negative
clipping levels for your amplifier. How far is each level from its corresponding power
supply voltage? Mathematically determine the maximum value that vin can have without
clipping occurring at either the top or the bottom of the output waveform, assuming that the
closed-loop voltage gain is exactly 60.
Grading
Each group should submit their results and the answers to the questions posed in this handout in
a clear, concise, and professional narrative. The report does not have to be word-processed, but
it should be easy to follow and as neat and well organized as possible with the context for each
question included. The report should be written as if you were describing to another professor
what you did in lab. Pay especially close attention to the issues addressed in the “Lab Report
Guidelines” available on the lab web site. The report is due at noon on Thursday, Oct. 7 in Dana
301 (the EE main office). Each group member will receive the same grade, which will be
determined as follows:
40%
10%
10%
20%
20%
Report – Completeness and technical accuracy, with all questions answered
Report – Organization, neatness, and style (professionalism)
Report – Spelling, grammar, and punctuation
First Demonstration (standard inverter circuit)
Second Demonstration (T-bridge inverter circuit)
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