Download Exercise 15_Revision on Transistor(II)

Exercise 15--Revision on Transistor ( II)
93’ MC
The input is a sinusoidal voltage with a peak value of 1.5 V and a mean value of
40.
zero.
+6V
Which one of the following waveforms best represents the
variation of the output voltage with time?
Vout / V
A.
2k
6
15 k 
4
Vout
Vin
2
0
0V
1
2
Vin / V
The above diagrams show an NPN transistor circuit and its input/output
voltage characteristic.
B.
What is the current amplification factor of the
transistor?
A.
10
B.
30
C.
60
D.
75
E.
150
C.
D
92’MC
D.
30.
8
IC /mA
6
IB = 120  A
4
IB = 80  A
2
IB = 40  A
E
E.
V CE /V
The graphs show the characteristics for a transistor operating in the
common emitter mode. IC is the collector current, IB is the base current
and VCE is the potential difference between the collector and emitter.
The current gain for this transistor is
91’ MC
A.
20
43.
B.
50
C.
80
D.
100
E.
150
B
+6 V
2.2 k 
15 k 
31. The graph shows the transfer characteristic of an electronic device.
V in
V out
0V
output
voltage/V
+4
An n-p-n transistor is used in the above circuit as a pulse shaper or a
+3
+2
squarer.
+1
V and -2 V is applied to the input, what will be the output voltage?
-4 -3 -2 -1 0 1 2 3
input voltage / V
When a sinusoidal voltage whose magnitude varies between +2
4
1
A.
Vout
6V
C.
5 mA
D.
50 mA
E.
500 mA
87’ MC
A
43. A NPN transistor is operated as a linear voltage amplifier and the output
voltage is displayed on a CRO screen as shown:
time
0
B.
A
RL
Vout
6V
Rb
0
time
V out
V in
1.5 V
-6 V
V out
C.
V pp
3V
Vout
V dc
3V
0
0
time
time
What changes will occur when RL is slightly increased?
-3 V
Vdc
D.
Vout
2V
0
time
Vpp
A.
decreases
increases
B.
decreases
decreases
C.
increases
increases
D.
increases
decreases
E.
no change
increases
86’ MC
E.
43.
Vout
X
A
2V
0
time
R
-2 V
3V
b
c
6V
S
e
90 MC
39.
Y
+5 V
In the above circuit, the sliding contact S is moved between X and Y to
give different voltages across ce. Which of the following graphs best
1 k
represents the variation of the collector current Ic with the voltage Vce
10 k 
across the emitter and the collector?
A.
0
Ic
The circuit above shows an NPN transistor and two resistors 10 k and 1
k connected to a 5 V d.c. supply.
The current gain of the transistor is
100. What is the value of the collector current?
A.
5 A
B.
500 A
C
0
V ce
2
B.
E.
6V
6V
91 MC
Ic
43.
+6 V
2.2 k 
0
V ce
15 k 
C.
V out
V in
Ic
0V
An n-p-n transistor is used in the above circuit as a pulse shaper or a
squarer.
When a sinusoidal voltage whose magnitude varies between +2
V and -2 V is applied to the input, what will be the output voltage?
0
V ce
E
A.
D.
Vout
6V
Ic
time
0
B.
0
V ce
Vout
0
E.
time
Ic
-6 V
C.
0
Vout
V ce
3V
44.
0
time
+6 V
-3 V
R
R
R
R
D.
Input 1
Vout
R
Input 2
V
2V
0
0V
In the above circuit, the reading of the voltmeter is zero.
the voltages applied at Input 1 and Input 2 respectively?
Input 1
Input 2
A.
0V
0V
B.
0V
6V
C.
3V
3V
D.
6V
0V
83’ MC
time
What should be
E.
Vout
A
2V
0
time
-2 V
30.
3
observed on the CRO.
(d) If the amplitude of the superimposed sinusoidal voltage is
L1
E
L2
increased to 1.5 V (Figure 11.3), sketch on the same diagram
the corresponding variations in output voltage, as observed
E1
E2
on the CRO.
The diagram shows a transistor circuit with two similar light bulbs
L1 and L2.
output voltage / V
6
The bulb L2 lights up brightly, but L1 does not glow at
all.
Which of the following could be a possible reason for this?
A.
The filament of L1 is burnt out.
B.
The cell E1 should be connected the other way round.
C.
The cell E2 should be connected the other way round.
D.
The collector current is very much less than the emitter
4
2
E.
time
0
current.
The base current is very much less than the emitter current.
90 IIB
-2
11. (a) Draw a diagram of a circuit you could use to find the input
voltage Vi/output voltage Vo characteristic of an NPN
-4
transistor in the common-emitter configuration.
(3 marks)
(b)
-6
Vo / V
Figure 11.2
output voltage / V
6
6
4
4
2
2
0
1
1.5
2
3
Figure 11.1
-2
The results obtained are shown in Figure 11.1.
Suppose the
circuit in this experiment is to be used as an alternating
voltage amplifier.
suitable value.
(i)
-4
The input voltage must first be fixed at a
Use the graph in Figure 11.1 to
-6
choose the most suitable value for this fixed input
Figure
11.3
(2 marks)
voltage, giving an explanation, and
(ii)
time
0
V1 / V
determine the voltage amplification.
-6
(2 marks)
(c) A sinusoidal voltage of amplitude 0.4 V is now superimposed
on the fixed input voltage.
The input and output voltages
are then observed on a CRO set in AC mode.
voltage is shown in Figure 11.2.
The input
On the same diagram,
sketch the corresponding variations in output voltage as
89 IIB
11. Consider the transistor circuit in Figure 11.1 which has an
4
input-output characteristic curve as shown in Figure 11.2.
(i)
+6 V
Sketch on Figure 11.5 the variation of the potential at
point I with respect to time, from time
= 0 to a time
later than t3.
2.2 k 
(ii)
15 k 
With the help of the input-output characteristic curve,
sketch on Figure 11.6 the corresponding variation of
output
the output potential at O against time.
input
potential at I
6V
Figure 11.1
time
0
Vout /V
t1
t2
t3
6
-6V
4
Figure 11.5
2
potential at O
V in /V
0
0.5
1
1.5
6V
Figure 11.2
time
0
(a) Account for the shape of the characteristic curve.
(b) Suppose the transistor circuit shown in Figure 11.1 is
(3 marks)
t1
t2
t3
symbolically represented by Figure 11.3.
input
output
Figure 11.6
Figure 11.3
on
6V
S
C
I
O
off
R
Figure 11.4
The transistor circuit is now connected to an RC circuit, as
shown, with the capacitor initially uncharged.
Now at time
= t1, S is switched from the OFF position to the ON position.
S stays at the ON position from time = t1 to time = t3.
At
time = t3, S is switched back to the OFF position and remains
there.
It is found that at time = t2, the potential at point I has
dropped below 1 V.
5
1.0
88 IIB
11.
0.5
signal
voltage
from
signal
generator / V
+6 V
1 k
R1
10F
input
10 F
output
15 k
V in
V out
R2
time
0
- 0.5
0V
- 1.0
Figure 11.3
Figure 11.1
Vout / V
6
(d) Estimate the current gain () of the transistor within the
linear region.
4
(e)
2
t1
0
0.5
1.0
1.5
Vin / V
output
signal
voltage
Figure 11.2
A
time
Figure 11.1 shows a simple amplifier circuit which consists of a
NPN silicon transistor.
A'
B
B'
The input/output voltage characteristic of
t2
the transistor is shown in Figure 11.2.
Figure 11.4
(a) The circuit is designed in such a way that, without any input
signal, the d.c. potential at the collector of the transistor (Vout)
(i)
When the input signal voltage from the signal
is 3 V.
generator is gradually increased, the output signal
(i) Explain the advantage of setting the collector voltage at
voltage appears in the form shown in Figure 11.4.
this value.
Explain why this should happen.
(ii)
(ii)
Estimate (2
themarks)
p.d. between the collector and the
Assuming that the base current is negligible, what is
emitter (VCE) and the collector current (IC) during
the ratio of resistances R1 to R2?
time interval
(2 marks)
t1 and t2 when the voltage curve appears
’flat’.
(b) An input signal from a signal generator is fed into the
Give your answers in the table below.
amplifier via a 10 F capacitor. Explain the use of such a
large value capacitor.
Time interval
(c) Suppose the signal generator superposes on Vin a voltage
varying between 0.1 V as shown in Figure 11.3.
Making
(2 marks)
VCE
IC
t1
________
________
t2
________
________
use of Figure 11.2, sketch on Figure 11.3 the expected
variation in voltage of the output signal.
(2 marks)
6