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Bias Current Effect on Gain of a CMOS OTA 1 Manoj K. Taleja and 2Manoj Kumar 1 Department of Electronics & Communication Engg., Guru Jambheshwar University of Science & Technology Hisar, Haryana, (India) E-mail: [email protected] 2 Department of Electronics & Communication Engg., Guru Jambheshwar University of Science & Technology Hisar, Haryana, (India) E-mail: [email protected] Abstract In this paper, a study in terms of gain for differential CMOS operational transconductance amplifier (OTA) using super cascode transistors has been carried out. A regulated cascode circuit provides high output impedance at low supply voltage. OTA using super cascode transistors shows gain of 68 dB at 100 μA bias current. The input bias current from 1 pA to 100 μA has been varied. The power consumption of OTA varies from 77 nW to 811 mW with bias current variations from 1 pA to 100 μA. The CMOS OTA has been simulated in 0.50μm technology with 1.5V power supply voltage. Keywords: Bias transconductance. current, CMOS, gain, low Super Cascode Transistors power, Introduction In the recent years, efforts have been made to reduce supply voltage of integrated circuits. Research efforts also have been made in reducing total power consumption of VLSI systems [1]. The realization of low voltage, high gain and low power amplifiers requires efficient circuit design techniques [2]. A folded cascode configuration has been widely used in CMOS circuits. The reason is that the output capacitance plays the same role as the compensation capacitance [3]. This configuration also increases transconductance (g0) which in turns increases the gain of the amplifier. Today high performance and low power circuits are required that can be operated at a low supply voltage of 1.5 V or less [4]. A super cascode (SC) transistor technique reported in literature is used to increase the gain of the amplifier. Since amplifiers in super cascode circuits have to drive capacitive loads, so they have to make use of operational transconductance amplifiers (OTAs). The OTA using super cascode transistors has to meet three requirements: high slew rate, large bandwidth and high open loop gain. Gain boosting is another technique which increases output impedance and hence the gain of the amplifier. A single stage folded cascode OTA could be used for further applications [5]. Figure 1: Super Cascode Transistor [4] (a.) Circuit schematic (b) Symbol Figure 1 shows super cascode transistors. Transistors M1, M2, M3 along with biasing currents Ib1 and Ib2 constitute ‘super cascode transistors’ [6]. The drain of transistor M1 drives transistor M3. Since transistor M1 is common source, hence polarity of drain of transistor M1 reversed. So an inverting stage is provided by transistor M2 and biasing current Ib2 to drive the base of transistor M3. The biasing current Ib2 boost the gain which increases the output impedance [7]. OTA Using Super Cascode Transistors Figure 2 shows OTA using super cascode transistors with cascoding technique which increases the gain without affecting high frequency characteristics. SC transistors used in output stage gives small settling time and high gain. SC stage increases the gain even more than a single stage. The currents in cascode stage and input differential pair are equals. Transistors MC along with control signal TC controls the common mode output voltage which is taken from SC transistors [7]. [Page No. 396] Gain (dB) Bias Current Effect on Gain of a CMOS OTA 80 70 60 50 40 30 20 10 0 1 pA 500 pA 1 nA 500 nA 1 uA 25 uA 50 uA 75 uA 100 uA Bias Current Figure 2: OTA using Super Cascode Transistors [4]. Results and Discussions The OTA using SC transistors has been simulated using 0.5 µm technology with a supply voltage of 1.5 V. The biasing current (1 pA – 100 µA) that controls the gain of the OTA is shown in Table 1. The biasing current Ib2 is taken 10 times larger than Ib1 to satisfy stability criteria [4]. The OTA with SC transistors shows a gain of 68 dB at a biasing current of 100 µA. The results are shown in Table 1. Table 2 shows values of ‘biasing current and gain relationship’ and ‘biasing current and power dissipation across OTA’ relationship. The graph showing biasing current and gain relationship is shown in figure 3 and the graph showing biasing current and power dissipation across OTA relationship is shown in figure 4. Table 1: Performance characteristics for CMOS amplifiers. Design parameters Power supply DC voltage gain Input bias current OTA using Super Cascode Transistors [4] 1.5 V 68 dB 1 pA – 100 µA Conventional amplifier [8] 2.5 V 48 dB 1 mA Gain of OTA using SC Transistors 63.52 63.53 63.54 63.57 63.63 65.60 67.00 68.04 68.82 900 800 700 600 500 400 300 200 100 0 1 pA 500 pA 1 nA 500 nA 1 uA 25 uA 50 uA 75 uA 100 uA Bias Current Figure 4: Power consumption with bias current. Conclusions A low voltage, high gain differential OTA using SC transistors has been studied using 0.5µm technology. The circuit has been simulated using SPICE. The OTA shows a gain of 68 dB at a biasing current of 100 µA. The gain of OTA using SC transistors varies from 63.52 dB to 68.82 dB with a biasing current varying from 1 pA to 100 μA as shown in figure 3. The power consumption of OTA using SC transistors varies from 77.565 nW to 811.280 mW with a biasing current varying from 1 pA to 100 μA as shown in figure 4. References Table 2: Power and gain Vs biasing current. Biasing current 1 pA 500 pA 1 nA 500 nA 1 µA 25 µA 50 µA 75 µA 100 µA Power Dissipation (mW) Figure 3: Gain with bias current. Power dissipation across this OTA 77.565 nW 98.790 nW 124.317 nW 1.418 mW 2.934 mW 111.926 mW 289.032 mW 524.248 mW 811.280 mW [1] L.Bouzerara, M.T.Belaroussi, and B.Amirouche, “Low-voltage, low-power and high gain CMOS OTA using active positive feedback with feed forward and FDCM techniques,” in 23rd international conference proc. on microelectronics, vol 2, NIS, Yugoslavia, 1215 May, 2002. [2] Subhajit Sen and Bosco Leung, “A class-AB highspeed low-power operational amplifier in BiCMOS technology,” IEEE journal of solid – state, vol. 31, no. 9, pp 1325-1330, Sept. 1996. [3] F. Op't Eynde and W.Sansen, “A CMOS wideband amplifier with 800 MHz gain-bandwidth,” in IEEE custom integrated circuit’s conference proc., pp 9.1.19.1.4, June 1990. [4] R.G. Carvajal, B. Palomo, A. Torralba, F. Munoz and J. Ramirez-Angulo, “Low voltage high gain [Page No. 397] 5th IEEE International Conference on Advanced Computing & Communication Technologies [ICACCT-2011] ISBN 81-87885-03-3 [5] [6] [7] [8] differential OTA for SC circuits,” Electronic Letters, vol. 39, no. 16, 7th August 2003. Bult. K. and Gallen. J.G.M., “The CMOS gain – boosting technique,” Analog Integrated Circuits Signal process, pp 119-135, 1991. Torralba. A., Carvajal. R.G.,Ramirez-Angulo. J. and Munoz E., “Output stage for low supply voltage, highperformance CMOS current mirrors,” Electronic Letters, 38, (24), pp 1528-1529, 2002. Bult. K. and Gallen. G., “A fast-settling CMOS opamp for SC circuits with 90 dB dc gain,” IEEE journal of solid–state circuits, 25, (6), 1990. Katsufumi Nakamura and L. Richard Carley, “An enhanced fully differential folded cascode op amp,” IEEE journal of solid - state circuits, vol. 27, no. 4, pp 563-568, April 1992. [Page No. 398]