* Your assessment is very important for improving the workof artificial intelligence, which forms the content of this project
Download EC8011 40V Gate Pulse Modulator - E-CMOS
Nanofluidic circuitry wikipedia , lookup
Spark-gap transmitter wikipedia , lookup
Thermal runaway wikipedia , lookup
Air traffic control radar beacon system wikipedia , lookup
Oscilloscope history wikipedia , lookup
Analog-to-digital converter wikipedia , lookup
Immunity-aware programming wikipedia , lookup
Josephson voltage standard wikipedia , lookup
Integrating ADC wikipedia , lookup
Wilson current mirror wikipedia , lookup
Electrical ballast wikipedia , lookup
Transistor–transistor logic wikipedia , lookup
Valve RF amplifier wikipedia , lookup
Operational amplifier wikipedia , lookup
Current source wikipedia , lookup
Resistive opto-isolator wikipedia , lookup
Voltage regulator wikipedia , lookup
Schmitt trigger wikipedia , lookup
Power electronics wikipedia , lookup
Surge protector wikipedia , lookup
Current mirror wikipedia , lookup
Power MOSFET wikipedia , lookup
Switched-mode power supply wikipedia , lookup
EC8011 40V Gate Pulse Modulator Description Gate pulse modulator (GPM) is controlled by frame signals from timing controller to modulate the Gate On voltage that acts a flicker compensation circuit to reduce the coupling effect between gate lines and pixels. The GPM is specially designed for the application of TFT LCD panel. It also can delay the Gate On voltage while power on for achieving a correct power on sequence for gate driver ICs. Both of the delay time for flicker compensation and power on sequence are programmable by external resistors and capacitors. The EC8011 is available in SOP8 package Features Operation from 20V to 35V Positive Supply Input Power Sequence Circuit for Gate Driver IC Flicker Compensation Circuit Adjustable Output Delay Time Reduction of Coupling Effect between Gate Line and Pixel RoHS Compliant and 100% Green Mode Package z z z z z z Applications z TFT-LCD Panel Block Diagram E-CMOS Corp. (www.ecmos.com.tw) Page 1 of 9 2009/07/27 EC8011 40V Gate Pulse Modulator Pin Assignment Pin Descriptions SOP8 (Top View) Pin# Symbol Function 1 VGH Power Supply input. 2 VGHM Switch output directly drives the power supply of Gate Driver IC. 3 RE Source of the internal high-voltage MOSDET P2 connect to a resistor from this pin to around. 4 CD For VGHM discharging, Mode Selection and VGHM on time Setting. 5 VD VGHM Low-Level Regulation Set-Point input. The voltage level is 10VD. 6 VDPM High-Voltage Switch Delay Input. Connect a capacitor from VDPM to GND to set the delay time. The internal current source is 5 µA. 7 GND 8 VFLK Ground Single Input. VFLK is produced from timing controller in LCD module. Ordering Information E C 8011 X - G G : G reen M ode C ircuit Type P ackage: N = SO P -8 I = TSS O P -8 Marking Information Package Part Number SOP8 EC8011N-G Marking Marking Information EC8011-G YY is the year of production. 08 means the product is manufactured in YYWW year of 2008. XXXXXX EC8011-G TSSOP8 EC8011I-G YYWW XXXXXX E-CMOS Corp. (www.ecmos.com.tw) WW is the week of production. 25 means the Product is manufactured in the 25th week. XXXXXX is Lot number. Page 2 of 9 2009/07/27 EC8011 40V Gate Pulse Modulator Absolute Maximum Ratings (TA=25 ºC) Characteristics Symbol Rating Unit Positive Supply Voltage, VGH VVGH 40 V FLK Voltage VFLK 6.5 V DPM Voltage VDPM 6.5 V Output Current Source from VGH(Pulse Width<500ns eith period>2.5µs Io 1 A Output Current (rms value) (Note 5) — 80 mA Power Dissipation PD@ TA=25 ºC PD 0.625 W Thermal Resistance from Junction to ambient (Note4) θJA 160 ºC /W TLEAD 260 ºC Junction Temperature Range TJ 150 ºC Storage Temperature Range TSTG -65 to +150 ºC HBM (Human Body Mode) HBM 1 kV MM(Machine Mode) MM 200 V Symbol Rating Unit Junction Temperature Range TA -40~125 ºC Ambient Temperature Range Top -40~85 ºC Lead Temperature (Soldering, 10sec) ESD Susceptibility (Note 2) Recommended Operating Conditions (Note3) Characteristics E-CMOS Corp. (www.ecmos.com.tw) Page 3 of 9 2009/07/27 EC8011 40V Gate Pulse Modulator Electrical Characteristics (VGH = +30V, GND = 0V, TA = 25 C, unless otherwise specified.) Parameter Symbol Conditions Min Typ Max Units Input Supply Voltage VVGH — 20 — 35 V Input Supply Current IVGH CD = VDPM = 5V, VFLK = 5V — 0.5 1.5 mA VFLK = 25kHz, VGHM at Low, VGHM with 1.5nF, R1 = 1.2kΩ 3 10 x VD VGH V Adjustable VGHM Falling Regulation Voltage VD VFLK Logic High Voltage VFLK_H — 1.5 — 5.5 V Threshold Logic- Low Voltage VFLK_L — 0 — 0.4 V VFLK Input Leakage Current ILeak VFLK = 0V or High -1 — 1 A VFLK to VGHM Rising Propagation Delay tPLH R1 = 1.2k, VGHM with 1.5nF, VFLK = 0 to 3V, measure VFLK = 1.5V to 10% VGHM — 100 200 ns VFLK to VGHM Falling Propagation Delay at Mode A tPHL CD = 5V, R1 = 1.2k, VGHM with 1.5nF , VFLK = 3 to 0V, measure VFLK = 1.5V to 90% VGHM — 100 230 ns VFLK to VGHM Falling Propagation Delay at Mode C tPHL CD = 3.3V, R1 = 1.2k , VGHM with 1.5nF , VFLK = 3 to 0V, measure VFLK = 1.5V to 90% VGHM — 260 — ns VDPM Voltage Threshold VDPM_H VDPM High Logic Threshold 2.4 2.5 2.6 V CD Mode A Operation Range VCD_A — — 5 — V CD Mode B Voltage Threshold VCD_THB — 2.4 2.5 2.6 V CD Mode C Operation Range VCD_C — 3 — 3.6 V VDPM Charge Current IVDPM 4 5 6 A 40 50 60 A Connect VDPM to GND, VGH = 30V, VFLK = 5V Connect CD to GND, VGH = 30V, VFLK = 0V Adjustable CD Mode Charge Current ICD VGH Switch On Resistance RP1 VGH = 30V/-20mA at VFLK = 5V — 15 30 Ω RE Switch On Resistance RP2 VGH = 30V/+20mA at VFLK =0V — 15 30 Ω CD Switch On Resistance RQ3 ICD = +1mA at VFLK = 5V — 1 — kΩ Note 1. Stresses listed as the above "Absolute Maximum Ratings" may cause permanent damage to the device. These are for stress ratings. Functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may remain possibility to affect device reliability. 2. Devices are ESD sensitive. Handling precaution recommended. 3. The device is not guaranteed to function outside its operating conditions. 4. JA is measured in the natural convection at TA = 25 ºC on a low effective thermal conductivity test board of JEDEC 51-3 thermal measurement standard. 5. The detail operation guideline is described and plotted in the section of application information. E-CMOS Corp. (www.ecmos.com.tw) Page 4 of 9 2009/07/27 EC8011 40V Gate Pulse Modulator Typical Application circuit E-CMOS Corp. (www.ecmos.com.tw) Page 5 of 9 2009/07/27 EC8011 40V Gate Pulse Modulator Timing Diagram E-CMOS Corp. (www.ecmos.com.tw) Page 6 of 9 2009/07/27 EC8011 40V Gate Pulse Modulator Application Information The GPM consists of two high voltage MOSFETs which include P1 between VGH and VGHM and P2 between VGHM and RE. The switch control block is enabled when VDPM exceeds VREF and then P1 and P2 are controlled by VFLK and CD. There are three different modes of operation (see the Typical Application Circuit and Timing Diagram). Activate the Mode A by connecting CD to 5V. When VFLK is logic high, P1 turns on and P2 turns off, VGHM is connected to VGH. When VFLK is logic low, P1 turns off and P2 turns on, VGHM is connected to RE, and VGHMis discharged through the resistor between RE and GND. P2 turns off and stops discharging VGHM when VGHM reaches 10 times the voltage on VD pin. When CD is connect with capacitor, the switch control block works in the Mode B. The rising edge of VFLK turns on P1 and turns off P2, connecting VGHM to VGH. An internal N-Channel MOSFET Q3 between CDO and GND is also turned on to discharge the external capacitor between CD and GND. The falling edge of VFLK turns off Q3, and an internal 50uA current source starts charging the CD capacitor. Once VCD exceeds VREF, the switch control circuit turns off P1 and turns on P2, connecting VGHM to RE. VGHM is discharged through the resistor connected between RE and GND. P2 turns off and stops discharging VGHM when VGHM reaches 10 times the voltage on VD pin. Activate the Mode C by connecting CD to 3.3V. P1 will be turned on, P2 will be turned off and Q3 will be turned on respectively when VFLK is high. When VFLK is low, Q3 will be turned off and CDO will be pull to the same voltage level as CD through a 1kΩ resistor. P1 and P2 will be turn off and on respectively when comparator detects CDO voltage is greater than 2.5V. VGHM is discharged through the resistor connected between RE and GND. P2 turns off and stops discharging VGHM when VGHM reaches 10 times the voltage on VD pin. The timing of enabling the switch control block can be adjusted with an external capacitor connected between VDPM and GND. An internal 5μA current source starts charging the VDPM capacitor if all internal power is ready The voltage on VDPM linearly rises because of the constant charging current. When VDPM goes above VREF, the switch control block is enabled. Output Current Maximum Rating (rms value) The GPM output current is RMS value and the RMS current boundary depends on ambient temperature with fixed P1 and P2 on-resistance. In figure 6, the on-resistance is 15ohm at VGH = 30V/20mA. The test condition is VGH = 30V, RE = 0V and frequency = 50 KHz/100KHz. The boundary is located at 125 C junction temperature for safe operation in SOP-8 package. E-CMOS Corp. (www.ecmos.com.tw) Page 7 of 9 2009/07/27 EC8011 40V Gate Pulse Modulator Mechanical Dimensions Outline Drawing SOP8 DIMENSIONS INCHES DIMN MM MIN MAX MIN MAX A 0.053 0.069 1.346 1.753 A1 0.004 0.010 0.102 0.254 A2 0.053 0.059 1.346 1.499 D 0.189 0.196 4.801 4.978 E 0.150 0.157 3.810 3.988 H 0.228 0.244 5.791 6.198 L 0.016 0.050 0.406 1.270 θ 0∘ 8 0∘ 8∘ E-CMOS Corp. (www.ecmos.com.tw) Page 8 of 9 2009/07/27 EC8011 40V Gate Pulse Modulator Mechanical Dimensions Outline Drawing TSSOP8 E-CMOS Corp. (www.ecmos.com.tw) Page 9 of 9 2009/07/27