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Download PI_SC1271K rev B 060515_Off-Line CVCC Flyback
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PI_SC1271K rev B 060515_Off-Line CVCC Flyback Switcher IC with Integrated MOS 原文地址:http://m.huizhi123.com/view/6560c4e59326ec0b6568b836b144c7d3.html SC1271K InnoSwitch Family Off-Line CV/CC Flyback Switcher IC with Integrated MOSFET, Synchronous Rectification and Feedback Product Highlights Highly Integrated, Compact Footprint sensing and synchronous rectification driver ? Incorporates flyback controller, 725 V MOSFET, secondary-side ? Integrated FluxLink?, HIPOT-isolated, feedback link ? Exceptional CV/CC accuracy, independent of transformer design or SR FET external components ? Instantaneous transient response ±5% CV with 0%-100%-0% FWD GND BPS load step EcoSmart?– Energy Efficient D ? <10 mW no-load at 230 VAC when supplied by transformer bias winding ? Easily meets all global energy efficiency regulations ? Low heat dissipation Primary FET and Controller S BPP IS FB VOUT InnoSwitch SR Secondary Control IC Advanced Protection / Safety Features ???? Constant Voltage (CV) rimary sensed output OVP P Secondary sensed output overshoot clamp Secondary sensed output OCP to zero output voltage Hysteretic thermal shutdown 00% production HIPOT compliance testing at 6 kV DC/1 sec 1 Reinforced insulation Isolation voltage >3,500 VAC UL1577 and TUV (EN60950) safety approved EN61000-4-8 (100 A/m) and EN61000-4-9 (1000 A/m) compliant (a) Typical Application Schematic VO 12 9 5 PI-7519-020615 Full Safety and Regulatory Compliance ????? Green Package Applications ? Halogen free and RoHS compliant ? C hargers and adapters for smart mobile devices ? High efficiency, low voltage, high current power supplies 75% Constant Current (CC) (b) Output Characteristic 100% IO PI-7146-121213 Figure 1. Typical Application/Performance. Description The InnoSwitch? family of ICs dramatically simplifies the development and manufacturing of low-voltage, high current power supplies, particularly those in compact enclosures or with high efficiency requirements. The InnoSwitch architecture is revolutionary in that the devices incorporate both primary and secondary controllers, with sense elements and a safety-rated feedback mechanism into a single IC. Close component proximity and innovative use of the integrated communication link permit accurate control of a secondary-side synchronous rectification MOSFET and optimization of primary-side switching to maintain high efficiency across the entire load range. Additionally, the minimal DC bias requirements of the link enables the system to achieve less than 10 mW no-load in challenging applications such as smart-mobile device chargers. Figure 2. High Creepage, Safety-Compliant eSOP Package. Output Power Table 85-265 VAC Product 3 SC1271K Adapter1 20 W Peak or Open Frame2 25 W Table 1. Output Power Table. Notes: 1. Minimum continuous power in a typical non-ventilated enclosed typical size adapter measured at 40 °C ambient. Max output power is dependent on the design. With condition that package temperature must be < = 125 ° C. 2. Minimum peak power capability. 3. Package: eSOP-R16B. www.power.com June 2015 This Product is Covered by Patents and/or Pending Patent Applications. SC1271K PRIMARY BYPASS (BPP) REGULATOR 5.95 V DRAIN (D) FAULT PRESENT AUTORESTART COUNTER RESET BYPASS CAPACITOR SELECT AND CURRENT LIMIT STATE MACHINE 5.95 V 5.39 V +BYPASS PIN UNDERVOLTAGE VI LIMIT CURRENT LIMIT COMPARATOR + JITTER CLOCK DCMAX FROM FEEDBACK DRIVER PRI/SEC RECEIVER CONTROLLER OSCILLATOR THERMAL SHUTDOWN S Q PULSE DCMAXS 6.4 V OVP LATCH 20 ? R Q LEADING EDGE BLANKING PI-7432-110414 SOURCE (S) Figure 3. Primary-Side Controller Block Diagram. OUTPUT VOLTAGE (VO) REGULATOR 4.45 V FORWARD (FWD) DETECTOR SCONDARY BYPASS (BPS) 4.45 V 3.80 V FEEDBACK (FB) +HAND SHAKE PULSES CONTROL +CABLE COMPENSATION ISENSE (IS) FEEDBACK DRIVER +TO RECEIVER IS THRESHOLD CLOCK OSCILLATOR SYNC RECT (SR) ENABLE SR ENB Q S Q R +SR THESHOLD SECONDARY GROUND (GND) PI-7433-112014 Figure 4. Secondary-Side Controller Block Diagram. 2 Rev. B 06/15 www.power.com SC1271K Pin Functional Description DRAIN (D) Pin (Pin 1) This pin is the power MOSFET drain connection. SOURCE (S) Pin (Pin 3-6) This pin is the power MOSFET source connection. It is also the ground reference for the BYPASS and FEEDBACK pins. PRIMARY BYPASS (BPP) Pin (Pin 7) It is the connection point for an external bypass capacitor for the primary IC supply. FORWARD (FWD) Pin (Pin 10) The connection point to the switching node of the transformer output winding for sensing and other functions. OUTPUT VOLTAGE (VOUT) Pin (Pin 11) This pin is connected directly to the output voltage of the power supply to provide bias to the secondary IC. SYNCHRONOUS RECTIFIER DRIVE (SR) Pin (Pin 12) Connection to external SR FET gate terminal. SECONDARY BYPASS (BPS) Pin (Pin 13) It is the connection point for an external bypass capacitor for the secondary IC supply. FEEDBACK (FB) Pin (Pin 14) This pin connects to an external resistor divider to set the power supply CV voltage regulation threshold. D1 16 IS 15 GND 14 FB 13 BPS 12 SR 11 VOUT 10 FWD NC SECONDARY GROUND (GND) (Pin 15) Ground connection for the secondary IC. ISENSE (IS) Pin (Pin 16) Connection to the power supply output terminals. Internal current sense is connected between this pin and the SECONDARY GROUND pin. S 3-6 BPP 7 NC PI-7398-110714 Figure 5. Pin Configuration. 3 www.power.com Rev. B 06/15 SC1271K Absolute Maximum Ratings1,2 DRAIN Pin Voltage. .................................................... -0.3 V to 725 V DRAIN Pin Peak Current3 ......................................... 1680 (3150) mA PRIMARY BYPASS/SECONDARY BYPASS Pin Voltage. ........-0.3 V to 9 V PRIMARY BYPASS/SECONDARY BYPASS Pin Current. ............... 100 mA FORWARD Pin Voltage............................................... -1.5 V to 150 V FEEDBACK Pin Voltage.....................................................-0.3 to 9 V6 SR/P Pin Voltage. ..............................................................-0.3 to 9 V OUTPUT VOLTAGE Pin Voltage. ........................................ -0.3 to 15 V Storage Temperature....................................................-65 to 125 °C Operating Junction Temperature4,6. .............................. -40 to 125 °C Ambient Temperature.................................................... -40 to 85 °C Lead Temperature5.................................................................260 °C Notes: 1. All voltages referenced to Source and Secondary Ground, TA = 25 °C. 2. Maximum ratings specified may be applied one at a time without causing permanent damage to the product. Exposure to Absolute Maximum Ratings conditions for extended periods of time may affect product reliability. 3. Higher peak Drain current is allowed while the Drain voltage is simultaneously less than 400 V. 4. Normally limited by internal circuitry. 5. 1/16” from case for 5 seconds. 6. -1.8 V for a duration of ≤500 nsec. 7. Maximum silicon operating junction temperature is 150 °C, however safety agency maximum operating junction is 125 °C. 8. The maximum current out of the FORWARD pin when the FORWARD pin is below Ground is -40 mA. 9. Maximum current into VOUT pin at 15 V should not exceed 10 mA. Thermal Resistance Thermal Resistance: eSOP-R16B Package: (qJA)........................... ................65 °C/W2, 69 °C/W1 (qJC)........................................................ 12 °C/W3 Notes: 1. Solder to 0.36 sq. in (232 mm2), 2 oz. (610 g/m2) copper clad. 2. Solder to 1 sq. in (645 mm2), 2 oz. (610 g/m2) copper clad. 3. The case temperature is measured at the plastic surface at the top of the package. Parameter Conditions Rating Units Ratings for UL1577 (Adapter power rating is derated power capability) Primary-Side Current Rating Primary-Side Power Rating Secondary-Side Current Rating Secondary-Side Power Rating Current from pin (3-6) to pin 1 TAMB = 25 °C (Device mounted in socket resulting in TCASE = 120 °C) Current from pin 16 to pin 15 TAMB = 25 °C (Device mounted in socket) 1.5 A 1.35 W 2.0 A 0.125 W Parameter Control Functions Output Frequency Applies to Both Primary and Secondary Controllers Maximum Duty Cycle Symbol Conditions SOURCE = 0 V TJI = -40 °C to +125 °C (Note C) (Unless Otherwise Specified) Min Typ Max Units Average fOSC TJ = 25 °C Peak-to-Peak Jitter DCMAX TJ = 0 °C to 125 °C 93 100 6 107 kHz 60 % 4 Rev. B 06/15 www.power.com SC1271K Conditions SOURCE = 0 V TJI = -40 °C to +125 °C (Unless Otherwise Specified) TJ = 25 °C, VBPP + 0.1 V (MOSFET not Switching) See Note B TJ = 25 °C, VBPP + 0.1 V (MOSFET Switching at fOSC) See Note A, C TJ = 25 °C, VBP = 0 V See Notes D, E TJ = 25 °C, VBP = 4 V See Notes D, E See Note D -5.4 Parameter Control Functions (cont.) Symbol Min Typ Max Units IS1 PRIMARY BYPASS Pin Supply Current IS2 250 mA 970 1100 PRIMARY BYPASS Pin Charge Current ICH1 ICH2 -4.5 -3.6 mA -3.8 -2.9 -2.0 PRIMARY BYPASS Pin Voltage PRIMARY BYPASS Pin Voltage Hysteresis PRIMARY BYPASS Shunt Voltage VBPP VBPP(H) VSHUNT 5.73 5.95 6.15 V 0.48 0.56 0.65 V IBPP = 2 mA 6.15 6.45 6.75 V Circuit Protection Standard Current Limit (BPP) Capacitor = 0.1 mF Increased Current Limit (BPP) Capacitor = 1 mF Reduced Current Limit (BPP) Capacitor = 10 mF ILIMIT See Note E ILIMIT+1 See Note E ILIMIT-1 See Note E di/dt = 213 mA/ms TJ = 25 °C di/dt = 213 mA/ms TJ = 25 °C di/dt = 213 mA/ms TJ = 25 °C Standard Current Limit, I2f = ILIMIT(TYP)2 × fOSC(TYP) See Note A Power Coefficient I2 f Reduced Current Limit, I2f = ILIMITred(TYP)2 × fOSC(TYP) See Note A Increased Current Limit, I2f = ILIMITinc(TYP)2 × fOSC(TYP) See Note A Initial Current Limit Leading Edge Blanking Time Current Limit Delay Thermal Shutdown IINIT tLEB TJ = 25 °C See Note A TJ = 25 °C See Note A TJ = 25 °C See Note A, F See Note A 135 893 950 1007 mA 955 1050 1145 mA 773 850 927 mA 0.87 × I2 f I2 f 1.15 × I2 f A2Hz 0.84 × I2 f I2 f 1.18 × I2 f A2Hz 0.84 × I2 f 0.75 × ILIMIT(TYP) 170 I2 f 1.18 × I2 f mA 250 ns tILD TSD 170 142 150 ns °C 5 www.power.com Rev. B 06/15 SC1271K Conditions SOURCE = 0 V TJI = -40 °C to +125 °C (Unless Otherwise Specified) Parameter Circuit Protection (cont.) Thermal Shutdown Hysteresis PRIMARY BYPASS Pin Shutdown Threshold Current Primary Bypass Power-Up Reset Threshold Voltage Auto-Restart On-Time at fOSC Auto-Restart Trigger Skip Time Auto-Restart Off-Time at fOSC Short Auto-Restart Off-Time at fOSC Symbol Min Typ Max Units TSD(H) See Note A 75 °C ISD 5.6 7.6 9.6 mA VBPP(RESET) TJ = 25 °C TJ = 25 °C See Note G TJ = 25 °C See Note G TJ = 25 °C See Note G TJ = 25 °C See Note G 2.8 3.0 3.3 V t AR t AR(SK) t AR(OFF) t AR(OFF)SH 64 77 90 ms 1 s 2 s 0.5 s Output ON-State Resistance OFF-State Drain Leakage Current OFF-State Drain Leakage Current RDS(ON) ID = 1050 mA TJ = 25 °C TJ = 100 °C 1.70 2.70 2.00 3.10 200 W IDSS1 IDSS2 VBPP = 6.2 V, VDS = 580 V, TJ = 125 °C See Note H VBPP = 6.2 V, VDS = 325 V, TJ = 25 °C See Notes A, H VBPP = 6.2 V TJ = 25 °C See Note I 15 mA mA Breakdown Voltage Drain Supply Voltage BVDSS 725 50 VV 6 Rev. B 06/15 www.power.com SC1271K Conditions SOURCE = 0 V TJI = -40 °C to +125 °C (Unless Otherwise Specified) TJ = 25 °C See Note K Parameter Secondary FEEDBACK Pin Voltage OUTPUT VOLTAGE Pin Auto-Restart Threshold Cable Drop Compensation Factor SECONDARY BYPASS Pin Current at No-Load SECONDARY BYPASS Pin Voltage SECONDARY BYPASS Pin Undervoltage Threshold SECONDARY BYPASS Pin Undervoltage Hysteresis Output (IS Pin) Current Limit Voltage Threshold Constant Current Regulation Threshold Normalized Output Current FEEDBACK Pin AR Timer FEEDBACK Pin Short-Circuit Symbol Min Typ Max Units VFB VOUT(AR) φCD 1.250 3.00 1.265 3.45 1.280 3.65 VV TJ = 25 °C 1.05 1.06 1.07 ISNL TJ = 25 °C 225 265 305 mA VBPS 4.25 4.45 4.65 V VBPS(UVLO) 3.45 3.8 4.15 V VBPS(HYS) 0.10 0.65 1.2 V ISV(TH) ICC IO tFB(AR) VFB(OFF) TJ = 25 °C TJ = 0 °C to 100 °C TJ = 25 °C 2.00 33 mV 2.20 2.40 A 1.00 8 1.04 1.08 ms 0.1 V Synchronous Rectifier SYNCHRONOUS RECTIFIER Pin Threshold SYNCHRONOUS RECTIFIER Pin Pull-Up Current VSR(TH) TJ = 25 °C -19 -24 -29 mV ISR(PU) TJ = 25 °C CLOAD = 2 nF, fS = 100 kHz 125 162 200 mA 7 www.power.com Rev. B 06/15 SC1271K Conditions SOURCE = 0 V TJI = -40 °C to +125 °C (Unless Otherwise Specified) Parameter Symbol Min Typ Max Units Synchronous Rectifier1 (cont.) SYNCHRONOUS RECTIFIER Pin Pull-Down Current SYNCHRONOUS RECTIFIER Pin Drive Voltage ISR(PD) TJ = 25 °C CLOAD = 2 nF, fS = 100 kHz 230 280 315 mA VSR TJ = 25 °C CLOAD = 2 nF See Note A TJ = 25 °C CLOAD = 2 nF See Note A See Note A 4.2 4.4 4.6 V Rise Time 0-100% 10-90% 0-100% 10-90% TJ = 25 °C VSPS = 4.4 V ISR = 10 mA See Note A TJ = 25 °C VSPS = 4.4 V ISR = 10 mA See Note A Notes: 71 ns 40 32 ns 15 tR Fall Time tF Output Pull-Up Resistance RPU 11.5 W Output Pull-Down Resistance RPD 3.5 W NOTES: A. This parameter is derived from characterization. B. IS1 is an estimate of device current consumption at no-load, since the operating frequency is so low under these conditions. Total device consumption at no-load is sum of IS1 and IDSS2 (this does not include secondary losses) measure the PRIMARY BYPASS pin current at 6.2 V. C. Since the output MOSFET is switching, it is difficult to isolate the switching current from the supply current at the Drain. An alternative is to D. The PRIMARY BYPASS pin is not intended for sourcing supply current to external circuitry. E. To ensure correct current limit it is recommended that nominal 0.1 mF/1 mF/10 mF capacitors are used. In addition, the BPP capacitor value tolerance should be equal or better than indicated below across the ambient temperature range of the target application. The minimum and maximum capacitor values are guaranteed by characterization. Nominal PRIMARY BYPASS Pin Capacitor Value 0.1 mF 1 mF 10 mF Tolerance Relative to Nominal Capacitor Value Minimum -60% -50% -50% Maximum +100% +100% N/A F. This parameter is derived from the change in current limit measured at 1X and 4X of the di/dt shown in the ILIMIT specification. G. Auto-restart on-time has same temperature characteristics as the oscillator (inversely proportional to frequency). H. IDSS1 is the worst-case OFF-state leakage specification at 80% of BVDSS and the maximum operating junction temperature. IDSS2 is a typical specification under worst-case application conditions (rectified 230 VAC) for no-load consumption calculations. I. Breakdown voltage may be checked against minimum BVDSS specification by ramping Drain voltage up to but not exceeding minimum BVDSS. J. For reference only. This is the total range of current limit threshold which corrects for variations in the current sense bond wire. Both of K. Measured at the VOUT pin of the device. At the end of the cable under-load, the apparent autorestart threshold will be lower. which are trimmed to set the normalized output constant current. 8 Rev. B 06/15 www.power.com Part Ordering Table www.power.com eSOP-R16B 3 4 2X 0.057 [1.45] Ref. 0.050 [1.27] 2A 0.004 [0.10] C A 0.023 [0.58] 13X 0.018 [0.46] 0.010 [0.25] M C A B 0.400 [10.16] 16 9 10 11 12 13 14 15 16 9 2X 0.004 [0.10] C B 0° - 8° 8 Lead Tips 0.006 [0.15] C 0.010 [0.25] H Gauge Plane 0.059 [1.50] Ref. Typ. 0.059 [1.50] Ref. Typ. Seating Plane 0.040 [1.02] 0.028 [0.71] DETAIL A C Product 2 SC1271K 0.464 [11.79] B 1 8 6 5 4 3 1 8 7 0.006 [0.15] C 4 Lead Tips 3 4 0.158 [4.01] 0.045 [1.14] Ref. 0.152 [3.86] 0.350 [8.89] Pin #1 I.D. (Laser Marked) 0.080 [2.03] Ref. TOP VIEW BOTTOM VIEW 0.010 [0.24] Ref. 0.020 [0.51] Ref. 0.022 [0.56] Ref. 0.019 [0.48] Ref. 0.028 [0.71] Ref. 0.032 [0.81] 0.029 [0.74] 0.010 [0.25] Ref. 0.356 [9.04]Ref. 7 Detail A 0.049 [1.23] 0.046 [1.16] 0.306 [7.77] Ref. 3 0.105 [2.67] 0.093 [2.36] 0.71 [.028] 0.016 [0.41] 0.011 [0.28] 12X 1.78 [.070] 1.27 [.050] 0.012 [0.30] 0.004 [0.10] 0.004 [0.10] C 12 Leads C Seating Plane 0.092 [2.34] 0.086 [2.18] 11.68 [.460] Cable Compensation SIDE VIEW 6% Seating Plane to Molded Bumps Standoff END VIEW Reference Solder Pad Dimensions 4.11 [.162] Notes: 1. Dimensioning and tolerancing per ASME Y14.5M-1994. SC1271K 2. Dimensions noted are determined at the outermost extremes of the plastic body exclusive of mold flash, tie bar burrs, gate burrs, and inter-lead flash, but including any mismatch between the top and bottom of the plastic body. Maximum mold protrusion is 0.007 [0.18] per side. 3. Dimensions noted are inclusive of plating thickness. 4.19 [.165] 7.62 [.300] 8.89 [.350] mm [INCH] 4. Does not include inter-lead flash or protrusions. 5. Controlling dimensions in inches [mm]. PI-6995-010615 POD-eSOP-R16B Rev B 6. Datums A and B to be determined in Datum H. 9 Rev. B 06/15 7. Exposed metal at the plastic package body outline/surface between leads 6 and 7, connected internally to wide lead 3/4/5/6. Revision A B Notes Initial Release. Changed Bypass Capacitor selection and limit on non-critical parameters. Date 04/15 06/15 For the latest updates, visit our website: www.power.com Power Integrations reserves the right to make changes to its products at any time to improve reliability or manufacturability. Power Integrations does not assume any liability arising from the use of any device or circuit described herein. POWER INTEGRATIONS MAKES NO WARRANTY HEREIN AND SPECIFICALLY DISCLAIMS ALL WARRANTIES INCLUDING, WITHOUT LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, AND NONINFRINGEMENT OF THIRD PARTY RIGHTS. Patent Information The products and applications illustrated herein (including transformer construction and circuits external to the products) may be covered by one or more U.S. and foreign patents, or potentially by pending U.S. and foreign patent applications assigned to Power Integrations. A complete list of Power Integrations patents may be found at www.power.com. Power Integrations grants its customers a license under certain patent rights as set forth at http://www.power.com/ip.htm. Life Support Policy POWER INTEGRATIONS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF POWER INTEGRATIONS. As used herein: 1. A Life support device or system is one which, (i) is intended for surgical implant into the body, or (ii) supports or sustains life, and (iii) whose failure to perform, when properly used in accordance with instructions for use, can be reasonably expected to result in significant injury or death to the user. 2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. The PI logo, TOPSwitch, TinySwitch, LinkSwitch, LYTSwitch, InnoSwitch, DPA-Switch, PeakSwitch, CAPZero, SENZero, LinkZero, HiperPFS, HiperTFS, HiperLCS, Qspeed, EcoSmart, Clampless, E-Shield, Filterfuse, FluxLink, StakFET, PI Expert and PI FACTS are trademarks of Power Integrations, Inc. Other trademarks are property of their respective companies. ?2015, Power Integrations, Inc. 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