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Functional Modeling Contents • • • • • Learning Objective Introduction Functional Model Different Functional Models Detailed explanation of each model Functional Model • Any digital system can be represented by a black box which processes the input to produce its output. • The value of the outputs vary with inputs and a certain delay exists between input and output. • The logic function is the input-output mapping that deals with the value transformation. • A functional model of a digital system is a representation of its logic function. Functional modeling • Functional modeling of a given circuit tells the relationship between input and output values of a circuit. And it does not talks about any timing aspect • Simulation implies calculation of the output (response) of a circuit for given inputs and functional models provide this information. • Functional modeling is implemented in different ways – Truth table, Primitive cube, Decision Tree, Program model, RTL. • Functional modeling can be done at two levels : Logic level and RTL(program) level • Functional model contains description of the output for a given input in terms of the digital word. Different Functional Models • • • • Truth tables and primitive cubes Binary decision diagrams Program modeling RTL modeling Truth table • Truth table is a representation of the function in terms of rows and columns. • The rows represent inputs and the corresponding outputs, columns are input and output variables. • It is the simplest way to represent a circuit. • In Boolean arithmetic, the possible values are 0 and 1. So for an ninput gate, the number of possible outcomes are 2n. • The inputs are given in an increment of 1 from 0 to 2n-1 in Boolean form. How the rows are constructed??(inputs) • • • • • Assume there are n inputs (x1,x2,…,xn) There are 2n different possible input vectors. Start the first row with (0,0,…,0) as inputs. Write the corresponding outputs in the same row. Increment the input vector value by 1 in the subsequent rows and enter the outputs. • Follow this till the last 2n th vector (1,1,…,1) is reached Example of a truth table A B C Out 0 0 0 0 0 0 1 0 0 1 0 1 0 1 1 0 1 0 0 0 1 0 1 1 1 1 0 0 1 1 1 0 Out = AB’C + A’BC’ Primitive Cubes • Primitive cubes are compressed form of truth tables. • Observe the truth table of AND gate given below: A B Out(AND) 0 0 0 0 1 0 1 0 0 1 1 1 • If one have a look at the first two inputs, it can be observed that if input A=0 then out=0 irrespective of the second input B. For these two input vectors, we call the B input as don’t care. Primitive cube examples A B Out(AND) A B Out(AND) 0 0 0 0 X 0 0 1 0 1 0 0 1 0 0 1 1 1 1 1 1 Primitive cube of AND gate Truth table of AND gate X is don’t care A B Out(NOR) A B Out(NOR) 0 0 1 0 0 1 0 1 0 0 1 0 1 0 0 1 X 0 1 1 0 Truth table of NOR gate Primitive cube of NOR gate Binary Decision diagram(BDD) • Is there any other way to reduce the number of entries for describing the circuit? BDD • One can determine the value of the output by simple graph traversal procedure. • It contains of decision nodes and two terminal nodes called 0terminal and 1-terminal. • Each decision node will have two child nodes: 0-child, 1-child. • At every node, follow the left or the right branch depending upon the value (0 or 1) of the corresponding decision node. • The value of the output for the given inputs is determined by the value encountered at the exit point. Example • The dotted lines represent a 0-child and solid lines represent 1-child • According to the given inputs traverse down to the exit terminal. • Ex: x1=1,x2=0,x3=1 Since x1=1 select the solid line to x2. Then x2=0 so select the dotted line to x3 and since x3=1 chose the solid line from x3 which leads to the exit terminal and reflects the output as 1. • Try similarly for x1=0, x2=0, x3=1. How to construct BDD?? • Start the tree with one of the inputs, say x1. • X1 can be 0 or 1, so map these two possible cases to the next input, say x2. • Similarly follow the same procedure for x2 and all the other inputs until you reach the exit terminal (no more inputs to map). • Now, observe the given truth table and point the exit terminals to either 0 or 1 by traversing all the possible paths in the tree. • Binary decision diagram is built. • This diagram can be simplified leading to reduction in the input entries. Reduced Ordered BDD (ROBDD) • In the given example, the complete BDD can be built by using the given truth table • Observe the complete BDD from the exit terminals. • Both branches from the left most node x3 results in the same value 1, we remove this node and replace it by an exit branch with value 1. Similarly the next node x3 can be replaced by 0. Reduced BDD ROBDD contd… • Now, if we observe the two left most exit terminals, they are the inverted values of its parent node, so the left x2 node can be replaced by x2. • Similarly the node x3 which is to the left of x2 can be replaced by x3 and the two right most exit terminals can be removed, since they are the same as their parent node. • The dot represents the inverter. Programming model • All the combinational elements in a circuit can be represented in a programming model. • Any logic function is expressed in terms of basic logic operations namely NOT,AND,NAND,OR,NOR,EXOR,EXNOR. • Code based programs can be written for any digital circuit using the above operations. • Assembly coding is an example of programming model. Example of programming model E F G LDA A //Load A in accumulator XOR B // A xor B STA E // Store A xor B in E XOR C // A xor B xor C STA Sum // store it in Sum LDA E AND C STA F LDA A AND B STA G LDA F OR G STA Cout RTL Model • In computer, data words are stored in registers and memories are organized as arrays of registers. • For example : register A[0:7] // A is a 8 bit register memory M[0:7;0:255] // A 256 array of 8 bit register • RTLs provide models for systems at the register and instruction set levels. • RTL- A kind of hardware description language (HDL) used in describing the registers of a computer or digital electronic system, and the way in which data is transferred between them. RTL model • In this we make HDL models of registered circuits and how signals interact between them such as memories, flip flops, latches, shift registers, and so on. • RTL codes are fully synthesizable(can be realized in hardware), because they are written using basic HDL structures. • RTL models are characterized as functional, because they emphasize functional description while providing only summary about structural circuits. Example of RTL model E E = A XOR B F = E AND Cin G = A AND B S = E XOR Cin Cout = F OR G F G • Here A, B, Cin are input registers and Cout, S are the output registers. E, F, and G are intermediate registers RTL detail • Primitive operator : This describes the processing and transfer of data. Example C=A+B • Conditional operator : Control of data transformation. For example : if (x) then c = A + B • Case operator : This is used for multiway decision. Example : signal{X[0:1]} case 0 : C = A + B; ………. case 3 : C = A – B; Thank You