Download Questions

K U L L I Y Y AH O F E N G I N E E R I N G
END-OF-SEMESTER EXAMINATION
SEMESTER 1, 2015/2016 SESSION
Programme
: Engineering
Level of Study
: UG 1
Time
: 9.00 am -12.00 pm
Date
: 03/01/2016
Duration
: 3 Hrs
Course Code
: ECE 1312/EECE 1312
Section(s)
: 1- 5
Course Title
: Electronics
This Question Paper Consists of 12 (Twelve) Printed Pages (Including Cover Page) with
5 (Five) Questions.
INSTRUCTION(S) TO CANDIDATES
DO NOT OPEN UNTIL YOU ARE ASKED TO DO SO





Total mark of this examination is 100.
This examination is worth 50 % of the total course assessment.
Answer ALL QUESTIONS
Only approved calculator with ‘KoE approved’ sticker is allowed (non-programmable and
non-graphical).
Marks assigned to each problem are listed in the margins.
Any forms of cheating or attempt to cheat is a serious offence which may lead to
dismissal.
All electronics gadgets are prohibited in the exam hall / venue.
(e.g. mobile / smart phones, smart watches, and smart glasses)
APPROVED BY:
1
QUESTION 1 (20 marks)
a) A solar cell is a special type of pn-junction diode. The current equation of a particular
solar cell is represented as follows:
𝐼𝐷 = 5.0 × 10
−13
[𝑒
𝑉
( 𝐷)
𝑉𝑇
− 1] − 7.7 × 10−2 (A)
When the cell is irradiated with sunlight and the cell current, 𝐼𝐷 = 0, the voltage 𝑉𝐷 is
referred to as the open circuit voltage, 𝑉𝑂𝐶 . Similarly, when the cell is irradiated in the
sunlight and the cell voltage, 𝑉𝐷 = 0, the current 𝐼𝐷 at that time is called the short circuit
current, 𝐼𝑆𝐶 . If the cell is operating at room temperature determine the parameters of the
solar cell as follows:
(4 + 2 marks)
i.
Open circuit voltage, 𝑉𝑂𝐶
ii.
Short circuit current, 𝐼𝑆𝐶
b) Consider the circuit shown in Fig. 1(b). The diode cut-in voltage is 𝑉𝛾 = 0.7 V.
Calculate the output voltage 𝑣𝑂 and plot it with respect to the input voltage 𝑣𝐼 in the
same time scale over the range of voltages −10 V ≤ 𝑣𝐼 ≤ +10 V for 𝑉𝐵 = 5 V.
(4 marks)
Fig. 1(b)
2
c) A clamper circuit is shown in Fig. 1(c). Write the equation of input-output voltage relation
of the circuit. Sketch the output voltage waveform, 𝑣𝑂 against the time, t, if the input has
sinusoidal voltage, 𝑣𝐼 = 6 sin(𝜔𝑡) V and diode cut-in voltage, 𝑉𝛾 = 0 V.
(4 marks)
Fig. 1(c)
d) In the circuit shown in Fig. 1(d), the power rating of the Zener diode is 4 W.
Let, 𝑉𝐼 = 58 𝑉, 𝑅𝑖 = 150 𝛺, 𝑉𝑍 = 16 V and the minimum diode current is 15 mA.
(2 + 4 marks)
i. Determine the range of the diode current
ii.
Determine the range of the load resistance, 𝑅𝐿
Fig. 1(d)
3
QUESTION 2 (20 marks)
a) Consider the circuit shown in Fig. 2(a). Assume that 𝑉𝐶𝐶 = 2.8 V, 𝛽 = 180 and
𝑉𝐵𝐸 (on) = 0.7 V. Design the circuit by finding the values of 𝑅𝐵 and 𝑅𝐶 such that
𝐼𝐶 = 0.12 mA and 𝑉𝐶𝐸 = 1.4 V.
(6 marks)
Fig. 2(a)
b) A transistor has current gain, 𝛽 in the range of 90 ≤ 𝛽 ≤ 180 and the collector current,
𝐼𝐶 is in the range of 0.8 mA ≤ 𝐼𝐶 ≤ 1.2 mA. What is the possible range of 𝑔𝑚 and 𝑟𝜋 ?
Assume that 𝑉𝑇 = 0.026 V.
(5 marks)
4
c) A common collector circuit is shown in Fig. 2(c). Given that  = 100. Assume 𝑉𝐵𝐸 (on) =
0.7 V.
(3 + 3 + 3 marks)
i.
Calculate the value of the DC collector current 𝐼𝐶
ii.
Sketch the small signal AC equivalent circuit. Assume that 𝑉𝐴 = ∞
iii. Calculate the value of the output resistance 𝑅𝑂
Fig. 2(c)
5
QUESTION 3 (20 marks)
a) A
transistor
transconductance,
𝑔𝑚 = 50 mA/V
and
emitter
resistance
𝑟𝜋 = 1.5 kΩ when it is operating at room temperature. Determine the collector current
𝐼𝐶𝑄 and common emitter-current gain 𝛽 of the transistor. Assume that 𝑉𝑇 = 0.026 V.
(4 marks)
b) A common-emitter amplifier has output voltage −2.4 V when its input voltage is
250 mV. The collector resistance of the amplifier has 1.5 kΩ is changed to 2.5 kΩ,
what is the new voltage gain of the amplifier ? Consider that 𝑟𝑂 = ∞.
(5 marks)
c) For the common emitter circuit in Fig. 3(c), the transistor parameters are 𝛽 = 100
and 𝑉𝐴 = ∞. The parameters of the circuit are 𝑉𝐵𝐸 (on) = 0.7 V, 𝐼𝐶 = 0.5 mA
and 𝑉𝐶𝐸 = 3 V.
(5 + 2 + 4 marks)
i. Find the value of 𝑅𝐸 and 𝑅𝐶
ii. Draw the small-signal equivalent circuit
iii. Determine the value of the voltage gain, 𝐴𝑣 = 𝑣𝑂 /𝑣𝑆
6
Fig. 3(c)
7
QUESTION 4 (20 marks)
a) The transistor in the circuit
in Fig. 4(a) has parameters 𝑉𝑇𝑁 = 0.8 V
and
𝐾𝑛 = 0.2 mA/V 2 . Sketch the output load line and plot the Q-points for 𝑉𝐷𝐷 = 2 V and
𝑅𝐷 = 2 kΩ. Assume the transistor is biased under saturation mode.
(7 marks)
Fig. 4(a)
b) The transistor in Fig. 4(c) has parameters 𝑉𝑇𝑁 = 0.4 V, and 𝐾𝑛 = 4.8 mA/V 2 . The
parameters of the circuit are 𝐼𝐷 = 0.8 mA and 𝑅1 ||𝑅2 = 200 kΩ . Assume that the
transistor is biased under saturation mode.
(6 + 3 marks)
i.
Design the circuit by calculating 𝑅1 and 𝑅2
ii.
Calculate the value of 𝑉𝐷𝑆 and confirm that the transistor is biased under
saturation mode
Fig. 4(c)
8
c) For an NMOS biased in the saturation region, the parameters are 𝐾𝑛′ = 0.1 mA/V 2 ,
𝑉𝑇𝑁 = 1.2 V and 𝐼𝐷 = 0.8 mA. Determine the transistor width to length ratio (𝑊/𝐿) such
that 𝑔𝑚 = 1.8 mA/V.
(4 marks)
9
QUESTION 5 (20 marks)
a) The parameters of the common source circuit shown in Fig. 5(a) are 𝑉𝐷𝐷 = 12,
𝑅𝐷 = 3 kΩ, 𝑅𝑆 = 0.5 kΩ, 𝑅1 = 894 kΩ, 𝑅2 = 347 kΩ and 𝑅𝐿 = 10 kΩ . The
transistor parameters are, 𝑉𝑇𝑁 = 1.2 V, 𝐾𝑛 = 1.5 mA/V 2 and 𝜆 = 0.
(6 + 5 marks)
i. Find the values of 𝐼𝐷 and 𝑉𝐷𝑆
ii. Determine the input resistance,
𝑅𝑖𝑛 and the small-signal voltage gain, 𝐴𝑣
Fig. 5(a)
10
b) Determine the output voltage 𝑣𝑂 for 𝑣𝐼 = 3 V for the op-amp circuit shown in
Fig. 5(b). Then, calculate the output current that flows through 5 kΩ resistor.
(4 marks)
Fig. 5(b)
c) For the inverting summing amplifier shown in Fig. 5(c), determine the value of 𝑅3 if all
the circuit parameters are given as: 𝑅1 = 50 kΩ, 𝑅2 = 40 kΩ, 𝑅𝐹 = 50 kΩ and
𝑣𝑂 = − 10 𝑉. The inputs to the circuit are, 𝑣𝐼1 = 1 V, 𝑣𝐼2 = 2 V and 𝑣𝐼3 = 0.3 V.
(5 marks)
Fig. 5(c)
11
Some Useful Equations
Equation for pn- junction:
I D  I s (e
vD
VT
 1)
Equations for BJT
I CQ
gm 
r 
VT
 VT
I CQ
g m r  
ro 
VA
I CQ
Equations for MOSFET
I D  K n [2VGS  VTN VDS  VDS ]
2
I D  K n VGS  VTN 
2
𝐾𝑛 =
′ 𝑊
𝑘𝑛
2 𝐿
ro 
VA
1

I DQ  I DQ

1
VA
g m  2 K n I DQ
END OF PAPER
12