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ASRA COLLEGE OF ENGINEERING & TECHNOLOGY STUDENT HAND BOOK Bachelor of Technology Semester- 5th Study Scheme- 2011 onwards DEPARMENT OF ELECTRONICS AND COMMUNICATION ENGINEERING ASRA COLLEGE OF ENGINEERING & TECHNOLOGY BHAWANIGARH (SANGRUR) Authors: Er.Vikas Goyal Er.ManpreetKaushal Er.Gagandeep Kaur Er.Navpreet Kaur Er.Shweta Sehgal DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 1 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY STUDY SCHEME Course code Course title BTCS-304 BTEC-501 Data Structures Digital Communication System Digital Signal Processing Linear Integrated Circuit Micro processors& Micro controllers Lab Digital Signal Processing Lab Linear Integrated Circuit Lab Digital Communication System Lab Hardware Programme& Interfacing Industrial Training BTEC-502 BTEC-503 BTEC-504 BTEC-505 BTEC-506 BTEC-507 BTEC-508 TOTAL Load allocation L T P 3 1 3 1 - Marks distribution Total Marks Credits Internal 40 40 External 60 60 100 100 4 4 4 3 4 1 1 1 - 40 40 40 60 60 60 100 100 100 5 4 5 - - 2 30 20 50 1 - - 2 30 20 50 1 - - 2 30 20 50 1 - - 2 30 20 50 1 60 40 100 1 380 420 800 26 17 5 8 DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 2 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY SYLLABUS Data Structures BTCS 304 PART-A 1. Dynamic Memory Management: Understanding pointers, usage of pointers, arithmetic on pointers, memory allocation, memory management functions and operators, debugging pointers - dangling pointers, memory leaks, etc. [2] 2. Introduction: Concept of data type, definition and brief description of various data structures, data structures versus data types, operations on data structures, algorithm complexity, Big O notation. [2] 3. Arrays: Linear and multi-dimensional arrays and their representation, operations on arrays, sparse matrices and their storage. [3] 4. Linked List: Linear linked list, operations on linear linked list, doubly linked list, operations on doubly linked list, application of linked lists. [4] 5. Stacks: Sequential and linked representations, operations on stacks, application of stacks such as parenthesis checker, evaluation of postfix expressions, conversion from infix to postfix representation, implementing recursive functions. [4] 6. Queues: Sequential representation of queue, linear queue, circular queue, operations on linear and circular queue, linked representation of a queue and operations on it, deque, priority queue, applications of queues. PART-B 7. Trees: Basic terminology, sequential and linked representations of trees, traversing a binary tree using recursive and non-recursive procedures, inserting a node, deleting a node, brief introduction to threaded binary trees, AVL trees and B-trees. [4] 8. Heaps: Representing a heap in memory, operations on heaps, application of heap in implementing priority queue and heap sort algorithm. [2] 9. Graphs: Basic terminology, representation of graphs (adjacency matrix, adjacency list), traversal of a graph (breadth-first search and depth-first search), and applications of graphs.[3] 10. Hashing & Hash Tables: Comparing direct address tables with hash tables, hash functions, concept of collision and its resolution using open addressing and separate chaining, double hashing, rehashing. [3] Searching & Sorting: Searching an element using linear search and binary search techniques, Sorting arrays using bubble sort, selection sort, insertion sort, quick sort, merge sort, heap sort, shell sort and radix sort, complexities of searching & sorting algorithms. [5] 1. SartajSahni, Data Structures, Algorithms and Applications in C++, Tata McGraw Hill. 2. Tenenbaum, Augenstein, &Langsam, Data Structures using C and C++, Prentice Hall of India. 3. R. S. Salaria, Data Structures & Algorithms Using C++, Khanna Book Publishing Co. (P) Ltd. 4. Seymour Lipschutz, Data Structures, Schaum's Outline Series, Tata McGraw Hill 5. Kruse, Data Structures & Program Design, Prentice Hall of India. 6. R. S. Salaria, Test Your Skills in Data Structures DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 3 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY DIGITAL COMMUNICATION SYSTEM BTEC-501 Internal Marks: 40 External Marks: 60 Total Marks: 100 LTP 310 UNIT I: - Elements of Digital Communication System:- Block diagram of Digital Communication system, Digital representation of Analog signals, Advantages and Disadvantages of Digital Communication system, Bandwidth –S/N trade off, Hartley Shannon Law, Sampling theorem . Concept of amount of Information and entropy, Shannon Fano Source Coding,Huffman source coding and Lampel-Ziv Source coding algorithm. UNIT-II: - Pulse Code Modulation:- Sampling, Sampling Rate, Aliasing, quantization error, Uniform and Non uniform quantization, Dynamic Range, Coding efficiency, A law & μ law companding, Bandwidth of PCM, Block diagram of PCM system, Delta Modulation, Continuously variable Slope Delta Modulator (CVSDM) or Adaptive Delta Modulation, Differential Pulse Code Modulation, Intersymbol Interference, Eye Patterns, Signal power in binary digital signals. UNIT-III Line Coding & Multiplexing Techniques: Line Coding & its properties. NRZ & RZ types, signaling format for unipolar, Polar, bipolar (AMI) & Manchester coding and their power spectra (No derivation), HDB and B8ZS signaling, Nyquist’s criterions for pulse shaping, Fundamentals of time division multiplexing, Bit versus word interleaving, Statistical TDM, Codecs & Combo Chips. Basics of TDMA, FDMA and CDMA UNIT-IV Digital Carrier Modulation & Demodulation Techniques: Introduction, Amplitude Shift Keying (ASK), ASK Spectrum, ASK Modulator, Coherent ASK Detector, Noncoherent ASK Detector, Frequency Shift Keying (FSK), FSK Bit Rate and Baud, Bandwidth and Frequency Spectrum of FSK, FSK Transmitter, Non-coherent FSK Detector, Coherent FSK Detector, FSK Detection Using PLL, Binary Phase Shift Keying, Binary PSK Spectrum, BPSK Transmitter, Coherent PSK Detection, Quadrature Phase Shift Keying (QPSK), QPSK Demodulator, Offset QPSK, π/4 QPSK, Comparison of conventional QPSK, Offset QPSK and π/4 QPSK, M-Ary BPSK, Quadrature Amplitude Modulation (QAM); MQAM transmitters and receivers, Band Width efficiency, Carrier Recovery; Squaring Loop & Costas Loop, Differential PSK, DBPSK transmitter and receiver, Constant Envelop Modulation; Minimum Shift Keying (MSK) & Gaussian Minimum Shift Keying (GMSK ), matched filter receivers, bandwidth consideration and probability of error calculations for ASK, PSK, FSK schemes. TEXT BOOK RECOMMENDED 1. Electronic Communication System Fundamentals through Advance Wayne Tomasi 5th 2009 Pearson Education. 2. Communication Systems, Fourth Edition, Simon Haykin, Wiley publication. BOOKS RECOMMENDED 1. Modern Electronic Communication, (6th edition), by Gary M. Miller, published by Prentice-Hall, 1999 2. Introduction to Communication Systems, third edition, by F. G. Stremler, AddisonWesley, 1990. 3. Digital Communication, E.A. Lee and D.G. Messerschmitt, , Kluwer Academic Publishers,1994 4. Digital Communication Receivers, H. Meyr, M. Moeneclaey, S.A. Fechtel, Wiley, 1998 5. Modulation and Coding Techniques in Wireless Communications by EVGENII KROUK, SERGEI SEMENOV, WILEY, 2011. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 4 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY DIGITAL SIGNAL PROCESSING BTEC-502 Internal Marks: 40 External Marks: 60 Total Marks: 100 LTP 410 UNIT I Introduction: Limitations of analog signal processing, Advantages of digital signal processing and its applications; Some elementary discrete time sequences and systems; Basic elements of digital signal processing such as convolution, correlation and autocorrelation, Concepts of stability, causality, linearity, difference equations. DFT and its properties; Linear Periodic and Circular convolution; Linear Filtering Methods based on DFT; Fast Fourier Transform algorithm using decimation in time and decimation frequency techniques; Goertzel algorithm. UNIT II The Z Transform: Introduction, Z-Transform, Region of convergence; Inverse Z Transform methods, properties of Z transform. UNIT III Design of Digital Filters: Structures of realization of discrete time system, direct form, Cascade form, parallel form and lattice structure of FIR and IIR systems. Linear Phase FIR filters; Design methods for FIR filters; IIR filter design by Impulse Invariance, Bilinear Transformation,Matched Z-Transformation, Analog and Digital Transformation in the Frequency Domain. Finite Precision Effects: Fixed point and Floating point representations, Effects of coefficient unitization, Effect of round off noise in digital filters, Limit cycles. UNIT IV DSP Processors: Architectures of ADSP and TMS series of processor . RECOMMENDED TEXT BOOK Digital Signal Processing Principles, Algorithms and Application John G Proakis, Dimtris G Manolakis 4th 2009. Books Recommended 1. Discrete-Time Signal Processing Alan V Oppenheim, Ronald W Schafer, John R Back 2nd 2008, Prentice Hall. 2. Digital Signal Processing S. Salivahan, AVallavaraj, Gnanpiya 1st 2008 Tata McGraw Hill. 3. Digital Signal Processing-A computer based approach S. K. Mitra 1st 2006 Tata McGraw Hill 4. Jervis, ―Digital Signal Processing‖, Pearson Education India. 5. Introduction to Digital Signal Processing JohnyR.Johnson 1st 2006, Prentice Hall. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 5 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY LINEAR INTEGRATED CIRCUIT BTEC-503 Internal Marks: 40 External Marks: 60 Total Marks: 100 LTP 310 UNIT I DIFFERENTIAL AND CASCADE AMPLIFIERS: Introduction, Differential Amplifier, Differential Amplifier Circuit Configuration, Dual Input-Balanced output Differential Amplifier, Dual Input-Unbalanced output Differential Amplifier, Single Input-Balanced output Differential Amplifier, Single Input-unbalanced output Differential Amplifier with their DC and AC analysis, Differential Amplifier with swamping resistors, Constant current bias, Current Mirror, Cascaded differential Amplifier Stages, Level Translator, CE-CB configuration. UNIT II INTRODUCTION TO OPERATIONAL AMPLIFIERS: Block diagram of a typical OpAmp, Schematic symbol, integrated circuits and their types, IC package types, Pin Identification and temperature range, Interpretation of data sheets, Overview of typical set of data sheets, Characteristics and performance parameters of and Op-Amp, Ideal Op-Amp, Equivalent circuit of an Op-Amp, Ideal voltage transfer curve, Open loop configurations : Differential, Inverting & Non Inverting. Practical Op-Amp: Input offset voltage, Input bias current, Input offset current, total output offset voltage, Thermal drift, Effcet of variation in power supply voltages on offset voltage, Change in Input offset voltage and Input offset current with time, Temperature and supply voltage sensitive parameters, Noise, Common Mode configuration and common mode rejection Ratio. Feedback configurations. UNIT III APLICATIONS OF OP-AMP: DC and AC amplifiers, Peaking Amp, Summing, Scaling and Averaging Amp, Instrumentation Amplifier, V to I and I and to V converter, Log and Antilog Amp, Integrator, Differentiator. Active filters: First order LP Butterworth filter, Second order LP Butterworth filter, First order HP Butterworth filter, Second order HP Butterworth filter, Higher order filters, Band pass filter, Band reject filters, All pass filter, Phase shift oscillator, Weinbridge oscillator, Quadrature oscillator, Square wave generator, Triangular wave generator, Sawtooth wave generator, Voltage controlled oscillator, Basic comparator, Zero crossing detector, Schmitt trigger, window detector, V to F and F to V converters, A to D and D to A converters, Peak Detector, Sample and Hold Circuit. UNIT IV SPECIALIZED IC APPLICATIONS: IC 555 Timer: Pin configuration, Block diagram, application of IC 555 as Monostable and AstableMultivibrator., Phase Lock Loops: Operating principles & applications of IC 565, Voltage Regulators: Fixed voltage regulators, Adjustable voltage regulators, Switching Regulators. Recommended Text Book: 1. Op Amps & Linear Integrated circuits by RamakantGayakwad. Recommended Reference Books 1. Op Amps & Linear Integrated circuits by Coughlin 2. Op Amps & Linear Integrated circuits by RaviRajDudeja. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 6 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY MICROPROCESSORS & MICROCONTROLLERS BTEC-504 Internal Marks: 40 External Marks: 60 Total Marks: 100 LTP 410 Unit I INTRODUCTION TO 8085 MICROPROCESSOR: History and evolution of Microprocessors, 8085 Microprocessor, Memory Interfacing, Memory mapped I/O and peripheral mapped I/O 8085 Microprocessor Programming model. Introduction to 8085 instructions, programming techniques, counters and time delays, stack and subroutines, interrupts. Unit II 8051 MICROCONTROLLER: Comparison of Microprocessor and Microcontroller, micro controller and embedded processors, Architecture and pin configuration of 8051 Unit III 8051 ASSEMBLY LANGUAGE PROGRAMMING: Introduction to 8051 Assembly programming, Data Types and directives, 8051 flag bits and PSW register. Register banks and stack. Jump loop and call instructions, I/O Port programming: Addressing modes and accessing memory using various addressing modes. Arithmetic instructions and programs, Logic instructions and programs, Single bit instructions and programming, Timer/counter programming in the 8051. Unit IV SERIAL COMMUNICATION: 8051 connection to RS 232, 8051 serial communication programming, interfacing of 8051microcontroller: LCD, ADC and DAC, Stepper motor. Recommended Text Books:1. Microprocessor Architecture, Programming and application with 8085 by Gaonkar 2. The 8051 Microcontroller and embedded Systems by: - Ali Mazidi, Pearson Education 3. The 8051 Microcontroller by K. J. Ayala, Cengage Learning. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 7 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY LAB DIGITAL SIGNAL PROCESSING BTEC-505 Internal Marks: 30 External Marks: 20 Total Marks: 50 LTP 002 List Of Experiments: Perform the following exercises using MATLAB 1. To develop elementary signal function modules (m-files) for unit sample, unit step, exponential and unit ramp sequences. 2. Write a program in MATLAB to generate standard sequences. 3. Write a program in MATLAB to compute power density spectrum of a sequence. 4. To develop program modules based on operation on sequences like signal Shifting, signal folding, signal addition and signal multiplication. 5. Write a program in MATLAB to verify linear convolution. 6. Write a program in MATLAB to verify the circular convolution. 7. To develop program for finding magnitude and phase response of LTI system Described by system function H(z). 8. To develop program for finding response of the LTI system described by the difference equation. 9. To develop program for computing inverse Z-transform. 10. To develop program for computing DFT and IDFT. 11. To develop program for conversion of direct form realization to cascade form realization. 12. To develop program for cascade realization of IIR and FIR filters. 13. To develop program for designing FIR filter. 14. To develop program for designing IIR filter. 15. To write a MATLAB program for noise reduction using correlation and autocorrelation methods. 16. To write a MATLAB programs for pole-zero plot, amplitude, phase response and impulse response from the given transfer function of a discrete-time causal system. 17. Write a program in MATLAB to find frequency response of different types of analog filters. 18. Write a program in MATLAB to design FIR filter (LP/HP) through Window technique a. Using rectangular window b. Using triangular window DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 8 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY LAB LINEAR INTEGRATED CIRUIT BTEC-506 Internal Marks: 30 External Marks: 20 Total Marks: 50 LTP 0 0 2 List Of Experiments: 1. To study differential amplifier configurations. 2. To measure the performance parameters of an Op amp. 3. Application of Op amp as Inverting and Non Inverting amplifier. 4. To study frequency response of an Op Amp 5. To use the Op-Amp as summing, scaling & averaging amplifier. 6. To use the Op-Amp as Instrumentation amplifier 7. Design differentiator and Integrator using Op-Amp. 8. Application of Op Amp as Log and Antilog amplifier. Design Low pass, High pass and Band pass 1st order butterworth active filters using Op Amp. 9. Design Phase shift oscillator using Op-Amp. 10. Design Wein Bridge oscillator using Op-Amp. 11. Application of Op Amp as Sawtooth wave generator. 12. Application of Op Amp as Zero Crossing detector and window detector. 13. Application of Op Amp as Schmitt Trigger. 14. Design a series regulators with an error amplifier to provide an output voltage of 5 volt at a load current of 1.5 Amp. Use a 741 Op-Amp and specify the Zener voltage necessary transistor gain and the maximum power dissipation of the transistor. 15. Design a delay circuit using 555. 16. To examine the operation of a PLL and to determine the free running frequency, the capture range and the lock in range of PLL. 17. Verification of hardware results obtained using SPICE. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 9 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY Lab-Digital Communication System BTEC-507 Internal Marks: 30 External Marks: 20 Total Marks: 50 LTP 002 LIST OF EXPERIMENTS 1. Study of Time Division Multiplexing system. 2. Study of pulse code modulation and demodulation. 3. Study of delta modulation and demodulation and observe effect of slope overload. 4. Study pulse data coding techniques for various formats. 5. Data decoding techniques for various formats. 6. Study of amplitude shift keying modulator and demodulator. 7. Study of frequency shift keying modulator and demodulator. 8. Study of phase shift keying modulator and demodulator. 9. Error Detection & Correction using Hamming Code 10. Digital link simulation; error introduction & error estimation in a digital link using MATLAB (SIMULINK)/ communication simulation packages. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 10 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY Lab Hardware Programme& Interfacing BTEC-508 Internal Marks: 30 External Marks: 20 Total Marks: 50 LTP 002 LIST OF EXPERIMENTS Note: Any Eight Experiments each from Part A and Part-B Part-A: List of Experiments using 8085/8086: 1. Study of 8085 and 8086 Microprocessor Kits. 2. Write a program to add two 8-bit number using 8085. 3. Write a program to add two 16-bit number using 8085. 4. Write a program to subtract two 8-bit number using 8085. 5. Write a program to subtract two 16-bit number using 8085. 6. Write a program to multiply two 8 bit numbers by repetitive addition method using 8085. 7. Write a program to sort series using bubble sort algorithm using 8085. 8. Write a program to copy 12 bytes of data from source to destination using 8086. 9. Write a program to find maximum and minimum from series using 8086. 10. Write a program to control the operation of stepper motor using 8085/8086 microprocessors and 8255 PPI. 11. Write a program to control speed of DC motor using 8085/8086 microprocessors and 8255 PPI. Part-B: List of Experiments using 8051: 1. Study of 8051/8031 Micro controller kits. 2. Write a program to add two numbers lying at two memory locations and display the result. 3. Write a program for multiplication of two numbers lying at memory location and display the result. 4. Write a Program to arrange 10 numbers stored in memory location in Ascending and Descending order. 5. Write a program to show the use of INT0 and INT1. 6. Write a program of Flashing LED connected to port 1 of the Micro Controller 7. Write a program to generate a Ramp waveform using DAC with micro controller. 8. Write a program to interface the ADC. 9. Write a program to control a stepper motor in direction, speed and number of steps. 10. Write a program to control the speed of DC motor. 11. Interfacing of high power devices to Micro-controller port-lines, LED, relays and LCD display. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 11 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY SUBJECT- LIC LIST OF ASSIGNMENTS ASSIGNMENT- 1 Q1) what is Differential Amplifier. Q2) Explain the circuit configurations of differential amplifier. Q3) Describe the AC Analysis of the differential amplifier. Q4) Describe the cascading of differential amplifier. Q5) Comparison of different configurations of Differential amplifier. ASSIGNMENT- 2 Q1) Draw and explain the block diagram of typical op-amp. Q2) Define the terms PSRR and CMRR. Q3) what do you mean by level translator circuit. Q4) Describe the effect of voltage and current drifts. Q5) Describe the effect of feedback on total offset voltage ASSIGNMENT- 3 Q1) Explain the summing amplifier, scaling amplifier and Averaging amplifier. Q2) Explain the Instrumentation amplifier, V to I Convertor, Log Amplifier, Antilog Amplifier, Integrator and Differentiator. Q3) write short note on Phase shift oscillator, Wein Bridge Oscillator, square wave generator, Schmitt trigger and sample and hold circuit. ASSIGNMENT- 4 Q1) Explain the IC 555 Pin Configurations. Q2) Explain the IC 555 as monostable and astablemultivibrator. Q3) Explain the switching regulators, Fixed voltage regulator and PLL . DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 12 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY SUBJECT- LIC LIST OF TUTORIAL SHEETS TUTORIAL SHEET-1 1. Compute the output signal and the noise on the output from the following data Ad =100, ρ=100dB, Vin1and Vin2 are 50mV and 100mV respectively with 1mV of noise on each input 2. An 741 Op-Amp having the following parameters is connected as a non-inverting amplifier with R1=1k ohm, RF=10K Ohm, A=200000,Ri=2M ohm, Ro=75 ohm and fo=5Khz, supply voltage = 15V, Output Voltage swing= 13V.Compute the values of Af,Rif,Rof,Ff and Vout 3. A 100 pico farad capacitor has a maximum charging current of 150 micro amp.? What is slew rate. 4. An op-Amp has a slew rate of 35V/micro second. How long will it take the output to charge from 0 to 15 V. TUTORIAL SHEET-2 1. Design a Differentiator to differentiate an input signal that varies in the frequency from 10Hz to about 1 Khz. 2. Design a Low Pass Filter at a cut off frequency of 1Khz with a pass band gain of 2. 3. Design a 60Hz active notch filter. TUTORIAL SHEET-3 1. Using the 7805 voltage regulator design a current source that will deliver a 0.25 A current to a 48 ohm , 10W Load. 2. Design a Quadrature Oscillator with fo=159Hz. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 13 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY SUBJECT-MP &MC LIST OF ASSIGNMENTS ASSIGNMENT- 1 1.Explain in detail features of 8085. 2. Explain in details architecture of 8085? 3.What is microprocessor state any six applications of microprocessor based system. 4.Draw the Pin Diagram of 8085 & explain the function of each pin? 5.Write a short note on 1. Program counter 2. Flag resister.. ASSIGNMENT-2 1.Comparisson between microprocessor and microcontroller , 2.Explain micro controller and embedded processors 3. Architecture of 8051 4.pin configuration of 8051 ASSIGNMENT-3 1.Introduction to 8051 Assembly Programming 2.What is Stack 3.Explain Data Types and directives 4. Note on 8051 flag bits and PSW register. ASSIGNMENT- 4 1.Explain Register banks, 2.Explain Addressing modes in detail, 3.Explain Arithmetic instructions and WAP programs for elaboration. 4.Write a note on Logic instructions and WAP programs for elaboration DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 14 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY ASSIGNMENT- 5 1.8051 connection to RS 232, 8051 serial 2.communication programming. 3.interfacing of 8051microcontroller with LCD. 4.interfacing of 8051microcontroller with ADC. 5.interfacing of 8051microcontroller with Stepper motor. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 15 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY SUBJECT-MP &MC LIST OF TUTORIAL SHEETS TUTORIAL SHEET- 1 Q1) What is 8085. Q2) How many pins are there in 8085 microprocessor. Q3) What is the purpose of ALE pin. Q4) Explain Addressing modes of 8085 Q5) Comparison between IO mapped IO & MEMORY mapped IO. Q6) Define memory mapping Q7) What is DMA TUTORIAL SHEET-2 Q1) What are the basic units of microprocessor Q2) What is a bus Q3) Why data bus is bi-directional? Q4) What does memory-mapping mean Q5) Describe the function of the following pins in 8085 Q6) Define stack? Q7) What is program counter? How it is useful in program execution? TUTORIAL SHEET-3 Q1) What is PSW? Q2) Draw pin diagram of 8085 and define the purpose of each pin. Q3) Draw and explain the architecture of 8085 in detail. Explain each term Q4) What is meant by micro controller? Q5) List the features of 8051 micro controllers? Q6) Explain the operating mode 0 of 8051 serial port? Q7) Explain the interrupts of 8051 micro controller? DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 16 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY SUBJECT- DCS LIST OF ASSIGNMENTS ASSIGNMENT- 1 Q1 Draw and explain the block diagram of Digital Communication System. Q2 State and prove Sampling theorem. Q3 State and Explain Shannon's Channel Capacity Theorem. Q4Discuss uniform quantization of a signal? Q5 Differentiate with the help of neat diagram between sampling and quantization ASSIGNMENT- 2 Q1 Compare A-Law and, µ-Law. Q2 Discuss with block diagram a PCM system? Q3 Describe with block diagram the working of adaptive delta modulation. Q4 Explain how DPCM improves system performance. Q5 Explain how eye pattern are useful for studying inter symbol interference in Digital Communication System. ASSIGNMENT- 3 Q1 Discuss the advantages and disadvantages of the following signaling formats: (i) Unipolar NRZ (ii) Bipolar RZ (iii) Alternate mask inversion RZ. Q2 Discuss Manchester coding and its power spectra? Q3 Describe Codec and Combo chip. Q4 Explain Statistical TDM. Also discuss the advantages and disadvantages of TDM. Q5 Differentiate between TDMA/CDMA/FDMA. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 17 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY ASSIGNMENT- 4 Q1 (a) Describe with block diagram ASK modulator? (b) Describe with block diagram Coherent ASK detector? Q2 Define FSK Modulation scheme using appropriate block diagram. Q3 Explain FSK detection using PLL? Q4 Explain the following with proper diagram wherever applicable: (a) FSK Bit Rate and Baud Rate. (b) Bandwidth and Frequency Spectrum of FSK. (c) FSK Transmitter. Q5 State the disadvantages of DPSK and PSK ASSIGNMENT- 5 Q1 Sketch phase state diagram of QPSK modulator. Q2 Compare 8QAM with 16 QAM? Q3 Describe DBPSK receiver with block diagram? Q4 Draw the block diagram of an 8-QAM modulation scheme and describe its function. Q5 What is major advantage of MSK? Explain Gaussian Minimum Shift Keying DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 18 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY SUBJECT- DCS LIST OF TUTORIAL SHEETS TUTORIAL SHEET - 1 Q1 Justify the statement "Digital Transmission is more reliable"? Q2Define Shannon limit for information capacity? Q3 What is ISI? Write a method to avoid inter symbol interference? Q4 Differentiate with the help of neat diagram between sampling and quantization. Q5 Define bandwidth of PCM? TUTORIAL SHEET –2 Q1What is the cause of slope overload error in delta modulation? Q2 Explain Fundamentals of time division multiplexing? Q3 Why is clock recovery required in a BPSK demodulator circuit? Q4 Explain the relationship between bits per second and baud for FSK system. Q5What is a Non-coherent FSK Detector? Discuss briefly. TUTORIAL SHEET –3 Q1 What is the phase difference between two possible transmitter signals in BPSK? Q2 Write main drawback of coherent ASK detector? Q3 Draw the waveforms of an unmodulated carrier, data of ASK, PSK and FSK. Q4 Sketch the QPSK waveform for the sequences 110101011 assuming the carrier frequency to be equal to the bit rate. Q5 Determine the bandwidth efficiency for the QPSK modulator and 8-PSK modulator with Fb : l0Mbps. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 19 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY SUBJECT- DSP LIST OF ASSIGNMENTS ASSIGNMENT- 1 1. 2. 3. 4. Describe basic elements of DSP with Block diagram What are advantage of DSP over ASP? What are the application of DSP ? Write all elementary signals ? ASSIGNMENT- 2 1. 2. 3. 4. 5. Differentiate between correlation and auto correlation How will you check stability, linearity,and causality of a system What are recursive and Non Recursive system State and explain Linear convolution . Explain FFT DIT ASSIGNMENT- 3 1. 2. 3. 4. What is the physical significance of Z- transform State convolution property of Z transform. State and prove linearity and time inversion property of Z transform. Find the inver z transform of X(z)= z2+ 5z-9 3z2-6z+10 ASSIGNMENT- 4 1. 2. 3. 4. Differentiate between FIR and IIR filters. Drive the direct form structure of Fir filter. Drive the direct form 11 structure of IIR filter. Explain window method of FIR filter design. ASSIGNMENT- 5 1. What is quantization noise ? 2. Draw and explain the structure of ADSP . DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 20 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY SUBJECT- DSP LIST OF TUTORIAL SHEETS TUTORIAL SHEET-1 1. Write down an expression in the z-domain for Y(z) in terms of X (z) and H(z) .and also Write down an expression for X (z) in terms of x(n) . 2. Find the inverse z-transform of the system for regions of convergence z<1. 3. Find the Z transform of unit ramp signal. 4. State and prove convolution property of Z transform. TUTORIAL SHEET-2 1. Find the linear convolution of two signals given below x(n)=[1,2,3,4,5] h(n)=[1,2,1] 2. Find the linear convolution of x(n)=u(n) – u(n-3) and h(n)=[2,2,2] 3. State and prove the linearity property of fourier transform 4. Calculate the fourier transform of unit impulse signal. TUTORIAL SHEET-3 1. 2. 3. 4. 5. Draw diagram of radix-2 FFT algorithm for 4 points. Find FFT of x = [1,−2, 4, 2]. Compare FIR and IIR filters. Discuss cascaded structure of FIR filter. Discuss Bilinear Transformation What is the effect of coefficient quantization ? DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 21 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY SUBJECT-Data Structure LIST OF ASSIGNMENTS ASSIGNMENT- 1 1. 2. 3. 4. 5. What is data structure? Explain Data structure operations and briefly explain its types. Explain the complexity of algorithm. Explain the concept of Asymptotic Notation. What is Array? Explain its operation. Explain sparse matrices and their storage. ASSIGNMENT-2 1. What is the difference between stack and queue? Explain their operation. 2. Consider the following arithmetic operation Q: A+(B*C-(D/E^F)*G)*H convert it into postfix notation using stack. 3. Explain circular queue, dequeue and priority queue. 4. What is Linked list? Explain its operation. 5. Explain two way linked list and doubly linked list. ASSIGNMENT-3 1. Define the following terms: a) Binary Tree b) Complete Binary Tree c) Depth of a Tree d) Binary Search Tree 2. Explain the concept of traversing Binary Tree. 3. How AVL Tree is different from Binary Search Tree? 4. Explain B-Tree with example. 5. What is the difference between Binary tree, Binary search tree and Complete Binary tree? ASSIGNMENT-4 1. What is a heap? Explain insertion and deletion in a heap with example. 2. Sort the following example using heapsort: 44,33,67,12,45,78,32,11,56 3. Explain graphs and their operations. 4. Explain breadth first search and depth first search in detail. 5. Explain hashing in detail. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 22 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY SUBJECT-DataStructure LIST OF TUTORIAL SHEETS TUTORIAL SHEET-I 1) Suppose a 32 bit memory location AAA contains the following sequence of bits: 0100 1101 1100 0001 1110 1001 0101 1101 Determine the data stored in AAA. 2) Consider the Linear Array NAME in Figure which is sorted alphabetically. a) Find NAME [2], NAME [4] and NAME [7]. b) Suppose Baljeet is to be inserted into the array. How many names must be moved to the new locations and how? c) Suppose Gagan is to be deleted from the array. How many names must be moved to the new locations and how? d) How to traverse the whole array. NAME Anil Charan Ekta Gagan Jaskiran Leena Prince Sunil 3) What is row major order and column major order? Explain it with the diagram. 4) Consider the linear arrays AAA(5:50), BBB(-5:10), CCC(18). a) Find the number of elements in each array. b) Suppose Base (AAA) = 300 and w=4 words per memory cell for AAA. Find the address of AAA [15], AAA[35] and AAA[55]. 5) What are the advantages of a doubly linked list over a singly linked list? 6) Write the differences between the lower bound, Upper bound and tight bound. 7) Are the array elements using sequential memory location? Explain. 8) Given only a pointer to a node to be deleted in a singly linked list, how do you delete it? DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 23 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY 9) Integers may also be viewed as real numbers. Give some reasons for having two different data types. 10) The element being searched for is not found in an array of 100 elements. What is the average number of comparisons needed in a sequential search to determine that the element is not there, if the elements are completely unordered? TUTORIAL SHEET-2 1. Which of the following statement is not true about linked lists? And How? a) Elements are not necessarily stored in contiguous location. b) Insertion and deletions can be performed efficiently as compared to arrays. c) Element in a linked list, if it is stored, can be quickly searched by applying binary search technique. d) Linked list is a dynamic structure. 2. How would you sort a linked list? 3. Explain Linked List? Consider a Linked list of Five elements {A,B,C,D,F} and insert a new ITEM=’E’ at location LOC=4? Write down the algorithm for this also? 4. Explain two way header list. 5. Discuss the advantages, if any, of a two-way list over a one way list for each of the following operations: a) Traversing the list to process each node. b) Deleting a node whose LOC is given. c) Searching an unsorted list for an given element ITEM. d) Searching a sorted list for an given element ITEM. e) Inserting a node before the node with a given location LOC. f) Inserting a node after the node with a given location LOC. DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 24 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY 6. What is header node? Write a program to implement circular singly linked list. Perform insertion, deletion operation. 7. Suppose LIST is in memory. Write an algorithm which deletes the last node from LIST. TUTORIAL SHEET-3 1. Stack is called FIFO list. Is it true? And How? 2. Stack can be described as a pointer. Explain. 3. Entries in a stack are “ordered”. What is the meaning of this statement.? a) A collection of stacks can be stored. b) Stack entries may be compared with the ‘<’ operation. c) The entries must be stored in a linked list. d) There is a first entry, a second entry ,and so on. 4. What is the difference between ARRAY and STACK? 5. Consider a stack which is allocated N=4 memory cell? STACK: AAA, BBB,_________,__________ Describe the following operations takes place a) POP(STACK,ITEM) b) PUSH(STACK ITEM) c) POP(STACK,ITEM) 6. Explain the sequential and linked representation of the stack in memory. 7. Consider the following arithmetic expression P written in postfix notation: P: 5, 6, 2, +, *, 12, 4, /, Write the infix expression for P. 8. Evaluate the following prefix expressions “++26 + - 1324” DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 25 ASRA COLLEGE OF ENGINEERING & TECHNOLOGY 9. Convert it into postfix notation using stack. A*(B+D)/E-F*(G+H/K) TUTORIAL SHEET-4 1) Suppose the following list of letters are inserted in order into an empty binary search tree: J,R,D,G,T,E,M,H,P,A,F,Q a) Find the final tree T b) Find the in order traversal of tree T 2) Insert the following keys in the order shown to construct an AVL search tree A,B,C,D,E 3) Find which of the following is a a) Binary Search Tree b) AVL Search Tree c) Skewed Binary Search Tree d) Binary Tree 4) Construct a B-Tree of order 2-3 tree by inserting the following keys in the order shown into an empty B- tree: M,Q,A,N,P,W,X,T,G,E,J 5) Consider the graph in fig. Suppose the niodes are stored in memory in a linear array DATA as follows: DATA X,Y,Z,W 6) Suppose the following 8 no. are inserted in order into an empty binary search tree: 50, 33,44,22,77,35,60,40 Draw the tree T 7) The following is the adjacency matrix A of an undirected graph G: 0 1 0 1 0 1 0 0 1 1 A= 0 0 0 1 1 1 1 1 0 1 0 1 1 1 DEPARTMENT OF ELECTRONICS & COMMUNICATION ENGINEERING Page 26