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International Journal of Electrical, Electronics and Computer Systems (IJEECS)
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A Low-Power Analog Lock-In Amplifier for Bio-Medical Applications
1
M.Santhanalakshmi, 2Dhanya V Prabhu
Assistant Professor, Dept of ECE,PSG College of Technology1 , PG Student, Dept of ECE,PSG College of Technology2
Email: [email protected], [email protected]
Abstract— A lock-in amplifier [LIA] can retrieve signals in
an enormous noisy background. Preferably, it can also
provide obvious measurement of signals over several orders
of magnitude and frequency. In this paper, a low power LIA
is designed and simulated. For this, various existing
structures have been compared in terms of power, gain,
noise and several other parameters. The proposed TIA
structure consumes 8% lesser power and has a significant
improvement in gain by 54% compared to existing replica
biasing TIA. The low power LIA can be made use of in
various bio-medical applications like spectroscopic
applications where sensing of signals in the presence of noise
becomes critical. The noise and deformation of signals are
suppressed with filters. All the circuits have been simulated
using Cadence Spectre GPDK 180 nm technology.
Index
TermsAmplifier,
CMOS,
Transconductance Amplifier, TIA.
Operational
I. INTRODUCTION
LIAs are mainly used in physical and chemical sensing
applications [1]–[3]. In fact, in some sensor applications,
the signal (current or voltage) to be measured is very
small in amplitude and is sometimes lower than noise
level. Hence, a normal linear filtering method [1] cannot
be employed. In such cases, LIAs (analog or digital) can
be used. Earlier LIAs were all analog. Nowadays, output
digital filters are being employed.
Analog LIAs provide a DC output proportional to the AC
signal being used. They generally have better output
filtering. But, digital LIAs are popular because of better
output stability and better price/performance ratios. Also,
they make use of digital circuitry for their phase detector
block. A basic analog LIA consists of a signal channel
which passes the input signal, reference channel to pass
the reference signal, mixer and DC amplifier/low-pass
filter as shown in Fig.1.
Fig.1. Block diagram of a basic LIA
In De Marcellis et al. [1], a low-frequency LIA operating
under 100-Hz frequency was described. The input signal
was processed by a low-noise amplifier (LNA) and a
bandpass filter. The design was implemented in CMOS
0.35µm technology. But, the reference signal was
generated externally and low noise amplifier contained
more number of transistors which increased the area. The
structure of the LIA proposed by Gnudi et al in [2] was
similar to the structure described in [1].The design was
fabricated in CMOS 0.70µm technology. In this work, the
reference signal was generated externally and switched
capacitor implementation of LNA was used. In Azzolini
et al. [3], the LIA was used to detect low-level signals in
magnetically excited resonant structures. The lock-in
front end consisted of three stages, LNA having large
gain, high pass filter and programmable gain stage. The
input signal was modulated by a pair of quadrature signals
where the reference signal was generated by a
phase-locked loop (PLL) and the design was fabricated in
CMOS 0.35µm technology. But, all these designs
required an externally generated reference signal for
phase detection. A new architecture that does not require
any external reference signal was proposed by Vamsy
et.al in [4]. The reference signal was generated internally
using a PLL.
Hence, the structure of LIA from [4] has been used as a
reference to design various blocks for a low power LIA.
The rest of this paper is organized as follows. Section II
describes the circuit implementation of the basic building
blocks of an LIA. Section III contains the comparative
results. Finally, the paper concludes in Section IV.
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II. CIRCUIT IMPLEMENTATION
The block diagram of an optoelectronic LIA as mentioned
in [4] is shown in Fig.2.
Fig.2. Block diagram of Optoelectronic LIA
Here, the basic building blocks of LIA include a
replica-biasing transimpedance amplifier (TIA), a unity
gain voltage amplifier; filter circuitry, a four-quadrant
mixer and PLL. A phototransistor array is used as the
input current source. The current source provides the
input current signal. This current signal is converted into a
voltage signal through a high-gain TIA where the DC and
AC components of the current are amplified. The high
pass filter then removes the undesired DC offset voltage.
The output signal is then processed by a bandpass filter to
remove the noise. The high-pass filter after the bandpass
filter removes the DC offset voltage introduced by the
bandpass filter. Next, the signal is amplified to rail-to-rail
amplitude by an amplifier, and the amplifier output signal
is given to a PLL. The PLL generates the reference
frequency at which the signal gets locked.
In the modified design, a DC current source is used
instead of a phototransistor array to provide the input
current. A low-power, high-gain TIA has been proposed
to be used at the front-end of the LIA. A folded-cascode
OTA with high gain and wide output-swing has been used
as the voltage amplifier. A modified design of
phase-frequency detector making use of TSPC logic has
been implemented inside the PLL block. An
NMOS-switch high-swing cascode charge pump with
gain-boosting circuitry has been proposed to replace the
conventional charge-pump design. The frequency divider
circuit of PLL has been implemented using cascaded
T-flip flop. All the filters are designed using OTA as
mentioned in [4].
Fig.3. (a) Current-mode TIA (b) Shunt feedback TIA
A replica biasing TIA which has been used at the
front-end in [4] is shown in Fig. 4. Here, the transistors
M3 AND M4 are stacked in order to increase the TIA
transimpedance. The output DC voltage is forced to be
approximately equal to bias voltage through replica
biasing circuitry. Thus, the output voltage equals the
biasing voltage Vbx.
Fig.4. Schematic of replica biasing TIA
B. Proposed Transimpedance Amplifier
The proposed high-gain, low-power TIA is shown in
Fig.5.
A. Conventional Transimpedance Amplifier
The TIA serves the purpose of converting the generated
photocurrent signal into a voltage signal. The use of
optical sensors for clinical applications is increasing day
by day. The most commonly used CMOS front-end TIAs
for optical sensing are current-mode and shunt-feedback
type [5] as in Fig.3.a and 3.b.
Fig.5. Proposed TIA
Here, a capacitive-feedback loop topology has been used.
A current amplifier making use of two-stage miller OTA
structure as shown in Fig.6 is used in the capacitive
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feedback loop. This amplifier has high output impedance
Rout. The gain of the amplifier is given by (1):
common-mode feedback (CMFB) circuit. Band pass filter
circuit has been evolved from the conventional design in
[6] as shown in Fig.8.
(1)
In the input stage of the OTA, large-sized PMOS
transistors are used. This is to minimize the input-referred
flicker noise and mismatch. A normal voltage buffer may
be used at the output.
Fig.8. Conventional second order band pass filter
The transfer function of band pass filter is given as in (3):
c. Low Pass Filter
Fig.6. Miller two-stage OTA
C. Filters
The output filter is to remove the AC components from
the desired DC output. The low-pass filter only retains the
tone located at the desired frequency ωo. The pass band
gain is unity.
a. High Pass Filter
The transfer function of low pass filter is given as in (4):
The phototransistor output current contains AC and DC
components which are amplified by the TIA. A high-pass
filter is added after the TIA stage inorder to remove the
undesired DC offset voltage which might affect the
processing of further stages. The high-pass filter designed
using operational transconductance amplifier (OTA) is
shown in Fig.7.a and 7.b.
The unity gain frequency response of high pass, low pass
and band pass filters is depicted in Fig.9.
Fig.7. (a) High pass filter (b) OTA for High pass filter
The transfer function of high pass filter is given as in (2):
b. Band Pass Filter
The band pass filter is used to remove the noise and the
interference accompanying the desired signal which is to
be detected. The common-mode output voltage
fluctuations involved can be eliminated using a
Fig.9. Frequency response of filters
All the filters are simulated at 24 KHz cut-off frequency.
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D. Voltage Amplifier
A folded cascode OTA with cascode current mirror load
[8] is used to implement the voltage amplifier as shown in
Fig.10.The folded cascode OTAs have higher input to
output swing range, good PSRR and high open loop gain.
Fig.10. Folded cascode OTA with cascode current mirror
load
The simulated folded cascade OTA has a gain of 88dB.
E. Mixer
A basic four quadrant analog CMOS mixer [11] is used in
the design of LIA as shown in Fig.11. It is intended to
perform a linear product of two continuous signals x and
y.Fig.12.shows the transient response of mixer.
Fig.12. Transient response of four quadrant analog
CMOS mixer
The dc response of the mixer is shown in Fig.13. All the
four quadrants have been swept by the mixer.
Fig.13. DC response of four quadrant analog CMOS
mixer
Fig.11 CMOS four quadrant mixer.
F. Phase Locked Loop
A phase locked loop (PLL) is a circuit, which
synchronizes the output signal with a reference signal in
both frequency and phase. The basic block diagram of a
PLL [7] is shown in Fig.14. It consists of a phase
frequency detector, low pass filter, charge pump and
voltage controlled oscillator.
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Fig.14. Block Diagram of Phase-locked loop
a. Phase Frequency Detector
The Phase Detector (PD) detects the phase difference
between the two input signals, i.e. the reference signal and
the VCO output signal. PFD generates two signals UP
and DN. In this paper, the PFD has been designed using
dynamic CMOS logic by making use of True Single Phase
Clock (TSPC) logicas shown in Fig.15. This significantly
reduces the number of transistors required and the power
consumed compared to conventional PFD.
Fig.17 Proposed charge pump circuit
d. Loop Filter
The loop filter is one of the essential components of PLL.
If the loop filter values are not selected correctly, it may
take long time to lock.
e. Voltage Controlled Oscillator (VCO)
Fig.15. PFD using TSPC logic
b. Conventional Charge Pump
The charge pump which is an essential part of a PLL
converts the voltage pulse from the phase frequency
detector into current. The current is injected constantly
into the loop filter. Fig.16 shows a conventional charge
pump circuit. The two switches of the conventional
charge pump have been replaced by PMOS and NMOS
transistors.
A current starved VCO has been used as the ring oscillator
for PLL as shown in Fig.18. There are five inverter stages
in the circuit which is an essential condition for the ring
oscillator.
Fig.16. Conventional charge pump
A conventional charge pump has possibilities of having
both timing and current mismatch.
c. Proposed Charge Pump
In order to improve the matching characteristics,
switching speed and the output impedance, gain boosting
[9] concept has been introduced into an NMOS-switch
current steering charge pump with cascode load [11] as
shown in Fig.17.
Fig.18. Current starved VCO
f. Frequency Divider
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The VCO is designed in such a way that the output of the
VCO is ‘N’ times the reference frequency. So, the output
of the VCO is passed through a divide by ‘N’ counter and
fedback to the input. The frequency divider is
implemented using cascaded T flip flops. T flip flop has
been designed using D flip flop with the Qbar output
connected to the D input as shown in Fig.19.
Fig.19. Tflip flop using D flip flop
The overall integrated circuit is shown in Fig.20.
t(Hz))
Output
referred
noise(nV/sqr
t (Hz))
26.6
19.68
37.3
15.57
From Table.I, it can be inferred that the proposed TIA
outperforms the other TIAs. In terms of power, it fairs
better by 8% and in terms of gain by 54% when compared
to a replica biasing TIA.
Table.II shows the comparative results for all the three
filters. The operating range of filters is set within a range
of 13 kHz to 26 kHz. Both high pass and low pass filter
can be implemented using same OTA.
Table.II Comparative Results for Filters
Fig.20 Overall integrated circuit
The overall gain of the circuit is found to be around 56dB
as shown in Fig.21.
Filter
Type
Transistor
Count
Power
(nW)
Input
referred
noise
(nA/sqrt(Hz))
Output
referred
noise(µV/sq
rt (Hz))
High
Pass
7
496
43
113
Low
Pass
7
367
65
151
Band
Pass
15
348
118
52
It can be inferred from Table.II that in terms of power,
bandpass filter consumes lesser power and has lesser
input and output referred noise compared to other two
filters. Due to the use of CMFB circuit, bandpass filter has
more number of transistors.
Fig.21.Overall gain of the integrated circuit
III. COMPARISON RESULTS
All the circuits have been designed and implemented
using Cadence Spectre GPDK 180 nm technology.
The comparative results for three different types of
voltage amplifiers are shown in Table. III.
Table. III Comparative results for Voltage Amplifiers
AMPLIFIER
TYPE
The front-end of LIA consists of a TIA. The proposed low
power, high gain TIA has been compared with various
TIA structures. The comparative results are as shown in
Table.I.
TWO
FOLDED
STAGE
CASCODE(CASCOD
FOLDED
CASCODE(WI
OPAMP
[10]
E
LSON
CURRENT
MIRROR LOAD)
CURRENT
[8]
MIRROR
LOAD)
GAIN (DB)
80
88
[8]
84
INPUT
REFERRED
NOISE
(NA/SQRT(H
Z))
OUTPUT
REFERRED
NOISE
40.12
22.08
32.206
660.78
390.23
512.60
Table.I Comparative Results for TIA
TIA TYPE
POWER
(µW)
GAIN
(dB)
Input
referred
noise(nA/sqr
Replica
bias
[4]
980
Curren
t mode
[5]
2800
Shunt
feedback
[5]
1400
Proposed
75
35
50
165
13.7
12.2
14.3
3.4
900
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International Journal of Electrical, Electronics and Computer Systems (IJEECS)
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(µV/SQRT(H
Z))
PSRR(DB)
100.3
141.1
103.6
CMRR(DB)
105.6
134.8
111.5
The VCO frequencies obtained for different control
voltages have been tabulated in Table.V. Using these
values, the graph depicting the linearity of VCO has been
plotted in Fig.22.
Table.III infers that folded cascode OTA with cascode
current mirror load has the highest gain of 88dB, PSRR of
around 141 dB and CMRR of around 134dB. It also
consumes 335µW power..
Table.Ӏ V shows the comparison between the various
charge pump circuits that have been implemented.
Table.IV Comaprison of charge pumps
Charge
Type
Pump
Input
Referred
Noise(nA/sqrt(Hz)
Output
Referred
Noise(uA/sqrt(Hz)
Conventional
64
29.9271
NMOS-switch
current steering
55.56
7.342
Proposed
3.496
0.0156
Fig.22 Graph depicting linearity of VCO
It can be inferred from Table.IV that the proposed charge
pump circuit with gain boosting technique has lesser input
referred and output referred noise.
Table.V shows the VCO frequencies obtained for various
control voltages ranging from 0.1V to the supply voltage
1.8V.
Table.V Control voltage Vs VCO frequency
Control voltage(v)
0.1
0.2
VCO Frequency(MHz)
20.6
24.5
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
1.2
1.3
1.4
1.5
1.6
1.7
1.8
27
31.2
36.3
42.4
57.15
61
93
125
156
185.4
212.3
236.3
257.5
276.4
293.2
307
Comparison between the conventional PFD and the
modified PFD using TSPC logic is shown in Table.VI.
Table.VI Comaprison of phase frequency detector
PFD type
Conventional
Using
logic
TSPC
No:
Transistors
32
Power(u W)
18
300
600
Table.VI infers that the modified PFD circuit consumes
50% lesser power and has lesser number of transistors
when compared to the conventional PFD.
IV. CONCLUSION
An LIA can be made use of in spectroscopic applications,
chemical and biological sensor applications etc. In order
to design a low power LIA, the basic building blocks
consuming low power have been designed and simulated
using CADENCE Spectre GPGK 0.18µm technology.
The blocks consists of the proposed low power and high
gain TIA, filter circuit designed using OTA, voltage
amplifier designed using folded cascode OTA, PLL
consisting of proposed charge pump with better matching
characteristics by employing the gain boosting circuit and
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International Journal of Electrical, Electronics and Computer Systems (IJEECS)
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the designed phase frequency detector using TSPC logic.
The proposed TIA is better when compared to TIA
structures in [4] and [5] in terms of power by 8% and in
terms of input and output referred noise by more than 75%
and 41% respectively. All the filters have low power
consumption in the range of few nano volts. This LIA
design can be used for low power spectroscopic
applications.
[5]
A.Trabelsi, M.Boukadoum,” A Comparison of
Two
CMOS
Front-End
Transimpedance
Amplifiers for Optical Biosensors.”,IEEE
journal,2012
[6]
Van Valkenburg, Rolf Schaumann, “Design of
analog filters”, 2nd edition.
[7]
Changhua Cao,Yanping Ding, and Kenneth K.
O,“A 50-GHz Phase-Locked Loop in 0.13-µm
CMOS”,IEEE JOURNAL OF SOLID-STATE
CIRCUITS, VOL. 42, NO. 8, AUGUST 2007.
[8]
Houda daoud, Samir Salem, Sonia Zouari(IEEE
J.Solid-State Circuits, Vol.4, April, 2006,
pp.7803-9727), “Folded Cascode OTA Design for
Wide Band Applications”.
[9]
Rania H. Mekky and Mohamed Dessouky,
"Design of a Low-Mismatch gain-boosting charge
pump for phase locked loops“, IEEE ICM December 2007.
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[3]
[4]
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Advances in Sensors,Jun. 2007, pp. 15.
A. Gnudi, L. Colalongo, and G. Baccarani,
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C. Azzolini, A. Magnanini, M. Tonelli, G.
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[10] Jacob
Baker,Li,Boyce,”CMOS
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IEEE Canadian Conference on Electrical and
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