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Transcript
Subject: High Speed Amplifiers
Topic: Making High Speed Amplifiers Work (Understanding Performance Specifications) Part 4
Introduction
As we have been studying, building a high speed amplifier circuit, with bandwidths in the megaHertz (MHz) range, requires an understanding of the amplifier specifications in great detail. As
the bandwidths of the amplifier increase, the amplifiers specifications become even more
necessary to understand due to the fact that many of the performance specifications interact
with each other (such as the trade-offs between bandwidth and noise versus settling time). It is
important to note that system signal bandwidth is not the only important factor when
designing a circuit; the actual bandwidth of the high speed amplifier itself (beyond specified
signal bandwidth) can actually involve a combination of circuit parameters associated with the
specifics of the circuit configuration. Remember, parasitic and nonlinear effects of the high
speed amplifier beyond system signal bandwidth can cause excess system noise, overdrive,
ringing, higher than expected distortion, and even DC offsets due to asymmetric slew rates. So
a designer must take into account all the amplifiers specifications in regards to input signal
frequencies as well as amplifier frequencies above and below (even to DC levels) the signal
range when it comes to practically implementing the circuit. In the next few weeks, let’s focus
on understanding amplifier specifications and how they affect performance and interact with
each other.
Last week, we talked about an amplifiers frequency domain response. Remember, the
bandwidth of an amplifier is measured in the frequency domain which ultimately also translates
into the time domain. This week, let’s take a look at some basic amplifier specifications that can
have a large scale impact on the overall system level performance. There is any old saying in
analog electronics that, “All problems are DC related.” There is some real wisdom in this
statement. If a design engineer can understand and assess the DC implications of a given
amplifier within an overall system, usually the design becomes much more robust and has more
performance margin. The DC response of an amplifier usually translates into overall system
performance (for a given application) that can be fairly predicted and calculated if the designer
plays careful attention to the data sheet specifications for the amplifiers in the circuit.
Remember, even for systems that manage signals well above DC, understanding the amplifiers
DC response is of critical importance.
From a practical standpoint, knowing how an amplifier responds to any DC input is important
because of both linear and non-linear characteristics. For instance, transistor mismatches and
finite open loop amplifier gains will have a dramatic impact on the amplifier’s DC response as
well as the frequency performance. Therefore, an overall system cannot finalize a result until
an amplifier responds to its DC conditions, which by the way, in the time domain, can look
simply like an error voltage, and in the frequency domain, can look like distortion.. Formally,
knowing the DC response of a dynamical system, gives information on the accuracy of that
system, and on its ability to reach one stationary state when starting from another.
First, let’s start with an amplifier’s most fundamental DC specification, the input offset voltage
(Vio). In regards to the output signal of an amplifier, Vio is simply the voltage that must be
applied between the inputs of amplifier to make the output equal to zero volts.
Vio is usually attributed to the input differential pair in a VFB (voltage feedback amplifier).
Bipolar input stages tend to have lower offset voltages than CMOS or JFET input stages.
Input offset voltage is important whenever DC accuracy is required in a circuit. Vio is usually
measured with input centered between the power supply voltage rails. So be careful, Vio
can actually vary depending on how it is measured relative to where the input signal resides
relative to the power supply voltages.
Input bias current (Ibn for VFB and Ibn, Ini for CFB): This is the current required at the inputs
of an amplifier for proper operation. CFB (Current Feedback) amplifiers have different input
bias currents for inverting and non-inverting inputs. CMOS and JFET inputs traditionally
offer much lower input current than standard bipolar inputs. However, some modern CFB
amps offer strikingly low input bias currents. Input bias current is important when the
driving source impedance is high. If the op amp has high Ib it will load the source resulting in
a lower than expected voltage. If an amplifier has high Ib, the source impedance can be
lowered by using a buffer stage to drive the op amp.
Input offset current (IIO): This is the difference between the two input currents of an
amplifier. Input offset current can be nullified by matching the impedance seen at the
inputs. Again, these currents are usually measured with input voltage centered at midsupply. This can also change as the input voltage nears the power supply rails.
PSRR (Power Supply Rejection Ratio): A measure of how well an amplifier rejects changes in
power supply levels. PSRR is measured as the change in input offset voltage per unit change
in power supply voltage. PSRR at low frequencies is dependent on the amplifier, and at
higher frequencies, it is dependent on power supply decoupling. Data sheets usually specify
this parameter at DC. Below is a typical plot that shows PSRR vs Freq.
AOL(Open Loop Gain): The differential gain of the amplifier without feedback (Open-loop). This
parameter is measured by the change in input offset voltage with respect to a unit change in
the output swing.
Higher AOL reduces error in closed-loop, for example:
Vout = Vin * (
G
)
1 + G/AOL
For G=10 AOL= 50dB or 316V/V
Vout = Vin * 9.69 a 3% error due to low AOL
Another parameter similar to AOL is referred to as open loop trans-impedance gain (ZOL) for a
Current Feedback (CFB) amplifier. This is the unit change in error current (inverting input
current ) with respect to a unit change in the output swing.
IS (Power Supply Current): This is simply the power supply current drawn by amplifier with no
load.
RIN (Input Resistance): This is the input resistance of either amplifier input with the other input
grounded.
CIN (Input Capacitance): This capacitance is measured of either amplifier input with the other
input grounded.
ROUT (Output Resistance): This is the small signal impedance between the output terminal of the
amplifier and ground. Output impedance is a design issue when using a RRO (Rail to Rail
Output) amplifier to drive heavy loads. If the load is mainly resistive, the output impedance will
limit how close to the rails the output can go. If the load is capacitive, the extra phase shift will
erode phase margin.
CMIR (Common Mode Input Range): This is the common-mode input signal range for which an
amplifier remains linear. Exceeding the CMIR of an amplifier could cause the signal to clip, go to
the rail, or even cause the amplifier to oscillate. Lowering Vs makes CMIR an increasing concern.
RRI amps are usually required when driving a single supply ADC or as a high-side current
sensing circuit. The negative effect of CMIR can be minimized by using an amplifier in an
inverting configuration. In this type of circuit, by definition, Vinv will track Vnon-inv , which in most
inverting applications, is GND or tied to some voltage to adjust the common-mode. Using an
amplifier in an inverting configuration is like directly driving an output stage resistor Rg with the
input voltage always centered at zero volts (see below):
Be careful, for split supply applications, although Vinv and Vnon-inv is zero volts, the output can
exceed the amplifier’s CMIR. Example: Amplifier CMIR at ±5V is -5 to 4V. If V = 4.5Vpp, Vinv still =
0V. In this condition, it is important to watch the amplifier’s output swing limit.
Let’s talk for a minute about rail to rail. What is Rail-to-Rail? Rail-to-rail implies that the
common mode input range or output range of an amplifier will extend to (or very close to) the
supply rails. For rail to rail inputs it is possible to design the amplifier to include or exceed the
supplies (see representative plot below):
Why is Rail-to-Rail Performance Important? Dynamic Range (maximizing input and output signal
levels), Power Consumption (minimizing the necessary voltage levels of the power supply rails)
and Power Dissipation, which is equal to Power Supply Current x Supply Voltage. Below are
some representative plots:
CMRR (Common Mode Rejection Ratio): CMRR is a measure of how well a differential amplifier
rejects signals common to both inputs. From a DC standpoint, this translates to the change in
input offset voltage per unit change in input common mode voltage. The data sheet usually
specifies this at DC, the plot below shows CMRR vs Freq.
VO (Output Voltage): This is the maximum output signal that can be obtained without wave
form clipping. This is usually specified for a given load resistance. Attempting to exceed Vo,
results in recovery issues from causing the output stage to become very non-linear or
saturated.
IOUT (Output Current): This is simply the current driving capability of an amplifier, which
determines the minimal load that can be driven.
ISC (Short Circuit Current): This is the maximum continuous output current available from the
amplifier with the output shorted to ground. Most manufacturers specify output current with
the output centered between the supplies. This is the least strenuous condition. This must be
taken into consideration when running from single supply and operating DC-coupled.
Also, make sure to look over all the datasheet plots for more information on things like proper
feedback resistor values, as well as the trade-offs between voltage output levels versus resistive
loading (current drive levels). Remember, bandwidth IS the key specification that is used by the
industry to “grade” a high performance amplifiers, but marketing also plays a key role in data
sheet generation. Manufacturers usually specify the amplifier under the most optimal
conditions, resulting in the best “looking” data sheet. So the designer must take into account
each performance specification and how they relate to each other in a given application.
Just be sure to read the fine print, and also look for performance plots to determine the
amplifiers performance under your required operating conditions. For instance, a high speed
amplifier driving a capacitive load can be very difficult to maintain amplifier stability (see the
following):
Driving Capacitive Loads
Increased phase delay at the output due to capacitive loading can cause ringing, peaking in the
frequency response, and possible unstable behavior. Use a series resistance, RS, between the
amplifier and the load to help improve stability and settling performance. Refer to
Figure 1.
Figure 1 Addition of RS for Driving Capacitive Loads
Table 1 provides the recommended RS for various capacitive loads. The recommended RS
values result in <=0.5dB peaking in the frequency response. The Frequency Response vs. CL plot
is also shown below Table 1 and illustrates the response of the CLC1605 Family.
Table 1: Recommended RS vs. CL
For a given load capacitance, adjust RS to optimize the tradeoff between settling time and
bandwidth. In general, reducing RS will increase bandwidth at the expense of additional
overshoot and ringing.
When designing a high speed amplifier circuit, it is important to simply break down the system
into the various functional blocks that make up the system and address each performance
limiting factor. Depending on the overall system specification, such component versus signal
bandwidths, and linearity versus noise requirements, these numbers will determine many of
the required analog performance specifications of the system including simple layout
geometries, amplifier bandwidths, slew rates, and required gains. The number one thing is to
remember that every node in a circuit has some type of component connected to it and it is
also both an input and an output in some way. Understanding the positive and adverse effects
of this single concept will greatly enhance your ability to design the system.
Kai ge from CADEKA
(www.cadeka.com)