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ETU 07210
LECTURE
ONE
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Coverage
 Integrated circuits (ICs)
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Introduction
Advantages and disadvantages of ICs
Scale of integration
Classification of Ics
ICs fabrication
 references
• Electrical Technology Volume IV - Electronic Devices and
Circuits - B.L.Theraja. (Pg. 2472-2500)
• Electronic Devices and Circuit Theory, 6th Edition – Robert
L. Boylestad. (Pg. 588-608)
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 Introduction
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Electronic circuitry has undergone tremendous changes
since the invention of a triode in 1907.
With the invention of the transistor in 1948, the
electronic circuits became considerably reduced in size.
Development of printed circuit boards (PCBs) further
reduced the size of electronic equipment by eliminating
bulky wiring and tie points.
In the early 1960s, a new field of microelectronics was
born with the aim of reducing the size, weight, and
power of military electronic systems because of the
increase use of these systems.
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Microelectronics is that area of technology associated
with and applied to the realization of electronic systems
made of extremely small electronic parts or elements
The extreme reduction in the size of electronic circuits
has led to the development of microelectronic circuits
called integrated circuits (ICs)
An IC is a complete electronic circuit in which both the
active and passive components are fabricated on a tiny
single chip of silicon.
 Advantages of ICs
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Extremely small physical size: Thousands of times
smaller than a discrete circuit.
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Very small weight: Many circuit functions can be packed
into a small space.
Reduced cost: Many identical circuit can be built
simultaneously on a single wafer (Batch fabrication).
Extremely high reliability: ICs works for longer periods
without giving any trouble.
Increased response time and speed: The time delay of
signals is reduced.
Low power consumption: ICs are more suitable for low
power operation.
Easy replacement: It is more economical to replace an IC
than to repair it.
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 ICs Drawbacks
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Coils or inductors cannot be fabricated.
ICs function at fairly low voltages.
They handle only limited amount of power.
They are quite delicate and cannot withstand rough
handling or excessive heat.
 Scale of integration
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Small scale integration (SSI). < 12
Medium scale integration (MSI). 12 – 99
Large scale integration (LSI). 100 – 9,999
Very large scale integration (VLSI). 10,000 – 99,999
Ultra large scale integration (ULSI). 100,000 – 999,999
Giga scale integration (GSI). 1,000,000
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 Classification of ICs by structure
• Monolithic ICs: Both active and passive components are
fabricated inseparably within a semiconductor substrate.
• Film ICs (Thin film and Thick film): Film components are
made of either conductive or nonconductive material that
is deposited in desired patterns on a ceramic or glass
substrate.
Film can only be used as passive circuit components,
such as resistors and capacitors.
Transistors and/or diodes are added externally as
discrete components to the substrate to complete the
circuit.
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• Hybrid ICs: Combine two or more integrated circuit types
or combine one or more integrated circuit types and
discrete components.
 Comparison between different ICs
• Each type of IC has its own advantages and disadvantages.
 Advantages of monolithic Ics
- Lowest cost and highest reliability
 Disadvantages of monolithic ICs
- Isolation between components is poorer,
- Range of values of passive components used in the
circuits is comparatively small,
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- Inductors cannot be fabricated, and
- They afford no flexibility in circuit design.
Advantages of film ICs
- The passive components with broader range of
values ca be formed,
- The isolation between their components is better,
- Greater flexibility in circuit design due to the use of
external discrete active components.
Disadvantages of film ICs
- Not being able to fabricate active components,
- Comparatively higher cost, and
- Larger physical size.
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 Classification of ICs by function
• Linear integrated circuits (LICs)
LICs are also referred to as analog ICs.
Their inputs and outputs takes on a continuous range
of values and the outputs are generally proportional to
the inputs.
As compared to digital ICs, LICs are used much less.
They are frequently used in
- Operational amplifiers,
- Small-signal amplifiers,
- Power amplifiers,
- RF and IF amplifiers,
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- Microwave amplifiers,
- Multipliers,
- Voltage comparators,
- Voltage regulators etc.
Manufacturer’s designation of LICs
- LICs with the same specifications but different code
and type number can be produced by different
manufacturers.
- For example, consider the op-amp 741 with the
following codes:
National Semiconductor — LM 741
Motorola — MC 1741
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RCA — CA 3741
Texas Instruments — SN 5274
LICs classes
- Many LICs are available in different classes such as
A, B, C, E, S, and SC.
- For example, main classes of op-amp 741 are:
741— Military grade op-amp
741 C — Commercial grade op-amp
741 A — Improved version of 741
741 E — Improved version of 741 C
741 S — Military grade op-amp with higher slew
rate
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741 SE — Commercial grade op-amp with higher
slew rate
• Digital integrated circuits (DICs)
 DICs dominate the IC market and they are mostly
utilized by computer industry.
 DICs are of the monolithic integration type due to the
fact that a computer uses a larger number of identical
circuits.
 DICs contain circuits whose input and output voltages
are limited to two possible levels— low or high.
 It is so because digital signals are usually binary.
 Sometimes, digital circuits are referred to as switching
circuits.
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 DICs include circuits such as:
- Logic gates
- Flip-flops
- Counters
- Clock-chips
- Calculator chips
- Memory chips
- Microprocessors (µP) etc.
 Reading assignment: Go through page 2478 (Electrical
Technology Volume IV - Electronic Devices and Circuits - B.L.Theraja)
and read what has been covered under “IC
terminology” heading.
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 How ICs are made?
• The ICs are manufactured in four distinct stages. These are:
Material preparation,
Crystal growing and wafer preparation,
Wafer fabrication, and
Testing, bonding and packaging.
• Material preparation
Silicon, as an element is not found in nature.
It is found abundantly in nature in the form of silicon
dioxide, which constitutes about 20% of earth’s crust.
Silicon is commonly found as quartz or sand.
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A number of processes are required to convert sand
into pure silicon with a polycrystalline structure.
Figure 1.1 shows the different processes involved in the
preparation of polycrystalline silicon from sand.
- As seen from this figure, the sand is allowed to
react with a gas produced from the burning of
carbon.
- This produces silicon with 98% purity.
- Next silicon is further purified in a reactor to
produce electronic-grade polycrystalline silicon.
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Fig. 1.1
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• Crystal growing and wafer preparation
• Crystal growth
There are two methods to carryout the crystal growth:
- The Czochralski and
- The flat zone process.
The Czochralski process prepares virtually all the silicon
used for IC fabrication.
The flat zone process is used to prepare crystals for
fabricating high-power, high voltage semiconductor
devices.
The Czochralski process
- The equipment used for single crystal growth
(called puller) is as shown in Figure 1.2.
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- The puller has three main components:
 A furnace which includes quartz crucible, a
rotation mechanism (clockwise as shown), and a
radio frequency (RF) heating element,
A crystal pulling mechanism which includes a
seed holder and a rotation mechanism
(counterclockwise), and
An ambient control which includes an argon gas
source, a flow control and an exhaust system.
- In addition the puller has a computer system to
control process parameters such as temperature,
crystal diameter, pull rate and rotation speed.
- To grow crystals, the polycrystalline silicon is placed
in the crucible.
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- The furnace is heated to a temperature of 1690 K
which is slightly greater than the melting point
(1685 K) of silicon.
- A precisely controlled amount of dopant is added to
the melt to make the silicon as P-type or N-type.
- A suitable oriented seed crystal is suspended over
the crucible in a seed holder.
- The seed is inserted into the melt and a small
portion of it is allowed to melt.
- The seed is rotated and pulled up very slowly, while
at the same time, the crucible is rotated in the
opposite direction.
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- The molten silicon attaches itself to the seed and it
becomes identical to the seed in structure and
orientation.
- As the seed is pulled up, the material that is
attached to the seed solidifies
- Its crystal structure becomes the same as that of
the seed and a larger crystal is formed.
- Thus using this method, cylindrical single crystal
bars (called ingots) of silicon are produced.
- The desired diameter of the silicon ingot is obtained
by controlling both the temperature and the pulling
speed.
- The resulting ingot is cooled and is removed to be
made into thin discs called wafers.
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- The ingots have diameters as large as 200 mm with
the latest ones approaching 300 mm.
- The ingot length is of the order of 1000 mm.
• Wafer preparation
In this stage the ingot surface is grounded throughout
to an exact diameter and the top and bottom portions
are cut off.
After that one or more flat regions are ground along
the length of the ingot.
These flat regions mark the specific crystal orientation
of the ingot and conductivity type silicon material.
Refer to Figure 1.3.
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Notice that the ingot is marked with two flats regions :
- the larger flat (called primary flat) and
- the smaller flat or secondary flat regions.
The primary flat allows a mechanical locator in
automatic processing equipment to position the wafer
and to orient the devices relative to the crystal in a
specific manner.
The secondary flat regions are used to identify the
orientation and conductivity type of the crystal.
The conductivity of the wafer could be either P-type or
N-type and the crystal orientation, {100} or {111}.
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The semiconductor industry uses {111} wafers for
fabricating ICs with bipolar transistor technology and
{100} wafers for MOS circuits.
Once the orientations are done, the ingot is sliced into
wafers by a high-speed diamond saw.
The wafer thickness varies from 0.4 to 1.0 mm.
After slicing, the next step is to polish the wafer
surface.
Finally the wafers are cleaned and dried for use in
fabrication of ICs.
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• Wafer fabrication
Category of the processes that are used in the
fabrication of ICs:
- Oxidation
- Etching
- Diffusion
- Ion implantation
- Photolithography
- Epitaxy
- Metallization and interconnections.
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• Oxidation
It consists of growing a thin film of silicon dioxide (SiO2)
on the surface of a silicon wafer.
Silicon dioxide has several uses:
- To serve as a mask against implant or diffusion of
dopant into silicon,
- To provide surface passivation,
- To isolate one device from another, and
- To act as a component in MOS structures.
Techniques for forming oxide layers on silicon wafer:
- Thermal oxidation,
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- Vapour phase technique [chemical vapour
deposition (CVD)], and
- Plasma oxidation.
However, thermal oxidation is the more commonly
used technique in IC processing.
Figure 1.4 shows a thermal oxidation system.
- The silicon wafers are placed vertically into a quartz
boat in a quartz tube.
- The quartz boat is slowly passed through a furnace,
in the presence of oxygen, operating at 10000C.
- The oxidizing agent may dry oxygen or a mixture of
water vapour and oxygen.
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- A computer controls the whole operation in the
thermal oxidation system.
- The operation include regulating the gas flow
sequence, automatic insertion and removal of
wafers and the furnace temperature.
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• Etching
Etching is the process of selective removal of regions of
a semiconductor, metal or silicon dioxide.
There are two types of etching :
- Wet etching; the wafers are immersed in a chemical
solution at a predetermined temperature.
- Dry (or plasma) etching; the wafers are immersed in
gaseous plasma created by a radio-frequency
electric field applied to a gas such as argon.
• Diffusion
The process of introducing impurities into selected
regions of a wafer to form junctions.
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It occurs in two steps : the pre-deposition and the
drive-in diffusion.
Pre-deposition tends to produce, a shallow but heavily
doped layer, near the silicon surface.
Drive-in is used to drive the impurity atoms deeper into
the surface, without adding any more impurities.
Figure 1.5 shows the graph of doping profiles, during
the pre-deposition and the drive-in steps of diffusion.
The doping profiles indicate that the impurity
concentration decreases monotonically from the
surface of the substrate.
The profiles of the dopant distribution is determined
mainly by the temperature and diffusion time.
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Common dopants are boron for P-type layers and
phosphorus, antimony and arsenic for N-type layers.
Diffusion is rarely performed using pure elements
themselves, instead compounds of elements are used.
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Figure 1.6. shows the equipment used in diffusion.
The wafers are placed in a quartz boat within a quartz
furnace tube.
The furnace is heated by resistance heaters
surrounding it.
To introduce an impurity, phosphorus for example,
phosphorus oxychloride (POCl) is placed in a container
at a temperature that maintains its liquid form.
The proper vapour pressure is maintained by a control
of the temperature.
Nitrogen and oxygen gas are made to pass over the
container.
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These gases react with the silicon, forming a layer on
the surface of the wafer that contains silicon, oxygen
and phosphorus.
At the high temperature of the furnace, phosphorus
easily diffuses into the silicon.
In order that the dopant may be diffused deeper into
silicon, the drive-in step follows.
This is done at a higher temperature of about 11000C
inside a furnace similar to that used for pre-deposition,
except that no dopant is introduced into the furnace.
The higher temperature, causes the dopant atoms to
move into silicon more quickly.
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Diffusion depth is controlled by the time and
temperature of the drive-in process.
Figure 1.7 shows the diffusion of dopant into silicon.
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• Ion implantation
This is a process of introducing dopants into selected
areas of the surface of the wafer by bombarding the
surface with high-energy ions of the particular dopant.
• Photolithography
It is a process in which the geometrical pattern on the
glass plate is transferred to the surface of the wafer.
This is done to open identical windows so that the
diffusion process may take place in all identical regions
of the same IC and for all ICs on the wafer.
As an illustration we assume that the first reticle is used
over an oxidized surface as shown in Figure 1.8 (a).
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Steps taken in photolithographic process:
- To create a thin layer of silicon dioxide (SiO2)on the
surface of a silicon wafer, fig. 1.8 (a).
- To deposit a coating of photoresist (PR) material on
top of the SiO2 layer, fig. 1.8 (b).
- The PR coating is exposed to ultraviolet (UV) light
through a glass mask, fig. 1.8 (c).
- The exposed PR material is chemically removed, fig.
1.8 (d).
- The exposed SiO2 is then etched away using
hydrofluoric acid, fig. 1.8 (e).
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- Unexposed PR material is removed and the
structure is ready for the impurity diffusion step,
fig. 1.8 (f).
Two types of PR material:
- Positive PR. Allows the windows to be opened
wherever the UV light passes through the
transparent parts of the mask.
- Negative PR. Allows the windows to be open under
the opaque parts of the mask while the exposed PR
remains on the surface.
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• Epitaxy
Epitaxy or Epitaxial growth is the process involves
depositing a very thin layer of silicon to form a
uniformly doped crystalline region (epitaxial layer) on
the substrate.
Components are produced by diffusing appropriate
materials into the epitaxial layer in the same way as the
diffusion method.
In the processes of diffusion and ion implantation, a
dopant is driven into a substrate of doped silicon.
In epitaxy, a layer of doped silicon is deposited on top
of the surface of the substrate.
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• Metallization and interconnections
The provision of metallic interconnections for the IC
and for external connections to the IC.
The interconnections must
- Have low resistance to minimize both the voltage
drops on the lines as well as the capacitances
between the lines so as to reduce delay times.
- Make ohmic contacts to semiconductors in the
devices such as P and N regions of a PN junction
diode.
- NB: An ohmic contact is one that exhibits a very low
resistance, allowing currents to pass easily in both
directions through the contact.
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The most used metal for interconnections process is
aluminium due to the following reasons:
- High conductivity
- Easy to evaporate
- Can be easily etched
- Not expensive
- Adheres well to silicon dioxide.
Three important processes for depositing aluminium on
silicon substrate:
- Resistance heating,
- Electron beam heating, and
- Sputtering.
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• Testing, bonding and packaging
Testing
- Each chip on a wafer is tested before the individual
chips are cut from the wafer.
- Multiple test probes are touched to the metal pads
and the chip is tested to verify circuit performance.
- After all the circuits are tested, the wafer is
removed from the testing machine, sawed between
the circuits, and broken apart.
- Then each die that passed the test is picked up and
placed in the package.
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Bonding
- It means permanent attachment.
- It consists of two steps.
Die bonding. The metallurgical process by
which the die (chip) is rigidly attached to its
substrate or base.
Wire bonding. The permanent attachment of
wire leads between the pads on the chip and
terminal posts as shown in figure 1.9.
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Packaging
- Packaging is the process of protecting the surface of
device (die) from environment of its intended
application.
- Packaging can be broadly classified into the
following two categories:
- Through-hole mount that involve inserting the
package pins through holes on the printed circuit
board (PCB) before soldering [Figure 1.10]
- Surface mount type where the leads do not pass
through holes in the PCB [Figure 1.11].
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THE END
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