Download Amps and Linear Integrated Circuits

KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
FMTH0301/Rev.5.2
Course Plan
Semester: 4 - Semester
Year:2016-17
Course Title: Linear Integrated Circuits
Course Code: 15EECC205
Total Contact Credits: 50
Duration of SEE: 3 Hours
SEE Marks: 50
CIA Marks: 50
Lesson Plan Author: Nalini C Iyer
SujataS.Kotabagi
R V Hangal
Sujata N
JyotiPatil
Shraddha H
Date: 08-12-2016
Checked By: Dr.Nalini C Iyer
Date: 15-12-2016
Course Outcomes (COs):
At the end of the course the student should be able to:
i.
ii.
iii.
iv.
Describe the operation of current mirror, differential Amplifier using MOSFET and analyze the
respective performance parameters.
Design and analyze the operations of linear applications using Op-amp for the given
specifications.
Design and analyze the operations of non-linear applications using Op-amp for the given
specification.
Realize the functional block for a given application and specifications using op-amp and linear
ICs and verify its functionality using simulator tool.
Powered by www.ioncudos.com
Page 1 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Course Articulation Matrix: Mapping of Course Outcomes (COs) with Program Outcomes
(POs)
Course Title: Linear Integrated Circuits
Semester: 4 - Semester
Course Code: 15EECC205
Year:2016-17
Course
Outcomes
(COs) /
Program
Outcomes
(POs)
PO
1
PO
2
PO
3
PO
4
PO
5
PO
6
PO
7
PO
8
PO
9
PO1 PO1 PO1 PO1 PO1 PO1
0
1
2
3
4
5
M
Describe
the
operation of
current
mirror,
differential
Amplifier
using
MOSFET
and
analyze the
respective
performanc
e
parameters
.
Design and M
analyze the
operations
of
linear
applications
using Opamp for the
given
specificatio
ns.
M
Design and M
analyze the
operations
of
nonlinear
applications
L
Powered by www.ioncudos.com
Page 2 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
using Opamp for the
given
specificatio
n.
Realize the
functional
block for a
given
application
and
specificatio
ns using
op-amp
and linear
ICs and
verify its
functionality
using
simulator
tool
M
M
M
M
Degree of compliance L: Low M: Medium H: High
Powered by www.ioncudos.com
Page 3 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Competency addressed in the Course and corresponding Performance Indicators
Competency
Performance Indicators
PO1.3 - Demonstrate competence in engineering
fundamentals
PO1.3.1 - Apply fundamentals of Electrical
engineering principles and laws
PO1.4 - Demonstrate competence in electronics
and communication engineering knowledge
PO1.4.1 - Apply principles of electronic device
PO1.4.2 - Ability to understand electronic circuits
PO2.1 - Demonstrate an ability to identify and
characterize an engineering problem
PO2.1.2 - Identify engineering systems, variables,
and parameters to solve the problems
PO2.1.4 - Identify the mathematical, engineering
and other relevant knowledge that applies to a
given problem
PO5.2 - Demonstrate an ability to select and
apply discipline specific tools, techniques and
resources
PO5.2.2 - Demonstrate proficiency in using EDA
tools
PO9.2 - Demonstrate effective individual and
team operations-- communication, problem
solving, conflict resolution and leadership skills
PO9.2.1 - Demonstrate effective communication,
problem solving, conflict resolution and leadership
skills
PO10.1 - Demonstrate an ability to comprehend
technical literature and document project work.
PO10.1.2 - Produce clear, well-constructed, and
well-supported written engineering documents
PO10.3 - Demonstrate the ability to integrate
different modes of communication.
PO10.3.2 - Use a variety of media effectively to
convey a message in a document or a
presentation
Eg: 1.2.3: Represents Program Outcome ‘1’, Competency ‘2’ and Performance Indicators ‘3’.
Powered by www.ioncudos.com
Page 4 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Course Content
Course Code: 15EECC205
Course Title: Linear Integrated Circuits
L-T-P-SS: 4-0-0-0
Credits: 4
Contact Hrs: 50
CIE Marks: 50
SEE Marks: 50
Total Marks: 100
Teaching Hrs: 50
Exam Duration: 3 hrs
Content
Hrs
Unit - 1
Chapter No 1. OPAMP characteristics
Ideal and non-ideal OPAMP terminal characteristics, Input and output impedance, output
Offset voltage, Small signal and Large signal bandwidth.
4 hrs
Chapter No 2. Basic OPAMP architecture
Basic differential amplifier, Common mode and difference mode gain, CMRR, 5-pack
differential amplifier with design, 7-pack operational amplifier, Slew rate limitation, Instability
and Compensation, Bandwidth and frequency response curve.
8 hrs
Chapter No 3. Current Mirrors
Current Mirror circuits and Modeling, Figures of merit (output impedance, voltage swing),
Widlar, Cascode and Wilson current Mirrors, Current source and current sink.
8 hrs
Unit - 2
Chapter No 4. OPAMP with Feedback
OPAMP under Positive and Negative feedback, Impact Negative feedback on Bandwidth,
Input and Output impedances, Offset voltage under negative feedback, Follower property &
Inversion Property under linear mode operation
8 hrs
Chapter No 5. Linear applications of OPAMP
DC and AC Amplifier, Summing, Scaling and Averaging amplifiers (Inverting, Non-inverting
and Differential configuration), Integrator, Differentiator,Voltage sources, current sources
and current sinks, Active Filters –First and second order Low pass & High pass filters. V to I
and I to V converters.
10 hrs
Unit - 3
Chapter No 6 . Nonlinear applications of OPAMP
Crossing
detectors
(ZCD.
Comparator),
Inverting
Schmitt
trigger
circuits,
Monostable&Astable multivibrator, Triangular/rectangular wave generators, Waveform
generator, Voltage controlled Oscillator, Precision rectifier, Limiting circuits. Current
amplifier, Instrumentation amplifier, Clamping circuits, Peak detectors, sample and hold
circuits, Log and antilog amplifiers, Multiplier and divider, Phase shift oscillator, Wein bridge
oscillator,
12 hrs
Data Converters:
Digital to Analog Converters: Weighted resistor; R -2R, Current steering DAC, settling time
of DAC.
Powered by www.ioncudos.com
Page 5 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Analog to Digital Converters: Flash, Dual slope, SAR; resolution, quantization error of ADC.
Powered by www.ioncudos.com
Page 6 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Text Book (List of books as mentioned in the approved syllabus)
1. BehzadRazavi, Fundamentals of microelectronics , 2nd edition.
2. Phillip E. Allen, Douglas R. Holberg, CMOS Analog Circuit Design,
3. Ramakant A. Gayakwad, Op - Amps and Linear Integrated Circuits,
References
1. A.S. Sedra& K.C. Smith, Microelectronic Circuits,
2. Sergio Franco, Design with Operational Amplifiers and Analog Integrated Circuits.
3. David A. Bell, Operational Amplifiers and Linear Ics.
4. B. Razavi, Design of Analog CMOS Integrated CircuitsMcGraw-Hill, 2001
Evaluation Scheme
CIE Scheme
Assessment
Weightage in Marks
Minor exam 1
20
Minor exam 2
20
Assignment/Project
10
Total
50
Date:
Head of Department
Powered by www.ioncudos.com
Page 7 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Course Unitization for Minor Exams and Semester End Examination
Topics / Chapters
No. of
No. of
No. of
Teaching Questions Questions Questions
hours
in Minor
in Minor
in
exam 1
exam 2
Assignment
Unit I
OPAMP characteristics
4
0.5
0
0.5
Basic OPAMP architecture
8
1.5
0
1.5
Current Mirrors
8
1
0
1
OPAMP with Feedback
8
0
1
1
Linear applications of OPAMP
10
0
2
2
12
0
0
2
Unit II
Unit III
Nonlinear applications of OPAMP
Note
1. Each Question carries 20 marks and may consists of sub-questions.
2. Mixing of sub-questions from different chapters within a unit (only for Unit I and Unit II) is allowed in
Minor I, II and SEE.
3. Answer 5 full questions of 20 marks each (two full questions from Unit I, II and one full questions
from Unit III) out of 8 questions in SEE.
Date:
Head of Department
Powered by www.ioncudos.com
Page 8 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Course Code and Title: 15EECC205 / Linear Integrated Circuits
Chapter Number and Title: 1. OPAMP characteristics
Planned Hours: 4 hrs
Learning Outcomes:
At the end of the topic the student should be able to:
TLO's
CO's
BL
CA Code
List the characteristics and compare the performance of an ideal and non
ideal Op-Amp.
1
2
1.4
Describe the differential and common mode signals.
1
2
1.4
Discuss the importance of output offset voltage, input and output
impedances, small signal and large signal bandwidth of ap-amp.
1
2
1.4
Analyse the open loop configurations of Op-Amp for inverting,
1
2
1.4
TLO
BL
PI Code
Non-inverting and differential amplifier.
Lesson Schedule
Class No. - Portion covered per hour
1. Ideal and non-ideal OPAMP terminal characteristics
2. Input and output impedance
3. Output Offset voltage.
4. Small signal and Large signal bandwidth.
Review Questions
Sr.No. - Questions
List the ideal characteristics of an OPAMP. Give its symbolical
representation and explain the functions of each terminal. Tabulate the
ideal Op-amp terminal characteristics.
1
1
1.4.1
Explain the terms input impedance, output impedance, output offset
voltage, common mode and difference mode gain.
2
2
1.4.1
List the difference between ideal and non ideal characteristics of OPAMP.
3
2
1.4.1
Powered by www.ioncudos.com
Page 9 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Explain the small signal and large signal bandwidth.
3
2
1.4.1
Design the open loop configurations of Op-Amp for differential amplifier
with
1) vin1 = 2v and vin3= -3v.
2) vin1 = 3µv and vin3= -4.5µv.
4
2
1.4.1
Course Code and Title: 15EECC205 / Linear Integrated Circuits
Chapter Number and Title: 2. Basic OPAMP architecture
Planned Hours: 8 hrs
Learning Outcomes:
At the end of the topic the student should be able to:
TLO's
CO's
BL
CA Code
Describe the working of a basic differential amplifier and Design the
differential amplifier for the given specifications.
1
2
2.1
Define common mode gain, difference mode gain and CMRR.
1
2
1.4
Represent the input signals of a differential amplifier in terms of their
differential and common mode gain.
1
2
1.4
Describe the architecture of 5-pack and 7-pack differential amplifier.Derive
the expression for small signal voltage gain.
1
3
1.4
Analyze the limitations of the slew rate & understand what is instability and
compensation
1
2
1.4
Lesson Schedule
Class No. - Portion covered per hour
1. Basic differential amplifier
2. Common mode and difference mode gain
3. CMRR
4. 5-pack differential amplifier design.
Powered by www.ioncudos.com
Page 10 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
5. 7-pack operational amplifier
6.
Slew rate limitation, Instability Compensation
7. Bandwidth and frequency response curve
8. Revision and Numericals
Review Questions
Sr.No. - Questions
TLO
BL
PI Code
1. Describe the working principle of a basic differential amplifier , with TLO1
common mode and differential input voltages.
L2
1.4.1
2. Explain small signal operation of the MOS differential pair with differential TLO2
and common mode gain. Explain CMRR and ICMR.
L2
1.4.1
3. For the 5 pack differential amplifier using usingnMOS drive and pMOS TLO4
loads obtain the expression for small signal differential voltage gain.
L2
1.4.1
4. Design the currents and W/L values of the current mirror load differential TLO1
amplifier to satisfy the following specifications: Vdd= -Vss=2.5V,SR>=
10V/us(Cload=5pf),f-3db>= 100kHz(CL=5pF),a small signal voltage gain of
100 V/V,-1.5<=ICMR<=2V and Pdiss<=1mW. Use model parameters of
KN’= 110uA/V2, KP’= 50uA/V2, VTP=-0.7V, VTN=0.7V,λN=0.04V-1 , λP=
0.05V-1.
L2
2.1.2
5. Draw the architecture of a two stage operational amplifier and list the
different sub circuits in it. Also draw the circuit diagram.
TLO4
L2
1.4.1
6. Why compensation is required? Explain the compensation techniques in
an op amp
TLO5
L2
1.4.1
7. For a MOS differential pair with a common mode voltage VCM applied TLO1
,let VDD = VSS= 1.5V,kn’(W/L)=4mA/V2,Vt =0.5V ,I=0.4mA and RD
=2.5KΩ neglect the channel length modulation. Find VOV and VGS for
each MOSFET’s For VCM=-0.2 find vs,iD1,iD2,vD1 and vD2 What is the
highest value of vcm for which M1 and M2 remain in saturation.
L2
2.1.2
Powered by www.ioncudos.com
Page 11 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Chapter-wise Plan
Course Code and Title: 15EECC205/ Linear Integrated Circuits
Chapter Number and Title: 3. Current Mirrors
Planned Hours: 8 hrs
Learning Outcomes:
At the end of the topic the student should be able to:
TLO's
CO's
BL
CA Code
Model and analyze the functionality of the current mirror.
1
2
1.4
Analyze the performance characteristics of the current mirror in terms of
figure of merit.
1
2
1.4
Discuss the working principle of a standard cascade, Widlar& Wilson
current mirror.
1
2
1.4
Differentiate between current source and current sink.
1
2
1.3
Determine a suitable circuit configuration for current sink,current source,
Wilson &Widlar current mirror and find the expression for output
impedance.
1
3
2.1
Lesson Schedule
Class No. - Portion covered per hour
1. Introduction
2. Current Mirror circuits
3. Modeling
4. Figures of merit (output impedance, voltage swing)
5. Widlar, Cascode current Mirrors
6. Wilson current Mirrors
7. Current source and current sink.
8. Revision and Numericals.
Powered by www.ioncudos.com
Page 12 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Review Questions
Sr.No. - Questions
TLO
BL
PI
Code
1. Differentiate between current source and current sink? Illustrate with the help of a
single MOS transistor.
TLO4
L2
1.4.1
2. Describe the working principle of a standard cascade current sink. Compare its
performance with basic current sink.
TLO3
L2 1.4.1
3. Derive the equation of output impedance of a standard cascode current sink.(small
signal model approach)
TLO3
L2 1.3.1
4. Explain the working of Wilson and Widlar current mirror with neat diagram
TLO3
L2 1.4.1
5. Derive the expression for output impedance of Wilson and Widlar current mirror.
TLO5
L2 1.4.1
6. In basic current mirror circuit using two transistor having equal lengths, widths
related by W2/W1 = 5, design a current mirror to obtain I= 0.5 mA. , let VDD= -VSS=
5 V, kn’ (W/L) 1 = 0.8 mA / V2, Vt= 1 V, find the value of R.
TLO1
L2 1.4.1
7. Design an NMOS current mirror with VDD= 5 V, VSS= 0 V and Iref = 100 µA. For
the matched MOSFETS L= 10 µm, W = 100 µm, Vt = 1 v and Kn’ = 20 µA/ V2.
TLO2
L2 1.4.1
8. Determine a suitable circuit configuration to mirror the current from a reference
current of 200ua with high input impedance to drive a differential amplifier with
common mode input voltage for the following parameters: R = 2K Ω, Kn2= 10 Kn1=
250 µA/ V2 VDD= 5V.http://www.slideshare.net/mujju433/current-mirrors-very-goodpdf
TLO5
L2
2.1.3
9. Calculate the small signal output resistance for the simple current sink of fig a. a)if
Iout =100uA and b) the small signal output resistance if the simple current sink of fig
a. is inserted into the cascade current sink configuration of fig a. Assume that
W1/L1=W2/L2=1. Use below table for this problem.
TLO5
L3
2.1.3
Powered by www.ioncudos.com
Page 13 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
UNIT II
Course Code and Title: 15EECC205 / Linear Integrated Circuits
Chapter Number and Title:4. OPAMP with Feedback
Planned Hours: 8 hrs
Learning Outcomes:
At the end of the topic the student should be able to:
TLO's
CO's
BL
CA Code
Illustrate the general structure of the feedback amplifier and explain the
four basic feedback topologies.
2
2
1.4
Discuss the significance of negative feedback and explain the four basic
feedback topologies.
2
2
1.4
Describe the effect of inversion and follower property under linear mode
operation and design a suitable signal conditioning circuit for given
applications.
2
3
2.1
Compare the characteristics and behavior of an Op-amp under positive
and negative feedback.
2
2
1.4
Powered by www.ioncudos.com
Page 14 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Lesson Schedule
Class No. - Portion covered per hour
1. OPAMP under Positive
2. OPAMP under Negative feedback,
3. Impact of Negative feedback on Bandwidth,
4. Input and Output impedances,
5. Offset voltage under negative feedback,
6. Follower property & Inversion Property under linear mode operation
7. Follower property & Inversion Property under linear mode operation
8. Revision and Numericals
Powered by www.ioncudos.com
Page 15 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Review Questions
Sr.No. - Questions
TLO
BL
PI Code
Discuss the effect of negative feedback on the performance characteristics
of opamp.
2
2
1.4.1
Draw and explain the generalized feedback structure
1
1
1.4.1
Explain basic feedback topologies with block diagrams.
1
1
1.4.1
Derive the expressions for input and output impedances with respect to
voltage series feedback amplifier and voltage shunt feedback amplifier.
1
2
1.4.1
Explain the effect of negative feedback on bandwidth of an OPAMP.
4
2
1.4.1
Explain voltage shunt feedback amplifier and derive the equation for
closed loop voltage gain.
3
2
1.4.1
In a non inverting circuit configuration let VI = 1V,R1=2kΩ,and Rf=18KΩ.
Find Vo if (a) a=10 V/V,(b)a=.0.1V/V,(c)a=50V/V. Comment on your
findings.Vcc= -Vss= 12
2
2
1.4.1
Explain voltage follower circuit in brief.
3
2
1.4.1
A capacitor coupled voltage follower is to be designed to have a lower 3
cutoff frequency of 120Hz. The load resistance is 8.2Kohms and opamp
used has a max i/p bias current of 600nA . Design a suitable circuit.
3
1.4.1
Explain voltage series feedback amplifier and derive the equation for
closed loop voltage gain. Comment on the gain equation.
3
2
1.4.1
Design a suitable amplifier for gain of 100 using Op-amp so that output
voltage is proportional to input voltage/ current.
3
3
2.1.2
Design avoltage series feedback amplifier using op-amp for a gain of 100.
1
2
1.4.1
It is required to measure the room temperature of the food processing unit
using temperature sensor which provides a voltage in the range of 0-30mv
.Design a suitable signal conditioning circuit using Op-Amp to obtain an
output voltage in the range of 0-5V, which is proportional to input voltage.
3
3
2.1.2
Discuss the effect of negative feedback on the performance characteristics
of opamp.
2
2
1.4.1
Draw and explain the generalized feedback structure
1
1
1.4.1
Explain basic feedback topologies with block diagrams.
1
1
1.4.1
Powered by www.ioncudos.com
Page 16 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Course Code and Title: 15EECC205 / Linear Integrated Circuits
Chapter Number and Title:5. Linear applications of OPAMP
Planned Hours: 10 hrs
Learning Outcomes:
At the end of the topic the student should be able to:
TLO's
CO's
BL
CA Code
Differentiate between DC and AC amplifiers
2
2
1.4
List and explain the different configurations of OPAMP.Design inverting
and non inverting amplifier for the given specifications.
2
2
1.4
Design and explain the working principle of Integrator and Differentiator.
2
2
1.4
Design the instrumentation amplifier to obtain the expression for voltage
gain for given specifications.
2
3
2.1
Derive the expression of gain & cutoff frequency for first and second order
filter LPF, HPF, and verify the filter response for a given frequency.
2
3
2.1
Discuss the basic principle of oscillator. Design and describe the operation
of Phase shift oscillator and Tuned oscillator, Design of RC oscillators.
2
2
1.4
Lesson Schedule
Class No. - Portion covered per hour
1. DC Amplifiers, AC Amplifiers,
2. Summing, Scaling and Averaging amplifiers (Inverting, Non-inverting and Differential
configuration),
3.
Integrator,
4.
Differentiator,
5. Voltage sources, current sources and current sinks,
Powered by www.ioncudos.com
Page 17 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
6. Current amplifiers,
7. Instrumentation amplifier,
8. Phase shift oscillator, Tuned Oscillators, Crystal Oscillator,
9.
10.
Active Filters –First order Low pass &High pass filters.
Active filters- Second order Low pass & High pass filters
Powered by www.ioncudos.com
Page 18 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Review Questions
Sr.No. - Questions
TLO
BL
PI Code
Briefly explain the difference between the DC and AC amplifiers.
1
2
1.4.1
What are the major advantages and disadvantages of a single supply AC
amplifier?
1
1
1.4.1
Explain the difference between (a) inverting and differential summing
amplifier and (b) inverting and non-inverting averaging amplifier.
2
2
1.4.1
Calculate the voltage gain of an opamp inverting amplifier (fig ) which has
R1=680 ohm and R2=39 K. ohm.Also determine the new voltage gain if
2
3
1.4.1
2
3
1.4.1
It is required to measure the weight of the vehicle using weigh bridge
system, Suggest and explain suitable signal conditioning circuit for
measuring the weight interms of voltage.
4
2
1.4.1
Differentiate between integrator and differentiator and give one application
of each.
3
2
1.4.1
Explain the different types of controlled sources.
1
2
1.4.1
Describe the operation of inverting integrator and obtain the expression for
the transfer function.
2
2
1.4.1
Discuss the operation of op amp as differentiator.
3
2
1.4.1
An integrating circuit as in fig has the following components R1=15Kohm,
3
3
1.4.1
the resistor positions are reversed.
A high i/p impedance capacitor coupled non-inverting amplifier is to be
designed to have Av=120 and f1=100 Hz. The input signal is 50mV, and
the load resistance ranges from 2.7kohm to 27kohm. Design a suitable
circuit using a 741 op amp.
Powered by www.ioncudos.com
Page 19 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
R2=330Kohm, C1=0.03uf, R3=15Kohm. Determine the output produced
when 400Hz 3V peak to peak square wave is applied as i/p.
In the circuit shown below Rin=50Ω,Ci=0.1µF,R1=100 Ω,Rf=1k Ω and
supply voltages=±15V.Determine the bandwidth of the amplifier.
1
3
1.4.1
In the figure, if the CMRR of the operational amplifier is 60 dB, then the
magnitude of the output voltage is
2
3
1.4.1
The CMRR of the differential amplifier shown is
2
3
1.4.1
Powered by www.ioncudos.com
Page 20 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
In the figure, the operational amplifier is ideal and its output can swing
between – 15 and + 15 volts.
2
3
1.4.1
2
3
1.4.1
The input Vi, which is zero for t<0, is switched to 5 volts at the instant t = 0.
Given that the output Vo is + 15 volts for t<0, sketch the waveforms of
Vo and Vi. You must give the values of important parameters of the sketch.
T The circuit of figure uses an ideal operational amplifier. For small positive
values of Vin, the circuit works as
Powered by www.ioncudos.com
Page 21 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
The circuit of figure uses an ideal operational amplifier. For small positive
values of Vin, the circuit works as
2
3
1.4.1
Design a non inverting amplifier with a gain of 2.At a maximum output
voltage of 10V the current in the voltage divider is to be 10µA.
2
3
1.4.1
An Op-amp having a 106-db gain at dc and a single pole frequency
response with ft=2Mhz is used to design a non inverting amplifier with
nominal dc gain of 100.Find the 3-db frequency of the closed loop.
5
3
1.4.1
The Guest speaker addressing crowd of 500 audience in an auditorium is
subjected to noise from audience and acoustics of the room, Design a
suitable selctive circuit to enhance the audibility by eliminating the noise.
[Hint : assume maximum voice frequency]
5
3
Explain phase shift oscillator. Design the phase shift oscillator so that f 0 =
200Hz.
6
Powered by www.ioncudos.com
2.1.2
3
1.4.1
Page 22 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Powered by www.ioncudos.com
Page 23 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Course Code and Title: 15EECC205 / Linear Integrated Circuits
Chapter Number and Title: 6. Nonlinear applications of OPAMP
Planned Hours: 12 hrs
Learning Outcomes:
At the end of the topic the student should be able to:
TLO's
CO's
BL
CA Code
Construct and describe the operation of comparators, Zero crossing
detectorsVoltage Controlled Oscillators, triangular and square wave
generater, clamping circuits, Peak detectors and sample and hold circuit.
3
2
1.4
Design Inverting Schmitt trigger circuits, astable and mono stable multivibrators
3
3
2.1
Explain log and antilog amplifiers.
3
2
1.4
Discuss the Specifications and classifications of ADC and DAC
3
2
1.4
Describe the operation of Successive approximation type ADC.
3
2
1.4
Construct weighted resistor DAC and explain its operation.
3
2
1.4
Powered by www.ioncudos.com
Page 24 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Lesson Schedule
Class No. - Portion covered per hour
1. Crossing detectors (ZCD. Comparator)
2. Inverting Schmitt trigger circuits
3. Monostable & Astable multivibrator
4. Triangular/rectangular wave generators, Waveform generator
5. Voltage controlled Oscillator
6. Precision rectifiers, Limiting circuits, Clamping circuits
7. Peak detectors, sample and hold circuits
8. Phase shift oscillator, Wein bridge oscillator ,Log and antilog amplifiers
9. Multiplier and divider,
10. DAC: Weighted resistor; R -2R, Current steering DAC, settling time of DAC.
11
Flash, Dual slope, SAR;.
12 Resolution, quantization error of ADC
Review Questions
Powered by www.ioncudos.com
Page 25 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Sr.No. - Questions
Im
TLO
BL
PI Code
What is comparator? What is the difference between a basic comparator
and the Schmitt trigger?
1
1
1.4.1
List the important characteristics of the comparator? Explain Zero crossing
detectors.
1
2
1.4.1
Design a circuit using Op-Amp to obtain the following transfer
characteristics with VLTP=-2; VUTP=3; VSAT=15; –VSAT=15. Explain the
operation using waveforms and obtain the expressions.
2
3
2.1.2
Explain the operation of Astable multivibrator. How it is used to generate
square and triangular waveforms?
2
3
1.4.1
Implement a monostable multivibrator using the timer circuit shown in
figure. Also determine an expression for ON time ‘T’ of the output pulse.
2
3
2.1.2
I
Powered by www.ioncudos.com
Page 26 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
https://www.youtube.com/watch?v=eaM2kglGuJ8
Explain the precision peak detector and precision clamping circuit with
neat diagrams.
1
2
1.4.1
Explain log, anti log amplifiers.
3
2
1.4.1
The circuit shown below is an inverse log amplifier. Show that the output v o
is proportional to the inverse logarithm of the input vi
3
2
1.4.2
The analog multiplier shown below has the characteristic vp=v1v2.
Determine the output vo for the op amp circuit.
3
2
1.4.2
Powered by www.ioncudos.com
Page 27 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Explain sample and hold circuit.
1
2
1.4.1
For an 8-bit R-2R ladder DAC, the nominal full-scale voltage is 10V.
Calculate the analog o/p for
i) 10100000 ii) 11101010.
6
3
1.4.2
Powered by www.ioncudos.com
Page 28 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Model Question Paper for Minor Exam I
Course
Course Title: Linear Integrated Circuits
Code:15EECC205
Duration: 75min
Max. Marks: 40
Note: Answer any two full questions
Q.No
1a
CLO
PI
Code
BL
06
1
1.4.1
2
07
1
1.4.2
3
07
1
1.4.2
3
06
1
1.4.1
2
07
1
2.1.2
Questions
Marks
Describe the working principle of a standard cascode current
sink and compare its performance in terms of impedance with
simple current sink.
Identify the following current mirror configuration and determine
the drain current of M4 if all the transistors are in saturation.
For two transistor with equal lengths and widths related by
W2:W1 = 5,design a basic current mirror to obtain I= 0.5 mA. ,
let VDD= -VSS= 5 V, kn’ (W/L) 1 = 0.8 mA / V2, Vt= 1 V also
determine the appropriate load resistor.[R]
Draw non-inverting and inverting open loop configuration using
Op-Amp, determine the output voltage swing for the following
inputs:
Vin1=2µV
Vin2=.5V
Vin3=.-3.5µV
Given that VCC= -VSS=12V
In the differential amplifier circuit given below the width of M2 is
twice as that of M1. Find the expression for small signal gain of
the amplifier if the input voltages Vin1 and Vin2 are equal..
b
c
2a
b
Powered by www.ioncudos.com
3
Page 29 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
c
Why compensation is required? Explain the compensation
techniques in an op-amp.
07
1
1.4.1
2
For the differential amplifier configuration given below, with
(W/L)1,2=25/0.5, µnCox=50µA/V2, VTH=0.6V, λ=γ=0 and VDD =3V
a. What is the required input CM for which R SS sustains
0.5V?
b. Calculate RD for a differential gain of 5
06
1
2.1.2
3
List the ideal characteristics of an OPAMP. Give its symbolical
representation and explain the functions of each terminal.
Tabulate the ideal op-amp terminal characteristics.
For the differential amplifier with the current mirror as a load
,determine the (W/L) and drain current of all MOSFET’s for the
following specifications:
Vdd=-Vss=2.5V,
SR>=10V/us(Cload=5pf),
f-3db>= 100kHz(CL=5pF),
a small signal voltage gain of 100,
-1.5<=ICMR<=2V and Pdiss<=1mW.
Model parameters : KN’= 110uA/V2, KP’= 50uA/V2, VTP=-0.7V,
VTN=0.7V, λN=0.04V-1 , λP= 0.05V-1.
07
1
1.4.1
2
07
1
1.4.2
2
3a
b
c
Powered by www.ioncudos.com
Page 30 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Model Question Paper for Minor Exam II
Course Code: 15EECC202
Course Title: Linear Integrated Circuits
Duration: 75min
Max. Marks: 40
Note: Answer any two full questions
Q.No
Questions
Compute the CMRR of the differential amplifier given below
Marks
06
CLO
PI
Code
B
L
2
1.4.2
2
2
2.1.2
3
2
1.4.2
3
1a
b
c
It is required to measure the room temperature of the tissue culture
laboratory in order to maintain the constant temperature of the
room for the better growth of the tissues which is measured using
the RTD .Design a signal conditioning circuit to generate a voltage
proportional to measured temperature. [Sensitivity of RTD is
10mV/°c]
For the following Op-Amp configuration, with three inputs V1,V2 and
V3 , compute the value of feedback resistor R to obtain vout =
100V.
07
07
Given V1=1V,V2=-3V and V3= -5V
Powered by www.ioncudos.com
Page 31 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
2a
Two different pre-amp microphones are used in a recording studio,
one for vocals and other for the musical instrument with output
voltage in the range of 0-2V and 0-0.5V respectively. Design a
suitable circuit using Op-Amp to combine signals from both the
microphones in such a way that the signal corresponding to the
musical instrument should be twice amplification as that of vocal
signal.
06
2
2.1.2
3
For the circuit shown below with the values of R1=10KΩ, Rf=100
KΩ, Cf=1nF.Find
1.Lower frequency limit of integration and
2. Response for the step, square and sine inputs.
07
2
1.4.2
2
For the non inverting amplifier shown below with Rin=50Ω, Ci=
C1=0.1µF, R1=R2=R3=100k Ω, Rf=1M Ω and VCC=+15V.Determine
a) bandwidth of the amplifier
07
2
1.4.1
3
b
b) maximum output voltage swing.
c
Powered by www.ioncudos.com
Page 32 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Compute output voltage Vout for the circuit shown below Amplifier
with Buffer Circuit.
06
2
1.4.1
2
Calculate voltage drops and currents in this circuit by identifying
proper current direction and polarity for voltage .Also calculate the
overall voltage gain of this amplifier in terms of ratio and as a
figure in units of decibels.
07
2
1.4.2
2
Draw the circuit configuration of an instrumentation amplifier with
high input impedance. Using circuit analysis techniques arrive at an
expression for the output voltage in terms of input voltage and
resistances.
07
2
1.4.1
2
3a
b
c
Powered by www.ioncudos.com
Page 33 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Model Question Paper for Semester End Examination
Course Code:15EECC205
Course Title: Linear Integrated Circuits
Duration: 3 hrs
Max. Marks: 100
Note: Answer five questions; any two full questions from each unit-I and unit-II and one full
Question from unit-III. Assume missing data if any
Unit-I
Q.No
1a
Questions
Ma
rks
CL
O
PI
Cod
e
B
L
Differentiate between a current source and current sink? Illustrate
with the help of a single MOS transistor.
06
1
1.4.1
2
1
07
1
2.1.2
3
2
07
1
2.1.3
3
2
08
1
1.4.1
3
1
06
1
1.4.1
2
1
06
1
1.4.1
2
1
b
Determine a suitable circuit configuration to mirror the current
from a reference current of 200ua with high input impedance to
drive a differential amplifier with common mode input voltage for
the following parameters:
R = 2K Ω, Kn2= 10 Kn1= 250 µA/ V2 VDD= 5V.
For a MOS differential pair with a common mode voltage V CM
applied, let VDD = VSS= 1.5V, kn’ (W/L)=4mA/V2, Vt =0.5V
,I=0.4mA and RD =2.5KΩ neglect the channel length modulation.
1. Find VOV and VGS for each MOSFET’s
2. For VCM=-0.2 find vs,iD1,iD2,vD1 and vD2
What is the highest value of vcm for which M1 and M2 remain in
saturation?
Design an NMOS current mirror with VDD= 5 V, VSS= 0 V and Iref
= 100 µA. for the matched MOSFETS L= 10 µm, W = 100 µm, Vt
= 1 v and Kn’ = 20 µA/ V2.
Draw the circuti configuration of a two stage operational amplifier
and explain the different sub circuits in it.
c
What is ground interference? Discuss the effect of resistance
mismatch on CMRR
b
c
2a
Powered by www.ioncudos.com
G
A
Page 34 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
3a
b
Design the currents and W/L values of the current mirror load
differential amplifier to satisfy the following specifications: Vdd= Vss=2.5V,SR>= 10V/us(Cload=5pf),f-3db>= 100kHz(CL=5pF),a
small signal voltage gain of 100 V/V,-1.5<=ICMR<=2V and
Pdiss<=1mW. Use model parameters of KN’= 110uA/V2, KP’=
50uA/V2, VTP=-0.7V, VTN=0.7V,λN=0.04V-1 , λP= 0.05V-1.
List the ideal characteristics of an OPAMP. Explain the terms
input impedance, output impedance, output offset voltage.
08
1
2.1.3
3
2
06
1
1.4.1
2
1
2.1.2
3
c
Unit II
4a
b
c
It is required to measure the room temperature of the food
processing unit in order to maintain the constant temperature
using LM35. Design a circuit that to measure the temperature of
the food processing unit in order to generate a voltage
proportional to change in measured temperature.[Change in
voltage for per degree rise in temperature is 3mV.
It is required to use the microwave system in Microfabrication
unit for processes such as plasma processes (surface
modification, chemical vapor infiltration, powder processing),
chemical synthesis and processing, and waste remediation.
Design the circuit for operating the microwave system in the
range of 5 MHz to 50 GHz frequency with 20 db / decade roll off
rate. Assume the parameters required to design the given
application.
In an anolog communication system using frequency modulation,
it is required to provide preemphasis for the input signal above
2200 Hz before transmission. Design a suitable selective circuit
to provide the required
5a
Differentiate
amplifier.
between
inverting
and
differential
summing
b
Describe inverting integrator and obtain the expression for the
transfer function.
06
2
1
1.3.1
05
2
1
2.1.3
c
𝑣𝑜𝑢𝑡
𝑣𝑖𝑛
2
2
06
2
1.3.1
2
1
07
2
1.3.1
2
1
2.1.3
3
=
1000 and ±15𝑉 𝑑𝑐 supplies, what is the expected output
voltage range?
b) If a non-inverting amplifier is used with ±15𝑉 𝑑𝑐 supplies,
what is the maximum resistance ratio
𝑅𝑓
𝑅1
3
07
A sensor provides a signal voltage between -30mV and +75mV
a) If an inverting amplifier is used with avoltage gain of
1
07
2
2
that can be used
without the op amp saturating?
Powered by www.ioncudos.com
Page 35 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
6a
b
It is required to measure the weight of the vehicle using weigh
bridge system, Suggest and explain suitable signal conditioning
circuit for measuring the weight interms of voltage.
A sinusoidal signal is riding on a 2V dc offset ie. the average
value of the total sinusoidal signal is 2V. Design a circuit to
remove the dc offset, and amplify the sinusoidal signal without
phase reversal by a factor of 100.
Design a voltage shunt feedback amplifier using op-amp for gain
of 50.
c
06
2
07
2
07
2
1.3.1
2
2.1.3
3
1
2
1.4.1
2
2.1.2
3
1
Unit III
Formulate a circuit using Op-Amp to produce the following
hysteresis. Explain the operation using waveforms and obtain the
expressions. VLTP=-2; VUTP=3; VSAT=15; –VSAT=-15.
7a
b
10
Draw tha circuit configuration to generate triangular wave,
describe the circuit operation using waveforms.
Im Implement a monostable multivibrator using the timer circuit shown
in figure. Also determine an expression for ON time ‘T’ of the
output pulse.
I
3
1
10
3
1.4.1
2
1
10
3
1.4.1
2
1
10
3
1.4.1
2
1
8a
https://www.youtube.com/watch?v=eaM2kglGuJ8
Describe the sample and hold circuit.
b
Powered by www.ioncudos.com
Page 36 of 37.
KLE Society's
KLE Society's KLE Technological University
DEPARTMENT OF SCHOOL OF ELECTRONICS ENGINEERING
Powered by www.ioncudos.com
Page 37 of 37.