Download Memory capacity

Chapter 3
80286 MEMORY AND MEMORY INTERFACING
Semiconductor memory fundamentals
 Semiconductor memories are uses as primary storage for
code and data
 Sometime call primary memory
 It’s must fast in responding to CPU, And only
semiconductor memory can do that
 RAM and ROM have three main characteristics: Capacity,
Organization and Speed
Memory capacity
 Number of bits that chip can store is called Chip capacity
 Units in Kbits (kilobits), Mbits (megabits)
 Capacity of memory chip alway given in bits (Not bytes)
 Capacity of memory on computer always given in bytes
Memory organization
 Each location in memory chip can hold 1 bit, 4 bits, 8 bits or
16 bits
 Can hold data equal to number of data pins
 Number of location is depend on address pins
Speed
 Speed of memory is commonly referred to as its access time
 To access data: address is presented to address pins, with a
few time data shows up at the data pins.
 Fast speed or low access varies from a few nanosecond (nS)
to hundreds of nanosecond
 Low access time memory is much more expensive.
ROM (Read-Only Memory)
 ROM is memory that does not lose its contents when power
down.
 Also called nonvolatile memory
 There different types of ROM : PROM, EPROM, EEPROM,
Flash EPROM and Mask ROM
PROM (Programmable ROM)
 User can program it once
 Each bit of PROM has fuse which can blow out
 If data blown into PROM is wrong, This PROM must be
throw away
 Sometime call OTP (one-time programmable)
 Must have ROM burner or ROM programmer to program it.
EPROM (Erasable programmable ROM)
 User can program information to it like PROM
 And can erase content by radiate UV into it approx 15-20
minutes
 Can program and erase up to thousands time.
 When UV use to erase content, All data will be lost
 Program with high voltage (12.5V – 25V)
 Up to 1000 time to program and erase.
EEPROM (Electrically erasable programmable ROM)
 Can program and erase content by normal read write
operation
 Can program and erase content in one address
 Can program and erase while it is in system board
 Can program and erase up to 10,000 times
Flash memory EPROM
 Early 1990s, Flash EPROM has become a popular userprogrammable memory chip.
 Erase all content at once in a second, New version is can
erase in block.
 Widely use in ROM-BIOS of PC (Can be failed by virus)
 May be replace the hard disk as mass storage medium
 Access time approx 100 nS, (Hard disk is tens mS)
 But Flash memory has Program/Erase cycle only 10,000
times.
Mask ROM
 Mask ROM is also call ROM which all content can be
programmed by IC manufacturer.
 It is not user-program memory.
 Technology mask is used in IC fabrication.
 Low cost per unit
RAM (Random Access Memory)
 Also called volatile memory , That cutting off power it’ll lost
data.
 Many type of RAM : Static RAM (SRAM), Dynamic RAM
(DRAM) and NV-RAM (nonvolatile RAM)
SRAM (Static RAM)
 Storage cells in static RAM memory are made of flip-flops
 Do not require refreshing circuit like Dynamic ram
 Each flip-flop made from 6 transistors (1 bit) or 4 transistors
in a new version, Using CMOS technology.
 Low capacity per unit, But low access time.
 Widely used for cache memory.
DRAM (Dynamic RAM)
 Storage cells in dynamic RAM memory are made of
capacitor
 It requires refreshing circuit cause leakage of capacitor.
 High capacity and cheaper cost per unit but slow speed
 While chip in refresh time data can not be access
Packaging issue in DRAM
 To reduce number of address pin, Multiplexing /
Demultiplexing technique is used
 Address pins are divided in a square of rows and columns.
 First half address call row, and second half call column.
 First half address is activating by RAS (Row address strobe)
 Second half address is activating by CAS (Column address
strobe)
DRAM Organization
 DRAM can have any of x1, x4, x8 or x 16 organization
 Most DRAM are x1 and x4
 In most memory chip data pin is called I/O (bi-directional
port)
 DRAM has separate pins Din and Dout, Address with RAS
and CAS
NV-RAM (nonvolatile RAM)
 Like other RAM but don’t lose data when power down
 It has lithium battery to backup data when power down
 Has intelligent control circuitry that battery is use only when
no power
 All component are packed in one chip with can retain data in
10 years with out power supply (Made by DALLAS)
 And it’s very expensive, Read/write operation is exactly the
same as SRAM
 New version of NV-RAM does not need battery. (Made by
SIMTEK)
Using PAL 16L8 as an address decoder
 One advantage of 16L8 PAL is can reprogram circuit.
 But user must have burner or programmer to program it.
Cold boot in the IBM PC/XT
 8088 is reset CS:IP to FFFF:0000 or FFFF0H where BIOS
live
 8088 starts to fetch and execute instructions from that
address (Far jump to Fooo:E05BH)
 This code tests the CPU, ROMs, BIOS and BASIC by
checksum technique, Then it tests RAM
 Initialized DMA and handed over to DOS
Data integrity in ROM
 Checksum is use to check integrity of ROM’s content
 Surge may cause of corruption of contents of ROM
 Checksum process is all byte are add together with no
carries.
 Then made 2’s complement of total sum, and place in last
byte after data
 To check data integrity all byte and checksum are add
together and result must be Zero.
Memory bank
 Memory arrangement on the board is referred to memory
bank
 Must have 1 bit use for parity bit, to perform data integrity
Parity bit generator/checker in the IBM PC
 There are two types of error in DRAM chip: Soft error and
Hard error
 Soft error is single bit is changed from 1 to 0 or 0 to 1 due
to current surge
 Hard error is 1 or multiple bits get stuck into 1 or 0
permanently
 Parity bit is use to detect both of error
Wait-state generation in the IBM PC/XT
 In T3 8088/86 sample the READY pin, if READY = 0 then
wait state (Tw) will insert as extra clock betaween T3 and
T4
 Wait-state will generate until READY pin go high
 READY is active by: -IO/CH RDY signal form I/O on slot
to insert wait-state
 When DMA control the bus, AEN = 1