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DØ-note 4309 July 30, 2003 Characteristics of the Layer 1 Silicon Sensors for the Run IIb Silicon Detector M. Demarteau1, R. Demina2, S. Korjenevski2, F. Lehner3, R. Lipton1, H.S. Mao1, R. McCarthy4, R. Smith1 1) Fermilab, Batavia, USA 2) Kansas State University, Manhattan, USA 3) University of Zurich, Switzerland 4) State University of New York at Stony Brook, USA Abstract The characteristics of the prototype Layer 1 Hamamatsu silicon sensors for the Run IIb DØ silicon detector are described. The results of the electrical and mechanical characterizations indicate that the overall sensor quality is excellent. The sensors behave in all aspects very satisfactory and our specifications are well matched. 1 1. Introduction Extended running of the Tevatron at a center of mass energy approaching 2 TeV provides an enormous physics potential for the collider detectors. Our current theoretical prejudice indicates that the ability to identify heavy quarks in the final state is absolutely necessary to resolve these new physics channels. A silicon strip detector is currently the tool most suited to identify heavy flavors in proton-antiproton collisions. It is anticipated that the current silicon detector of the DØ experiment will start performing marginally by an integrated luminosity of 4 fb-1 due to radiation damage and low signal to noise ratio. It is for these reasons that the collaboration has designed a new silicon tracker [1]. The silicon tracking system will be a six layer device, divided into two radial groups. The outer group is comprised of layers 2 through 5. The basic building block of the outer layers is a stave. A stave is a two layer structure of silicon sensors. Silicon sensors are mounted on each side of a rohacell stave core, which has embedded cooling channels. One side of the stave will have axial readout, the other side stereo readout. The inner two layers, covering a radius between ~18 mm and ~35 mm, will have axial readout only. These layers have a significantly reduced radius with respect to the current tracker. The sensors are mounted on carbon fiber support structures. For Layer 0, the hybrids will be located outside of the tracking volume and the signals transmitted from the silicon over analogue cables to the front-end readout chip. This choice is dictated by the cooling requirements, the desire to minimize the amount of material for the innermost position measurement, and the very limited amount of space available. For Layer 1 the hybrids are mounted on the silicon sensors. The innermost layers have a six-fold symmetry. Each layer has two sub-layers, layers A and B. The sensors for the B sub-layer are mounted on castellations in the carbon fiber support structure. There will be six sensors in z per azimuthal sector. Our design thus calls for 144 sensors each for layers 0 and 1. This note describes the results of the tests done at Fermilab, KSU and Zürich on a set of prototype Layer 1 outer layer sensors and test structures. 2. Sensor Specifications All silicon detectors are p+n type single sided sensors, with AC coupling and biased through poly-silicon resistors. The expected fluence of the inner layer detectors is expected to be 1.251013 1 MeV eq. n/cm2/fb-1 (Layer 0) and 4.121012 1 MeV eq. n/cm2/fb-1 (Layer 1) respectively including a safety factor of 1.5. All inner layer sensors will be provided by Hamamatsu Photonics. The silicon sensors will have a single-guard ring with peripheral n-well as designed by Hamamatsu in order to improve the high voltage stability after irradiation. The detailed specifications for the sensors can be found in [2]. Prototype Layer 1 sensors were only purchased from Hamamatsu for two reasons. First, the specifications for the layer 0 and layer 1 sensors are the same. Secondly, Hamamatsu has already delivered sensors for the Layer 00 detector for CDF, which are very similar to our proposed Layer 0 sensors. A few Layer 00 sensors were obtained from CDF and were submitted to an extensive irradiation program at the Fermilab booster. The performance of the sensors with irradiation was well within our specification [3]. Table 1 summarizes some of the main characteristics for the sensors. A detailed mechanical drawing of the layer 1 sensor, drawing number 3823.210-ME-399436, on which the 2 location of strips, fiducial marks, bonding and testing pads as well as the strip numbering definition and other features are indicated, is available and was provided to Hamamatsu (see Fig. 1). Figure 2 shows the equivalent drawing, drawing number 3823.210-ME399678, for the Layer 0 sensors. Sensors are also outfitted with a 20-field scratch pad for unique identification. Specifications: Wafer thickness Depletion voltage Leakage current Junction breakdown Implant width Al width Al strip resistivity Coupling capacitance Coupling capacitor breakdown Interstrip capacitance Polysilicon bias resistor Active Length (mm) Active Width (mm) Cut Length (mm) Cut Width (mm) Strip Pitch (m) Readout Pitch (m) # of Readout strips Defective strips Layer 0 32020m, sensor warp less than m 40V<Udep<300V <100nA/cm2 at RT and FDV+20V, total current < 4 A at 700 V >700 V 6 m 2-3 m overhanging metal < 30 /cm >10 pF/cm Layer 1 32020m, sensor warp less than m 40V<Udep<300V <100nA/cm2 at RT and FDV+20V, total current < 4 A at 700 V >700 V 7 m 2-3 m overhanging metal < 30 /cm >10 pF/cm >100 V >100 V <1.2 pF/cm 0.8 0.3 M 77.360 12.800 79.400 14.840 25 50 256 <1% <1.2 pF/cm 0.8 0.3 M 77.360 22.272 79.400 24.312 29 58 384 <1% Table 1: Specifications for inner layer sensors 3 Figure 1: Detailed Layer 1 sensor layout. 4 Figure 2: Detailed layout of Layer 0 sensor. 5 3. Prototype Sensors and Test Structures In April 2002 a set of ten prototype Layer 1 sensors were ordered from Hamamatsu Photonics, which were shipped to Fermilab on September 12, 2002. In addition we ordered another three sensors in May 2003, which were shipped to Fermilab on July 13. These sensors came from an overrun of the previous production, i.e. had the same lot number. The specifications of the sensors are detailed in reference 1. In Table 1 a summary of the specifications for the Layer 1 sensors is given. The sensors are produced on 320 m thick 6” wafers. Figure 3 shows a layout of the wafer. All the 13 sensors received are from one batch. In addition to the sensors, test structures are an integral part of the wafer. There are four separate test structures on a wafer of which we receive one of the two adjacent to the long side of the sensor. They are indicated by the serial numbers of the four sensors on the wafer. The test structure contains two ‘baby-sensors’. One is identical to the full-size sensor and is different only in the fact that it has eight readout strips. The other baby-sensor has no poly-silicon resistors. Adjacent to the baby-sensors are four implants with aluminization with separate contacts for each. As per our specifications, there are also silicon diodes on the test Figure 3: Layout of 6" Hamamatsu wafer 6 structure, with and without guard ring structure. One area on the test structure contains a field MOS structure for flatband voltage measurements, and monitors for the implant resistance and coupling capacitance. The remaining features on the test structure are arrays of mainly poly-silicon resistors. The characterization of the sensors is divided into three distinct parts. In the next section the measurements on the test structures will be described. The section following is the main section, describing the measurements performed on the sensors themselves. All measurements follow the procedures as outlined in reference [4]. The note concludes with a summary of the mechanical properties of the sensors. Both the L1 test structures and sensors were also irradiated and characterized after irradiation. Those results are described in an accompanying note [5]. 4. Electrical Characterization of the Test Structures Ten test structures were received. Test structures, 9.10.11.12, 13.14.15.16, and 17.18.19.20 were measured at KSU, test structure 5.6.7.8 at Zürich, and test structure 1.2.3.4 at Fermilab. Five parameters are determined from measurements on the test structures: i. Coupling Capacitance and Breakdown Voltage of the coupling capacitor ii. Implant resistance iii. Aluminum strip resistance iv. Poly-silicon resistance v. Depletion voltage of silicon diodes vi. Total load and interstrip capacitance vii. MOS capacitance and flatband shift 4.1. Coupling Capacitance and Coupling Capacitor Breakdown On the test structure there is a series of four strips consisting of the p+ implant only, the coupling capacitor and the aluminization. Pads are connected to the implant (DC-pad) and the aluminum strip (AC-pad) (see Figure 4). The frequency dependence of the coupling capacitance for each of the four strips was mapped out and is shown in Figure 5. The low frequency limit gives a coupling capacitance of 115 pF, or 14.8 pF/cm, well within our specification. The breakdown voltage was determined for three strips on this structure. A voltage was applied across the coupling capacitor by placing a probe on the DC-pad and the AC-pad. Breakdown of the capacitor is defined as the voltage when the current reaches 100nA. Figure 6 shows the dependence of the current versus voltage for these three channels. A breakdown well in excess of our specified breakdown value of 100V is observed. 7 The breakdown voltage was also determined on a few strips on a baby sensor on test structure 1.2.3.4. The coupling capacitors for strips 1, 2, 3, 5, 6 and 7 had a breakdown value of 180, 150, 160, 200, 240 and 170V, respectively. Figure 4: Implant and Coupling Capacitor structure on the Test Structure 8 Coupling Capacitor L1 teststructure 120 100 C (pF) 80 60 40 CC1 CC2 20 CC3 CC4 0 0.1 1 10 100 1000 10000 Frequency (kHz) Figure 5: Frequency dependence of coupling capacitance on Layer 1 test structure. Coupling Capacitor Breakdown I (nA) 1000 0 -1000 -2000 CC1 -3000 -4000 -5000 CC2 CC3 0 50 100 150 200 250 300 Voltage (V) Figure 6: IV-Curve for measurement of Ccc breakdown 4.2. Implant Resistance 9 The same four strips, consisting of the p+ implant, the coupling capacitor and the aluminization, were used to determine the implant resistance. To facilitate the measurement, the corresponding pads of two adjacent strips are wirebonded at the far end of the strip. Probes are connected to the implant (DC) pads. The implant resistance was measured by mapping the current versus the voltage differential between the pads. Sets of two strips were measured on test structure 1/2 and give an implant resistance of 130 k/cm, to be compared to 104 k/cm for the outer layer sensors [6], which are specified to have 15% wider implant strips. The implant resistance however, is not part of our specifications, but the measured value agrees well with our expectations of a typical p+ doping of this width. Alternatively, the implant resistance was measured using the ‘N LW20’ feature on the test structure. A resistance of 2605 was measured, as shown in figure 7. The feature having a length of 0.02 cm gives 130 k/cm, in excellent agreement with the direct measurement on the baby sensor. p-implant R=2605 Ohm, length=0.02 cm R/cm=130kOhm/cm 3.E-04 2.E-04 I (A) 1.E-04 0.E+00 -1.E-04 -2.E-04 -3.E-04 -0.60 -0.40 -0.20 0.00 0.20 0.40 0.60 U (V) Figure 7: Implant resistance measurement using feature ‘N LW20’ 4.3. Aluminum Strip Resistance The aluminum strip resistance was measured by applying a voltage differential between two neighboring AC pads and mapping the current versus voltage. Three sets of two strips were measured on test structure 1 and give a resistance for the aluminization of 22.1 /cm, well within our specification which requires a resistance of less than 30 /cm. Figure 8 shows the measurement for the set consisting of strips 6 and 8. The measurement on all the other strips gives identical results. The measured aluminum resistance corresponds to an aluminum thickness of about 1.5 m, if we assume a 2 m wider metal layer over the actual implant width of 7 m. The introduced ENC noise of a total series resistance of around 170 for a strip length of 7.74 cm in front of the 10 preamplifier amounts to a noise contribution of less than 200e at our shaping times of 132 ns. It can therefore be neglected. The aluminum strip resistance was also determined from feature ‘LW6000’ on the test structure. The feature corresponds to an aluminum trace that meanders around the implants and MOS structures (see Figure 9). The resistance of this structure was measured to be 210 for a trace length of 60.6 mm, or 35 /cm as figure 10 shows. Baby Sensor, Strips 6-8 Voltage (V) 0.6 0.4 0.2 0 -0.002 -0.0015 -0.001 -0.0005 0 0.0005 0.001 0.0015 0.002 -0.2 -0.4 -0.6 I (A) Figure 8: I-V curve for aluminization on strips 6 and 8 for the baby sensor on test structure 1. 11 Figure 9: A long aluminum trace surrounds various implant features on the test structure. The implants in the upper left-hand corner correspond to the p+ and n+ implants. Aluminium Trace LW6000 3.E-04 2.E-04 I (A) 1.E-04 0.E+00 -1.E-04 -2.E-04 -3.E-04 -0.06 -0.04 -0.02 0.00 0.02 0.04 0.06 U (V) Figure 10: Measurement of aluminum strip resistivity on feature ‘LW6000’. 4.4. Polysilicon Resistance 4.4.1. Strip Poly-silicon Resistance The resistance of the poly-silicon resistor was measured on the baby sensor. The baby sensor has exactly the same layout as the full strip detector. Also on the baby sensor there 12 are intermediate and readout strips. Simply because of space constraints, the poly-silicon resistors cannot all reside on one end. The resistors alternate between strips. Consequently, the poly-silicon resistors for the intermediate strips are all at one end, and the resistors for the readout strip are all at the other end. The poly-silicon resistor value has been measured on the intermediate strips, by placing the probes on the DC-pad and the bias line and applying a voltage differential, while the detector was biased. Figure 11 shows the I-V curve as measured for four strips on test structure 5. The measured polysilicon resistor value is 0.7 ± 0.1 M. Performing the same measurement on the adjacent strip, the readout strip, still provides valuable information. Placing the probe on the DC pad measures the implant and polysilicon resistance in series. The average value of the resistance was determined to be 1.5 ± 0.15 Mslightly lower than the sum of the individual resistances. Rpoly on baby sensor 1.5E-05 1.0E-05 I (A) 5.0E-06 0.0E+00 strip 1 -5.0E-06 strip 2 -1.0E-05 strip 3 strip 4 -1.5E-05 -5 -4 -3 -2 -1 0 1 2 3 4 5 U (V) Figure 11: Measurement of the poly-silicon resistance on intermediate strips of the baby sensor on test structure 5. 4.4.2. Monitor Polysilicon Resistors The test structure also contains various arrays of poly-silicon resistors for monitoring purposes. These arrays are labeled ‘PSxx’, with xx a numeric identifier. The resistors labeled ‘PS-20’, ‘PS-10’ and ‘PS-0’ have all been measured. The resistors show an “ohmic” behavior in the region between ± 2 V, and have a consistent resistance of 1.05 ± 0.01 Min this region. 4.5. Depletion Voltage of Silicon Diodes The test structure for the layer 1 sensors has silicon diodes with and without guard ring structure. The depletion voltage of the silicon diodes was determined using the C-V method. Figure 12 shows the C-V curve for the diodes for four frequencies. The depletion 13 voltage is lower by about 5-10% with respect to the depletion voltage for the corresponding sensors on this wafer. In general, the depletion voltage for segmented strip detectors is higher than the depletion voltage for planar diodes. 1/C2 (pF-2) C-V L1 diode teststructure 4.50E+03 4.00E+03 3.50E+03 3.00E+03 2.50E+03 2.00E+03 1.50E+03 1.00E+03 10 kHz 100kHz 500kHz 1 MHz 20 40 60 80 100 120 140 160 180 bias (V) Figure 12: C-V curve for planar diode on test structure 5. 4.6. Total Load and Interstrip Capacitance The total load and interstrip capacitance was measured on test structure 8. The procedure as outlined in the Quality Assurance document [4] was followed. The setup with the equivalent circuit diagram is shown in figure 28. Two measurements are made. The first measurement involves a three probe setup. Probe 1 is placed on the AC pad of strip N; Probe 2 and 3 are placed on the AC pads of the adjacent strips, strip N-1 and N+1, respectively. The probes on strip N-1, N+1 and the connection to the backside of the detector are tied together at the input of the LCR meter. The capacitance measured this way is, to first order, the total load capacitance the readout chip sees and is denoted by C L or C1. In a second measurement one of the probe tips adjacent to the center probe tip, is lifted. The capacitance measured in the second measurement is denoted C2. From the equivalent circuit diagram one finds that CL = C1 = 2 Ci + C b 14 C2 = Ci + Cb . Here, Cb refers to the capacitance of the strip to the backplane and Ci is the interstrip capacitance. CL is to first order the total load capacitance on the readout chip. The second measurement can of course be performed for both neighboring strips and the results should be identical. In the results presented here, unless mentioned explicitly, the capacitance C2 is the average capacitance measured for the pair (N, N+1) and the pair (N, N-1): C2 = ( C2 (N, N-1) + C2 (N, N+1) ) / 2 . Figure 13 shows the dependence of C1 as function of frequency for two triplets of strips on the test structure. At a frequency of 1 MHz, the frequency of relevance for operation with the SVX4 readout chip, the total capacitance is about 8.5 pF, or 1.1 pF/cm. Figure 14 shows the voltage dependence of the total load capacitance. As was also observed for the outer layer sensors, the capacitance reaches a plateau already at 10 V. Total strip capacitance (pF) 10 C L (pF) 8 6 4 2 0 1 10 100 1000 Frequency (kHz) Figure 13: Total load capacitance as function of frequency as measured on the baby sensor. The interstrip capacitance to both neighbors and to one neighbor is shown in figure 15. The high frequency limit is 0.39 pF/cm for the interstrip capacitance to one neighbor and 0.71 pF/cm for the interstrip capacitance to both neighbors. Our specifications call for a total interstrip capacitance of less than 1.2 pF/cm. 15 Total strip capacitance 20 1kHz 2kHz CL (pF) 15 5kHz 10kHz 10 20kHz 50kHz 100kHz 5 200kHz 500kHz 0 1MHz 0 30 60 90 120 bias (V) Figure 14: Total load capacitance as measured on the baby sensor for various frequencies as function of backside bias voltage C int (pF) Interstrip capacitance 7 6 5 4 3 2 1 0 Cint both Cint both Cint one neighbor 1 10 100 1000 Frequency (kHz) Figure 15: Interstrip capacitance as function of frequency, with respect to one and two neighbors. 16 4.7. MOS capacitance and flatband shift The delivered test structures from Hamamatsu contain also a p-MOS structure1. This MOS capacitor is labeled as “FI” in figure 9 and has an area of 0.5 mm2. MOS capacitors are well suited to determine the fixed oxide charge in the oxide layer. Figure 16 shows the C-V characteristics of three MOS capacitors on three different test structures. The measurements were done as outlined in the QA document [4]. We are measuring in the high frequency regime as opposed to a quasi-static measurement and hence we are sensitive to the charge in the depletion layer only. The curves in figure 16 look as expected for high frequency measurements on MOS capacitors. At large positive gate voltages we are in the accumulation region, since the majority carriers from the nsubstrate are attracted to the silicon-oxide interface. Going to lower gate voltages depletes the substrate more and more and the capacitance is therefore dropping. The voltage separating the accumulation from the depletion region is called flatband voltage. Inversion finally occurs at negative voltages, since an inversion layer of minority carriers is built directly at the interface. MOS-FI structure 35 30 capacitance (pF) 25 20 L2-63/64 L2-62 L1-6/7 15 10 5 0 -15 -10 -5 0 5 10 15 20 gate voltage (V) Figure 16: MOS capacitance measurements on three test structures. In the case of our MOS capacitors the flatband voltage is at very low values of 1-2 V. Since the flatband condition corresponds to a flat energy band in the silicon ideally at zero volt of the gate, the amount of fixed charge in the oxide is less than 110-11 C/cm2 and hence rather small. 1 The substrate is n-type, but the created inversion layer is of p-type. 17 5. Electrical Characterization of the Sensors Hamamatsu delivered ten prototype sensors to Fermilab in September 2002 and another three in July 2003. The sensors were probed both at Fermilab and KSU. The following sets of measurements are performed on the sensors: i. I-V curve, to measure total detector leakage current as function of bias voltage up to 700V. ii. Long-term stability of detector total leakage current iii. C-V curve, to measure the total detector capacitance as function of bias voltage. The depletion voltage is extracted from this measurement iv. AC-scan, to measure the coupling capacitance and the current of individual strips. Sensor defects, most commonly shorted strips and pinholes, are identified with this measurement. v. DC-scan, to measure the leakage current of individual strips. Sensor defects, most commonly leaky strips, are identified with this measurement. vi. Interstrip isolation by measuring the interstrip resistance and measurement of resistance of bias resistor vii. Interstrip capacitance and total load capacitance An IV and CV as well as full strip scans were performed for all sensors. Not all sensors have undergone the full series of detailed tests like interstrip capacitance measurements, however. Table 2 shows a summary which measurements were performed on which sensor. Some of the sensors tested were irradiated and the results are described in reference [5]. Some other sensors were used to build detector modules. The results of the module readout noise tests will be described in an accompanying note [7]. Serial No. Tested at 1 3 4 6 7 9 11 12 13 20 21 22 24 FNAL FNAL FNAL KSU FNAL FNAL KSU KSU KSU KSU FNAL FNAL FNAL IVScan I(nA) @ 350V 81 67 54 56 482 174 24 28 28 31 54 51 67 CVScan FDV (V) DCscan strip # AC-scan strip # 110 120 110 130 125 105 125 115 120 126 120 130 120 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 13,47,267 320 0 0 0 0 47/48 0 0 0 Comment broken HPK Strip# 267 320 irradiated irradiated irradiated 47/48 HPK I(nA) @350V HPK FDV (V) 56 56 69 76 228 55 55 65 55 67 69 65 85 130 150 140 150 150 130 140 130 140 140 140 150 140 18 Table 2: Summary of measurements on the L1 sensors. 5.1. Characterization at the Manufacturer The contract with the vendor calls for an electrical characterization of the sensors at the company. Each sensor should undergo: o I-V curve to 500 V at a temperature of 25 3C and a relative humidity of <50% o Optical inspection for defects, opens, shorts and defects, and verification of mask alignment to better than 2.0 m o Depletion voltage as determined from the C-V method o AC capacitance value measurement and pinhole determination In addition, the manufacturer is asked to verify the poly-silicon resistor value, implant resistivity, coupling capacitor value and its breakdown as well as the aluminum resistance on the test structures. The vendor provides these results as average per delivered batch. All ten sensors came from a single batch, SWA61589, and the Hamamatsu data pertaining to the single batch is listed in Table 3. Our measured results on the test structures, as described in section 4 of this document, are in reasonable agreement with Hamamatsu’s findings on the aforementioned quantities. Parameter Rpoly Rimplant RACAL Cc Vbreakdown Average Value 0.75 M 1.6 M 170 107 pF 155 V Table 3: Average value of parameters as determined by Hamamatsu using the monitor patterns pertaining to the single batch of wafers for the Layer 1 sensors. Figure 17 shows, for completeness, the IV-curves for all 13 sensors as measured by Hamamatsu. Sensor 7 shows an anomalous current bias voltage behavior, but still meets our specification of a total detector current less than 4 A at 700V. 19 Total Leakage Current, HPK 500 450 1 3 4 6 7 9 11 12 13 20 21 22 24 400 350 Ileak (nA) 300 250 200 150 100 50 0 0 100 200 300 400 500 600 700 800 Bias Voltage (V) Figure 17: Total detector leakage current as function of bias voltage as measured by Hamamatsu for all 13 layer 1 prototype sensors All sensors have a depletion voltage determined at the vendor between 130-150V, with a granularity of 10V. HPK measures the C-V dependence in steps of 10 Volts and defines the full depletion voltage as the lowest voltage where the increase in 1/C2 is found to be less than 2% [8]. This method tends to overestimate the depletion voltage by about 20V compared to the DØ measurement, which uses an alternate criterion, discussed in section 5.4. Table 4 lists all the sensor defects as noted by Hamamatsu. Three sensors out of 13 are flagged as having a defect. Sensors 6 and 7 have a shorted coupling capacitor. Sensor 20 has an open on two neighbored strips in the coupling capacitor. Unfortunately sensor 6 was irreversibly damaged during the initial probing. Lot No. Serial No. Type Ch. No. SWA61589 6 Coupling short 267 SWA61589 7 SWA61589 20 Coupling short AC-AL open 320 47 AC-AL open 48 Table 4: The defects on the three sensors as noted by Hamamatsu 20 5.2. IV-Scan All sensors that were tested have good detector leakage current, except one. Sensor 7 has an anomalous leakage current, but still meets our specification. Figure 18 shows the difference in total detector leakage current as measured at Hamamatsu and our test sites and shows that, within the uncertainty of the measurement, we can reproduce the Hamamatsu measurements. The difference is less than 30 nA, except for sensor L1-0007 and L1-0020 at very high bias voltages. Note also, that the leakage current difference is almost independent of bias voltage. The small offset in current can be attributed to the different environmental conditions for the measurements at the two different locations. Our own measurements were done at a temperature of 19-21C whereas Hamamatsu measures at 25ºC. The breakdown voltage is well above the specified 700 V for all sensors. HPK - Our Measurement 200 150 1 3 100 4 I (nA) 6 7 50 9 11 12 0 13 20 21 -50 22 24 -100 -150 0 100 200 300 400 500 600 700 800 Bias Voltage (V) Figure 18: Difference in leakage current between Hamamatsu and our own measurement for all layer 1 sensors. 5.3. Long Term Stability A long term test facility is available at Fermilab to monitor sensor behavior under bias for extended periods. The facility consists of a light and gas tight box, which can accommodate up to six sensors in aluminum holders and a PC/Labview based readout system shown in figure 19. Data for sensor currents, box temperature and humidity are recorded at set intervals, typically every five minutes, during the burn-in period. Figure 20 shows the results of a burn-in of four L1 prototype sensors over a period spanning approximately 96 hours. Detectors were biased to 300 V. The sensors were purged with nitrogen at various rates. The lower graph shows the dew point measured inside the dry box. Note that the minimum dew point meter readout is -40C. Under all conditions, no 21 run-away behavior of the currents is observed. Even sensor 7 shows a stable sensor leakage current. Room temperatures varied by 3.5C during the test and the currents are corrected to 20C. Some small residual time dependence is visible. These variations are most prominent during periods when the temperatures change most rapidly. This residual variation appears to be due to a time lag between the air temperature recorded by the PC and the actual sensor temperature. However, no long-term drifts of the leakage currents have been observed and the sensors turned out to exhibit a rather stable bias behavior. The measurements were repeated for a 24 hour period at a bias voltage of 500 V and the currents and dew point measurements are shown in Figure 21. The currents plotted in the lower figure are again normalized to 20C. Again, no long-term drifts of the leakage currents are observed, also not for sensor 7. The slight increase for sensor 4 after two hours precedes the slight increase in temperature that is observed. 22 GPIB Temp, humidity HP 3456 DVM Keithley 485 pa meter Keithley 706 switch box Keithley 2410 ps PC Labview Test Box with detector diodes Figure 19: Setup for long term sensor current stability 23 Long Term Stability Layer 1 sensors at V bias = 300 V I (nA) 10000 1000 100 L1-09 L1-03 L1-07 10 0.0E+00 L1-04 5.0E+04 1.0E+05 1.5E+05 2.0E+05 2.5E+05 3.0E+05 3.5E+05 Elapsed Time (s) T ( 0C) 30 20 10 0 -10 -20 -30 Temp Dew Point -40 -50 0.0E+00 5.0E+04 1.0E+05 1.5E+05 2.0E+05 2.5E+05 3.0E+05 3.5E+05 Elapsed Time (s) Figure 20: Four day burn-in results of four outer layer Hamamatsu sensor. The bias voltage was set to 300V. 24 Temperature and Dew Point, Long Term Test, (4/14-4/15/03) Temperature ( 0C) 30 20 10 0 -10 -20 -30 Temp -40 Dew Point -50 10 100 1000 10000 100000 Time (s) Long Term Stability, Layer 1 Sensors, Vbias = 500 V 10000 I (nA) 1000 100 L1-09 L1-03 10 L1-07 L1-04 1 10 100 1000 10000 100000 Time (s) Figure 21: Long term stability of four Layer 1 sensors over a period of 24 hours at a bias voltage of 500 V. Note the logarithmic scales. 25 5.4. CV-Scan The CV-scan is used to determine the depletion voltage. The depletion voltage at our testing centers was extracted as the intercept of the two straight lines in a 1/C 2 - Vbias plot. Both Fermilab and KSU measured depletion voltages, which were consistently lower than Hamamatsu. However, the difference can be attributed to Hamamatsu’s alternative approach to determine the depletion voltage. Figure 22 shows the CV-curves for all 13 Layer 1 sensors. All of them show the clear and distinct characteristics of a typical 1/C 2 versus bias voltage graph. A comparison of the depletion voltages as measured at the test centers and by Hamamatsu is shown in figure 23. -2 1/C2 (1/pF)2 * 1 E9 C vs Voltage 3000 L1_001 2500 L1_003 L1_004 L1_006 2000 L1_007 L1_009 1500 L1_011 Vdepl=105-130V L1_012 1000 L1_013 L1_020 L1_021 500 L1_022 L1_024 0 0 50 100 150 200 250 300 Bias Voltage (V) Figure 22: CV-curves for all layer 1 sensors; the straight lines indicate the method for depletion voltage determination. 26 Depletion Voltage HPK (V) 160 150 140 130 120 110 100 90 90 100 110 120 130 Depletion Voltage CV Scan (V) Figure 23: Comparison of depletion voltage values measured with our CV method and Hamamatsu measurements; the line indicates one-to-one correspondence. 5.5. AC-Scan The integrity of each strip is verified with the AC-scan. The AC-scan measurement is performed probing the AC-pad and the bias ring. A backside voltage of 20V is applied. The scan consists of two steps. First, a voltage of 80V is applied to the AC pad and the current through the dielectric layer of a R/O strip is measured. In a second step the voltage is lowered to 0V and the capacitance is measured with a LCR meter. The capacitance represents the coupling capacitance of the dielectric layer. Figure 24 shows a typical AC-scan taken at a frequency of 100 kHz. The coupling capacitance is lower due to the frequency response of a low-pass filter consisting of coupling capacitor and implant resistor. At lower frequencies the measured capacitances approach their zerofrequency limit and the values so obtained are consistent with the test structure measurements in section 4. As a result of our probing we could verify that ten sensors claimed by Hamamatsu as being flawless, do not have any open, short or pinhole. The three AC defects reported by the vendor on the three remaining sensors (and listed in Table 4) were all identified during our probing of the sensors as indicated in Table 2. However, we also found two more pinholes on sensor 6. Unfortunately these two defects could not be confirmed since the sensor was irreparably damaged during the initial probing. Figure 25 shows the current through the dielectric layer as measured on sensor 13 with the AC-scan. Good strip capacitors typically have currents smaller than 100 pA. In case of a pinhole, the dielectric currents are much higher and reach immediately the current compliance of the SMU, which is set to 100 nA. As can be seen from figure 25 no pinholes were detected on sensor 13. 27 AC Scan, Layer 1, Sensor 13 80 70 60 Cc (pF) 50 40 30 20 10 0 0 50 100 150 200 250 300 350 Strip Number Figure 24: AC-scan of coupling capacitance for sensor 13 at a frequency of 100 kHz. Idielec, Layer 1, Sensor 13 200 180 160 Number of strips 140 120 100 80 60 40 20 0 0.051 0.056 0.061 0.066 0.071 0.076 0.081 0.086 0.091 0.096 0.101 0.106 0.111 0.116 Idiel (nA) Figure 25: Idielec as measured in AC-scan for sensor 13. 28 5.6. DC-Scan A full DC-scan was also performed on all L1 sensors, with the backside at full bias. No anomalies were observed. Figure 26 shows the distribution in strip current for all 3840 R/O strips of the first ten layer 1 prototype sensors that were received in fall 2002. We require strips to have a leakage current less than 10 nA per strip at the full depletion voltage (FDV). Only 14 strips have a strip current above 1 nA. None of these strips can be considered leaky according to above definition. Ileak for all 10 Layer 1 sensors Number of Strips 1200 Average leakage per strip is 0.04 nA 1000 800 600 400 14 strips leakage at 1 nA 200 3 1 0.27 0.26 0.25 0.24 0.23 0.22 0.2 0.21 0.19 0.18 0.17 0.16 0.15 0.14 0.13 0.12 0.1 0.11 0.09 0.08 0.07 0.06 0.05 0.04 0.03 0.02 0 0.01 0 I leak/strip (nA) Figure 26: DC-scan results for the leakage current per strip for all strips of the ten prototype Layer 1 sensors. 5.7. Polysilicon bias and interstrip resistors The DC-scans performed at KSU were also used to determine the poly-silicon resistor values on all intermediate strips by applying a small voltage of 1V across the DC-pad and the bias rail while the backside was kept at bias potential. Such a scan is sensitive to strip regions on the sensor with low interstrip resistances or to bias resistor inhomogeneities. Figure 27 shows the result of one scan performed on sensor 13. The obtained values of 0.8 M are in good agreement to the test structure observations reported in section 4 and meet our specification. If the polysilicon bias resistors would be measured for the readout strips a combination of the polysilicon resistor and implant resistance is probed. A value of 2.35 is found for the combination of implant and polysilicon resistance, which is somewhat higher but still consistent with our expectations and the measurements on the test structures. 29 Further measurements were carried out to estimate the interstrip resistance between two strips. Since the interstrip resistance is rather large, very small currents with large fluctuations and big uncertainties are measured. We can only reliably say that the interstrip resistance is of the order of several Gand hence well within our specifications. Polysilicon Resistor, Layer 1, Sensor 13 400 Number of strips 350 300 250 200 150 100 50 0 600 650 700 750 800 850 900 950 1000 1050 1100 More Rpoly (kOhm) Figure 27: Measurement of the polysilicon resistors for sensor 63 30 5.8. Interstrip Capacitance The interstrip capacitance was measured extensively on a few sensors. The results shown here are taken from the measurements on sensor 1. The measurements on the other sensors give consistent results. The procedure followed was already described in the section on the test structures. The setup with the equivalent circuit diagram is shown in figure 28. The two measurements made are the measurement of the total load capacitance, denoted by CL or C1, and the measurement of C2, which is the combination of the interstrip capacitance and the capacitance to the backplane. From the equivalent circuit diagram one finds that CL = C1 = 2 Ci + C b C2 = Ci + Cb . Here, Cb refers to the capacitance of the strip to the backplane and Ci is the interstrip capacitance. CL is to first order the total load capacitance on the readout chip. The capacitance of the probes and leads was measured to be on average about 1 pF. In case ‘corrected’ results are shown, the measured capacitance of the leads, dependent on frequency of course, was subtracted from the measurement. Note that in the extraction of Ci no correction is needed. probe 2 on AC pad (strip N+1) probe 1 Ext. LCRprobe 3 on adapter meter AC pad (strip N-1) Cintrstr Cs Cs Cs Test chuck Figure 28: Setup for interstrip capacitance measurements Figure 29 shows the dependence of C1 (the load capacitance) as function of frequency for the triplet of strips (193, 194, 195) on sensor 1. At a frequency of 1 MHz, the frequency of relevance for operation with the SVX4 readout chip, the total capacitance is about 1.1 pF/cm. 31 Total Load Capacitance, Sensor 1 10.00 Ch.193-194-195 CL (pF) 8.00 6.00 4.00 2.00 0.00 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 Frequency (Hz) Figure 29: Frequency dependence of Cl (see text for details) Figure 30 shows the frequency dependence of the total load capacitance, as shown in the previous figure, for the full range of bias voltages. An initial backside voltage of 5 Volts was applied; the voltage was then increased to 10 Volts and then incremented in steps of 10 to 130 Volts. The data in Figure 29 was taken at a backside bias voltage of 110 Volts, which corresponds to full depletion voltage plus 10%. Total Load Capacitance at various V bias 12 5v 10v 10 20v CL (pF) 30v 8 40v 50v 60v 6 70v 80v 4 90v 100v 2 110v 120v 0 100 130v 1000 10000 100000 1000000 Frequency (Hz) 32 Figure 30: Frequency dependence of Cl for various backside bias voltage settings Total Load Capacitance 5.00E+02 12 8.00E+02 1.00E+03 10 2.00E+03 5.00E+03 CL (pF) 8 8.00E+03 1.00E+04 6 2.00E+04 5.00E+04 4 8.00E+04 1.00E+05 2 2.00E+05 5.00E+05 0 8.00E+05 0 50 100 Vbias (V) 150 1.00E+06 Figure 31: Dependence of Cl on backside bias voltage for various frequencies. Figure 31 shows the dependence on the backside bias voltage for all frequencies. The dependence on the backside bias voltage decreases for increasing frequency. Moreover, there is a change in slope of the dependence on backside voltage at high frequency as was observed for the outer layer sensors. Using the measurement of C2 and C1 the interstrip capacitance can be determined, using the two equations given at the beginning of this section. Figure 32 shows the results for two strips as measured on sensor 1. The ‘wiggle’ in the capacitance, as was observed for the outer layers at around 100kHz, is not present. The value for the interstrip capacitance to a single neighbor is 3 pF or 0.39 pF/cm, which is well within our specification and also in perfect agreement with the measurement on the test structure shown in figure 15. 33 Ci (pF) Interstrip Capacitance 3.50 3.00 2.50 2.00 Ci-Ch193 Ci-Ch194 1.50 1.00 0.50 0.00 1.0E+02 1.0E+03 1.0E+04 1.0E+05 1.0E+06 Frequency (Hz) Figure 32: Interstrip capacitance as function of frequency for two strips of sensor 1. 5.9. Summary Table 2 gives a summary of the measurements. Strip numbers refer to strips that have been flagged as faulty by our testing procedures. For the layer 1 sensors two strips in addition to the strips identified by Hamamatsu have been found as defective, but we could not confirm these defects due to sensor damage. The column labeled HPK strip# indicates the strip number(s) identified by Hamamatsu as having a defect. The type of defect that was listed in table 4 and all defects identified by Hamamatsu were confirmed. Sensor 6 and 7 had pinholes in channels 267 and 320 respectively. The coupling capacitance for strips 47 and 48 of sensor 20 are lower by about 10-15% compared to the nominal value. Note also in table 2 that the KSU I-V measurements have been performed at a lower temperature, so that in general the recorded leakage currents are somewhat smaller than at FNAL. 34 6. Mechanical Characterization of the Sensors The layout of the sensor as specified in drawing number 3823.210-ME-399436, provides a scratch pad field containing 5x4=20 pads. The vendor was asked to provide in three sets of 4 scratch pads a unique serial number coding for the sensors, with the rightmost pad representing the LSB. The remaining pads would be used for QC pass/fail marks. As was the case for the outer layer sensors, Hamamatsu uses groups of four bits to represent decimal numbers in binary format, rather than a binary representation as we expected. All ten sensors from the September delivery were measured on an Optical Gage Products (OGP) coordinate measuring machine to verify the mechanical dimensions of the sensors. A reference system was established using the same convention as in the drawing with a corner fiducial defining the origin. The x-axis runs along the long side of the detector, parallel to the strip orientation; the y-axis is along the short axis, perpendicular to the strip orientation. The flatness of the sensors was measured by defining a grid of 11x11 points in x and y and measuring the z position of the top surface of the sensor. The OGP has an intrinsic z-resolution of a few m. Figure 33 shows the measurements for sensor 1. The sensor is warped along both the short and long axis. The difference between the minimum and maximum z-position on the sensor is then determined (see figure 34). The average of the ‘highest’ and ‘lowest’ point on a sensor is 45 m, with the highest difference of 48 m. Our specifications call for a sensor warp of less than 50 m, agreed to by Hamamatsu only on a best effort basis. Although it was on a best effort basis, all sensors meet the specification. The flatness data is analyzed further to see if there is a difference in sensor warp along either the x-, or y-axis. The sensor is divided into eleven slices along the x (y-) axis and the z-coordinate is plotted as function of the y- (x-) position along the sensor. The graphs in figure 35 show the measurements for sensor 7. The set of data points for each slice is fitted to a parabola, which fits the data points very well, and the coefficient of the quadratic term is extracted. The average values for the coefficient of the quadratic terms are -0.25 10-4 (mm-1) for the curvature along the x-axis, and -0.28 10-4 (mm-1) for the yaxis. The sensors have a slightly stronger warp along the short axis, perpendicular to the strips, than along the long axis. This is to be compared to the warp for the outer layer sensors for which the values are -0.22 10-4 (mm-1) and -0.28 10-4 (mm-1), respectively. In addition to the flatness measurements, a set of ten measurements each was taken along the two short edges of the sensor and a set of twenty measurements were taken for each of the long edges of the sensor. With this data four characteristics were verified: the sensor cut width and cut length, the accuracy of the cut edges, and the parallelism of the corresponding cut edges. In the determination of the cut width and length, the average position along the cut edge was used. 35 3 D G ra p h L 1 -0 1 s e n s o r 0 .04 0 .0 3 0 .02 0 .0 1 Z D ata 0 .0 0 1 00 80 -0 . 0 1 60 40 -0 . 0 2 -5 20 0 a -20 at -15 a ta Y D D -1 0 X 0 -25 -30 C o l 1 vs C o l 2 vs C o l 3 Figure 33: Flatness measurements for inner layer sensor 1. Units along all axes are mm. (Zmax-Zmin) distribution for 10 sensors Zmax ( m) 49 48 47 46 45 44 43 42 41 40 39 1 2 3 4 5 6 Sensor # 7 8 9 10 Figure 34: Maximum variance in z for a set of ten Hamamatsu inner layer sensors, plotted versus sensor serial identifier. 36 Figure 35: Sensor z-position as function of x and y for eleven slices in y and x, respectively. The maximum difference between two measurements along each of the four sides for the ten sensors measured is shown in figure 36. As was the case for the outer layer sensors, the cut edges are again extremely accurate. The absolute x or y positions of all edge measurements for the four edges for all ten sensors measured, are plotted in figure 37. There are 16 measurements for each of the two long edges, and 11 (12) measurements at the close (far) short edge of the sensor. Combining the measurements in x and y, gives an average cut width of the sensors of 24.312 mm and an average cut length of 79.404 mm, to be compared to the nominal values of 24.312 mm and 79.400 mm, respectively. The angle between the lines fitted to the cut edges averages 90.00 ± 0.004 degrees. All in all, the sensors are superior in all mechanical aspects, including the sensor warp. 37 Figure 36: Maximum difference between two measurements (in m) along each of the four sensor cut edges. Each graph corresponds to a different cut edge. 38 Figure 37: Absolute coordinates of x or y positions along the cut edges for ten sensors combined. Each graph corresponds to a different cut edge. 39 References [1] [2] [3] [4] [5] [6] [7] [8] DØ Run IIb Silicon Detector Technical Design Report, Chapter 3: Silicon Sensors Silicon Sensor Specifications for Layers 0 and 1, July 29 03. A. Bean et al., Studies of the Radiation Damage to Silicon Detectors for Use in the DØ Run IIb Experiment, DØ note 3958. A. Bean et al., Silicon Sensor Quality Assurance for the D0 RunIIb silicon detector: procedures and equipment, DØ note 4120. T. Bolton et al., Measurements on irradiated L1 sensor prototypes for the DØ Run IIb silicon detector project, to be submitted as DØ note. M. Demarteau et al., Characteristics of outer Layer Silicon Sensors for the Run IIb Silicon detector, to be submitted as DØ note. Readout of Run IIb Outer Layer Silicon Sensors for the Run IIb Silicon Detector, A. Nomerotski and E. von Toerne, in preparation K. Hara, Tsukuba University, private communication All documentation is available on: http://www.physik.unizh.ch/~lehnerf/dzero/prr/prr_l1.html 40