Download VI. Digital Electronics

VI. Digital Electronics
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Basic logic concepts
Logic states
Number codes
Gate s and truth tables
Discrete circuits for gates
Gate circuit example
Gate interchangeability
Different logic notations
TTL and CMOS
Three-state devices
Combinational/Sequential logic
Combinational functions available as ICs
ROM and programmable logic
Devices with memory. Flip-flops
Clocked flip-flops
Master-slave and edge-triggered flip-flops
1. Basic logic concepts
In digital electronics circuits deal with data made of 1's and 0's. It is used very often, among
others, in the following cases:
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When signals have naturally discrete form, like bits of data or pulses form a detector, etc.
When analogue signals were converted into digital form by means of A/D converter and
when in digital form are subjected to calculation and are being store in memory.
When transmission of analogue signal has to be performed without noises.
A video or audio signal, when transmitted in analogue form is subjected to noises, which can
not be removed. When the signal is converted to digital form and is transmitted in digital
form, after reconstruction, the final analogue form (D/A converter is needed) will not contain
those noises. How is that possible? To recognize properly digital signal one needs just to
distinguish between 0's (about 0 volt) and 1's (about 5 volts). The noise level within the
transmission channel in not so high that it would disturb proper recognition between 0 volts
an 5 volts. This technique is called PCM (Pulse Code Modulation).
It is particularly attractive in case of transcontinental telephone call. Also the sending back
information from space probes was done with PCM, compact discs CD's store a piece of
music in the form of a stereo pair of 16-bit numbers, etc. Applications of digital electronics
are becoming commonplace because of wide availability of microprocessors.
2. Logic states
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In digital electronics there are 2 states represented by 2 levels: HIGH and LOW. Those 2
states can represent any of a variety of "bits" (binary digits) of information, such as:
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one bit of a number,
whether a switch is opened or closed,
whether a signal is present or not,
whether or not some event has happened,
whether or not some action should be taken, etc.
Sometimes is said that H and L represent TRUE and FALSE states of Boolean logic. When
H represents T, we call it positive true signal, otherwise we call it negative true signal. In
Boolean logic we use also 1 and 0, which mean TRUE and FALSE respectively, therefor:
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H=1=T for positive true logic,
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H=1=F for negative true logic,
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L=0=F for positive true logic,

L=0=T for negative true logic.
The diagram from Fig.1 shows the ranges of voltages for 2 states (H and L) for the most
popular families of digital logic.
Fig.1. Ranges of voltages that correspond to logic states H and L. The range (upper part) of
output voltages which guarantee a logic L and H, it is typical L and H output voltage. Input
voltages (lower part) which are interpreted as L and H. Arrows show the typical threshold
voltage. The wider the gap on the input sides, the better the noise immunity.
This technique is noise proof. As long as noise does not change 1 to 0 (as long as "present"
and "not present" are distinguishable) this noise can be successfully eliminated at each stage
of transmission. Finally the "clean" 0 or 1 can be regained. The above feature is called noise
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immunity. It is described by the maximum noise level which added to logic level does not
cause error in the process of recognition. The noise immunity is different for different families
of digital logic.
3. Number codes
Every number has to be represented by means of 2 symbols only: 0 and 1. We call it the
binary or base-2 number system. Each 1 or 0 multiplies a successive power of 2. For
instance: 11012  1x23  1x22  0x21  1x20  1310 . We converted number from binary to decimal.
The individual 1s and 0s are called bits. The subscript tells what number system we are using.
To convert from decimal to binary we keep dividing the number by 2 and write down the
reminders. To convert 1310 to binary,
13/2=6 remainder 1
6/2=3 remainder 0
3/2=1 remainder 1
1/2=0 remainder 1
from which 1310=11012 The remainders, 0s and 1s, form binary representation of a number.
Note that the answer comes out in order LSB (Least Significant Bit) to MSB (Most
Significant Bit).
Binary number representation gives rather long series. Trying to avoid it, we use so-called
hexadecimal representation: each position represents successive power of 16. Each hex
symbol gives a value from 0 to 15 as follows:
0
1
2
3
4
5
6
7
8
9
A
B
C
D
E
F
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
First we put a number into binary system, then hex.
Example:
70710=
 powers 3, 2, 1, 0 of 2
2 1| 8
4 2
1 |8 4 2
1
1 0| 1
1 0
0 | 0 0 1 12 = 2C316
2+0=2|8+4+0+0=12=C|0+0+2+1=3
To write binary number into hexadecimal:
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Group it in 4 bits groups beginning with the LSB.
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Write the hexadecimal equivalent of each group.
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Another possibility is BCD – Binary Coded Decimal. It needs a 4-bit group for each digit:
102
13710=
101
|
100
| successive powers of 10
0011
|
0111
|BCD=1x102+3x101+7x100=100+30+7=137
|
0001 |
0+0+0+1=1| 0+0+2+1=3|0+4+3+1=7|
13710=
100010012=1x27+0x26+0x25+0x24+1x33+0x22+0x21+1x20=128+8+1=137
Notice: BCD (000100110111BCD) representation is different from binary (100010012)
representation.
Signed numbers (negative numbers)
A complement – what is needed to make sth complete, full, perfect. Complementary – made
complete.
Some numbers in calculation are negative. How to distinguish them? The simplest way is to
devote one bit (let us say the MSB) to the sign – the remaining bits represent magnitude of the
number. It is so called "sign magnitude representation". There are also another ways called
"offset binary" or "2's complement representation". The latter is widely used for computation.
In this system positive numbers are represented as simple unsigned binary. A negative
number is represented as the binary you add to a positive number of the same magnitude to
get zero. To form a negative number:
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Complement each of the bits of the positive number, i.e. write 1 for 0 and vice versa – this
is the 1's complement.
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Add 1 – this is the 2's complement.
In Fig.2 there are those 4-bit signed integers in 3 systems of representation.
Fig.2. 4-bit signed integers in 3 systems of representation.
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4. Gate s and truth tables
OR gate
Boolean symbol for OR: "A OR B" is written as "A+B". Fig.3 shows symbolic representation
and truth table.
Fig.3. OR gate
Fig.4. AND gate.
AND gate
Boolean symbol for AND: "A AND B" is written as "AB" (dot). Fig.4 shows symbolic
representation and truth table.
Inverter, NOT function
Boolean symbol for NOT: " NOT A" is written as " A " or "A' " or "–A" or "/A" or "A/" or
"A*" or "*A". Fig.5 shows symbolic representation and truth table.
Fig.5. Inverter, NOT function.
Fig.6. NAND and NOR.
NAND and NOR
NAND=NOT AND and NOR=NOT OR. Fig.6 shows symbolic representation and truth table.
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Exclusive-OR: XOR
Fig.7 shows symbolic representation and truth table. It is interesting although less
fundamental than AND and OR. The output is H when one (but not both) input is H. It
always has 2 inputs.
Fig.7. Exclusive-OR gate.
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Discrete circuits for gates
Ones upon a time the gates were built with discrete elements: resistors and transistors. In 60,s
the technique was very popular. This family of gates is called RTL (Resistor-TransistorLogic). Nowadays we use popular, inexpensive IC logic circuits. They achieve excellent
performance and very low price.
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Gate circuit example
How to perform the logic: sound the buzzer if either car door is open and the driver is seated?
The alarm should prevent driving with opened car door. The truth table:
Left door Right door Driver is seated
Q – output result
H
H
H
H
H
L
H
H
L
H
H
H
L
L
H
L
H
H
L
L
H
L
L
L
L
H
L
L
L
L
L
L
H – door is opened, H- driver is seated, H – alarm is on.
Alarm
Sounds
Sounds
Sounds
Does not
Does not
Does not
Does not
Does not
Two alternative circuits, which perform the above logic, are shown in Fig.8.
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Fig.8. The alarm sounds if car door is open and the driver is seated.
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Gate interchangeability
It is possible to form one kind of gate from another. An example is shown in Fig.9.
Fig.9. How to obtain AND gate having only NOT AND gates.
In general, multiply use of one kind of inverting gate (for instance NAND) is enough to
make any function. It is not true for noninverting gates since there is no way to make NOT
function.
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Different logic notations
Positive true logic – HIGH means TRUE.
Let us remind AND and OR gates and true tables:
H – true, AND gate
In 1
In 2
Out
0
0
0
0
1
0
1
0
0
1
1
1
H – true, OR gate
In1
In 2
Out
0
0
0
0
1
1
0
1
1
1
1
1
Out is TRUE only if In Out is TRUE only if In
1 and In 2 are TRUE
1 or In 2 are TRUE
AND gate performs AND logic. OR gate performs OR logic.
Negative true logic– LOW means TRUE.
Let us check the logic of AND and OR.
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L – true, AND gate
In 1
In 2 Out
0
0
0
0
1
0
1
0
0
1
1
1
L – true, OR gate
In1
In 2
Out
0
0
0
0
1
1
0
1
1
1
1
1
Out is TRUE only if In Out is TRUE only if In
1 or In 2 are TRUE
1 and In 2 are TRUE
AND gate performs OR logic. OR gate performs AND logic.
It might be very confusing and cause troubles unless you are not aware and careful. Just
remember that different logic notations are in use and they have to be defined at the
beginning. Negative true does not mean that the levels have negative polarity. That means that
the lower of two states (LOW) stands for TRUE.
5. TTL and CMOS
The TTL (Transistor-Transistor-Logic) and the CMOS (Complementary Metal-OxideSemiconductor) are the 2 most popular logic families in current use. At least 10 manufacturers
of ICs offer an enormous variety of functions in both families. These satisfy various needs,
with exceptions of some LSI (Large-Scale-Integration) which use CMOS or NMOS (nchannel MOS structure) and some ultra-high speed logic.
Fig.10. Common gates in the TTL and CMOS families.
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The symbols are in accordance with normal way of showing positive true logic. Although a
gate performs the same logic, it has different logic levels and different other characteristics
when belong to different families (see Fig.1). Be careful when mixing logic family types.
Let us compare family characteristics:
Parameter
Supply voltage
Input
TTL family
CMOS family
+5 volts
Range +2  +15 volts
To pull LOW at input we
No input current
must sink current. This is OK
when TTL wired together.
Output
Different output circuits – be careful when mixing families.
Speed
25MHz  100MHz
2MHz  100MHz
special application up to
100MHz
Power
Consume considerable
No quiescent current
(**)
quiescent current
Fanout(*)
10
10
(*) Number of inputs that can be driven by output of the gate.
(**) Being at rest; quiet; still; inactive.
Within a chosen family the output is designed in such a way that it is able to drive inputs of
other gate easily. We do not need to worry about currents or voltage levels as long as the
stated number of inputs, i.e. fanout, is not exceeded.
6. Three-state devices
The output of TTL or CMOS is held either H or L. Sometimes 2 states are not enough, not
sufficient. As an illustrative example let us consider a system in which different (let us say 5
of them) units have to exchange data, i.e. process them, memorize etc. It would not be
reasonable to wire (to connect) each device to the others with 16-wire cable what is necessary
for simultaneous sending and receiving 16-bit words. The alternative and reasonable solution
is to use data bus, a single set of 16 wires accessible to all devices, but:
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Only one device at a time may "talk" (assert data, assert–domagać się uznania, szacunku),
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All may "listen" (receive data).
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They have to have agreement who "talks".
Therefor we need a gate which output can be (additionally to L and H) "close=enable" or
"opened=disable". We need 3 states: open and H, L (when closed). Fig.11 shows an example.
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Fig.11. Conceptual diagram of three-state CMOS NAND gate.
The 3-state logic has not 3 different voltage levels. The third state is called enable (made able)
input. A device with 3-state output, when enabled behaves like ordinary gate: have H or L at
the output. The device, when disabled, is disconnected so another logic device can drive the
same line.
Open-collector logic is an alternative to 3-state logic.
7. Combinational/Sequential logic
Digital logic can be considered as combinational logic and sequential logic.
Combinational circuits - the output state depends only on the present input state.
Sequential circuits - the output state depends both: on the present input state and on
the previous states, on history. This kind of circuit requires additionally some form of
memory.
It is possible to design desired logic function and it is possible to choose the best solution
from among few alternatives. It requires adoption of De Morgan's theorem and the Karnaugh
maps. You would rather adopt specially designed ICs circuits.

Combinational functions available as ICs
In the real word the most frequently used complex functions (like multixlexers,
demultiplexers, decoders, etc.) are available as single MSI (Middle Scale Integration, up to
100 gates on 1 chip). Lots of them are combinational functions involving only gates.
An example is shown in Fig.12. It is a '151' digital multiplexer.
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Fig.12. 8-input multiplexer.
In general multiplexers are available with 2,4,8 and 16 inputs.
A binary address (A0, A1, A2) is used for selection one (out of 8 inputs D0, D1,...,D7) input
which will appear at the output. There is also a 'strobe'. It is another name for 'enable'. The
chip operates as follows:
 LOW  the input selected by ' address' appeares at the output Q
STROBE  
HIGH - the output Q  L (Q  H) and it does not depend on the input
Fig.13 shows what to do when we have more then 8 inputs, let us say 16 inputs, which we
have to multiplex.
Fig.13. Multiplexer expansion.
We just use 2 or more chips and connect them as it is shown in the figure. One of 16 inputs
(selected by means of binary address) appears at the output, which is made common for both
chips.
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Demultiplexer takes input and routes it to one of several possible outputs, according to an
input binary address. The other outputs are either held in the inactive state or open-circuited,
depending on the type of demultiplexer.
A decoder is similar, except that the address is the only input and it is decoded to 'assert'. The
actual state of address decides which of n possible outputs is asserted (dostąpiło uznania).
Fig.14 shows an example. This is the '138' 1-of-8 decoder. The output corresponding to (i.e.
addressed by) the 3-bit input data is LOW. All others are HIGH. This particular decoder has 3
ENABLE inputs all of which must be asserted (2 LOW, 1 HIGH); otherwise all outputs are
HIGH.
A)
B)
Fig.14. A) 1-of-8 decoder. B) Decoder expansion: 1-of-16 decoder.
Notice, that 3-bit address A2A1A0 allows pointing out 8 different output terminals: maximum
value is 1111x22+1x21+1x20=4+2+1=7 and minimum value is 0000x22+0x21+0x20=0.
8. ROM and programmable logic
There are ICs that let us program their internal connections. Once they become programmed,
they are strictly combinational.
A ROM is Read Only Memory which keeps (holds) a bit pattern for each individual address
applied to its input. Typically it has 4-bit or 8-bit parallel output. An example is shown in
Fig.15.
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Fig.15. 1kx8 ROM chip.
It gives 8-bit output for each of 1024 input states (addresses). This input states are specified
by 10-bit input address. ROMs are nonvolatile. This means that the stored information retains
for good in the form once programmed.
There are different ways of programming:
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At the time of manufacturing (ROM).
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By the user (PROM - Programmable ROM). Their inner structure consists of delicate
interconnections that can be destroyed (blow like a fuse –
bezpiecznik)
by applying address
and control signals. The remaining interconnections for final bit pattern.
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EPROMs (Erasable PROMs) store the bit pattern but it can be erased by exposing them to
intensive UV light for about 1 h.
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EEPROMs (Electrically EPROMs) behave like EPROMs but are programmed and erased
with electric signals and not with UV light.
ROMs find application in computers, microprocessors. They are for storing finished programs
and data.
Apart from ROMs we have another programmable logic: PALs (Programmable Arrays
Logic). They consist of many gates whose interconnections are programmable. It allows
obtaining desired logic function. The final logic function is not of any choice but we are
limited by the built in structure and the links.
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Very similar to the above PALs are PLAs (Programmable Logic Arrays). The latter are fully
programmable.
To use PALs or PLAs we need a programmer. It is a device, which closely cooperates with
computer and allows burning some connections and after that it allows verifying the final
result.
Described so far ROMs, PALs and PLAs are combinational circuits. They contain only gates,
no memory and the output depends only on actual input.
9. Devices with memory. Flip-flops
The basic flip-flop (pstryk-buch)is shown in Fig. 16.
Fig.16. Flip-flop (set-reset type).
It consists of 2 gates and has 2 inputs (A and B) and 2 outputs (X and Y). Principle of
operation:
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The outputs X and Y can not be both LOW and both HIGH.

The flip-flop has 2 output states:
Output state
X
Y
1
LOW
HIGH
2
HIGH
LOW

The actual state depends on the previous state. Therefor it has memory.

Single L pulse on the input A causes flip-flop goes into output state X=H and Y=L.

Single L pulse on the input B causes flip-flop goes into output state X=L and Y=H.
Let us assume that at the moment both the inputs are H. What state is the output? X=H and
Y=L or X=L and Y=H. It depends on the history. It depends on whether A or B had got L
pulse in the past. This flip-flop remembers. To write into the flip-flop memory we have to
bring one of the inputs for a moment into L state. To change the memory is enough to bring L
for the moment, into the second input. Those 2 inputs are called Set and Reset and after that
the flip-flop is called SR flip-flop.

Clocked flip-flops
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It is very popular flip-flop. It has, apart from inputs and outputs, a single clock input. The
circuit and the truth table are shown in Fig.17.
Fig.17. Clocked flip-flop.
Apart from ordinary flip-flop it has additionally 2 gates which are controlled by the clock
input. The output will change in response to the input, like it is for ordinary RS, but only if the
clock is H (during the clock is H). It is called a transparent latch (latch = a device for
closing a door, gate), because the output "sees through" to the input when the clock is H.

Master-slave and edge-triggered flip-flops
Master-slave (dwuzboczowe) and edge-triggered (wyzwalane zboczem) flip-flops are the most popular by
far. The principle of operation is illustrated in Fig.18.
Clock pulse
Rising edge
Falling edge
Fig.18. Master-slave flip-flop. At the moment when rising edge of pulse clock appears, the
data present on the input is being transformed and is directed to the output where it appears at
the moment when the falling edge of clock pulse appears.
The edge-triggered flip-flops are very similar to the above from the outside. Their inner
working differ in a way.
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