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Download LABORATORY 6 FREQUENCY RESPONSE OF A JFET AMPLIFIER
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LABORATORY 6 FREQUENCY RESPONSE OF A JFET AMPLIFIER OBJECTIVES 1. To determine quiescent point of a common source (CS) and common drain (CD) amplifiers and calculate the values of the resistors Rd and Rs. 2. To measure upper and lower cutoff frequencies of a CS and CD amplifiers. 3. To simulate amplifier frequency response measurements using MicroCap software. 4. To study the frequency response of the common source (CS) and common drain (CD) JFET transistor amplifiers in the frequency range of 50 Hz to 1 MHZ. INFORMATION In this lab, two JFET amplifier configurations will be investigated: the common source (CS) and common drain (CD) amplifiers. Both amplifiers use a self-biasing scheme and have a relatively linear output. 1 JFET Transistor Characteristics The JFET transistor is a three-terminal device. The terminals are labeled drain (D), source (S), and gate (G). For the N-channel JFET, which is what you will be using, the only significant current that flows in the device is the drain-to-source current ID (Gate current is zero). Basically you can think of a transistor as a valve (a switch), in other words it is either turned on or turned off. The drain current flows into the drain terminal and exits from the source terminal. The magnitude of ID is controlled by the voltage VGS applied between the gate and source terminals. For N-channel JFETs, Vp and VGS are always negative, i.e. the voltage at the gate is less than the voltage at the source terminal. For your reference, Vp is also referred to as VGS-off (in some books). 2. Common Source amplifier The Common Source Amplifier is one of the three basic FET transistor amplifier configurations. In comparison to the BJT common-emitter amplifier, the FET amplifier has much higher input impedance, but a lower voltage gain. The Junction Field Effect Transistor (JFET) offers very high input impedance along with very low noise figures. It is very suitable for extremely low-level audio applications as in audio preamplifiers. The JFET is more expensive than conventional bipolar transistors but offers superior overall performance. Unlike bipolar transistors, current can flow through the drain and source in any direction equally. Often the drain and source can be reversed in a circuit with almost no effect on circuit operation. The bias levels in amplifiers based on BJTs are often stabilized using the emitter degeneration technique; that is, a resistor is placed between the transistor’s emitter and ground. The resistor creates negative feedback, which forces the quiescent collector 6-1 current to remain at its design value regardless of changes in the transistor’s parameters (such as βF). A similar technique can be used to stabilize the biasing of FET amplifiers. Shown in Figure 6.1 is a common-source JFET amplifier in which a resistor RS has been added between the source and ground. In this circuit the gate has been connected to ground through the resistor RG; thus, the gate is held at ground potential (0 V). If the drain current ID begins to rise above its intended quiescent value, the voltage drop across RS will increase. Since the gate-source voltage VGS is the difference between the gate potential (fixed at 0 V) and the voltage across RS, a rise in the voltage across RS will cause VGS to drop, lowering ID back to its original value. The opposite chain of events occurs if ID begins to drop below its design value. It is a common practice in the design of circuits based on JFETs to tie the gate to ground potential via a large-valued resistor (typically around 1MΩ) as shown in Figure 6.1. V DD I D RD C2 47uF C1 J1 1uF RL RG Vin 3.9k 1M RS Cs 47uF . Vout . Figure 6.1. The common source amplifier 3. Common Source amplifier biasing Before starting the CS JFET amplifier biasing, you should obtain an input and output characteristics of your JFET transistor, using the PC Characteristic Curve Tracer and following the procedure, as described in details in the Pre-Lab section of this document. Figure 6.2 shows typical Input characteristics and Figure 6.3 shows the Output Characteristics of a JFET transistor. Using this characteristics diagrams you can set the quiescent operating point of the JFET transistor as follows: 1. For ID = ½ IDSS, find the value of VGS: • In our example IDSS = 4.8 mA and the DC operating point conditions (VD, VG and VGS) will be determined for ID = ½ IDSS = 2.4 mA. • From Figure 6.2, VGS = -0.8V and Vp = -2.4V; • Using the Output Characteristics diagram in Figure 6.3 determine the VDS value for ID = 2.4 mA and VGS = -0.8V. In our example, VDS = 6V. • Draw the theoretical load line of this amplifier, as it is shown in Figure 6.3. 6-2 IDSS ID Vp ` VGS Figure 6.2. Input characteristics of JFET IDSS ID Figure 6.3. Output characteristics of JFET 4. Common Drain amplifier The common drain FET amplifier is similar to the common collector configuration of the bipolar transistor. A general common drain JFET amplifier, self-biased, is shown in Figure 6.4. This configuration, which is sometimes known as a source follower, is characterized by a voltage gain of less than unity, and features a large current gain as a result of having a very large input impedance and a small output impedance. 6-3 I C1 V DD D J1 1uF RG 1M Vin Cs RS 47uF . R1 C2 47uF RL 3.9k Vout . Figure 6.4. a) The common drain amplifier b) 2N5457 package EQUIPMENT 1. 2. 3. 4. 5. 6. 7. 8. Digital multimeter (Fluke 8010A, BK PRECISION 2831B). Digital oscilloscope Tektronix TDS 210. Function Generator Wavetek FG3B. PROTO-BOARD PB-503 (breadboard). JFET 2N5457. Resistors 3.9 kΩ, 1ΜΩ. Resistors R1, RS and RD according prelab calculations. Capacitors 1 x 1µF, 2 x 47 µF. PRE-LABORATORY PREPARATION The lab preparation must be completed before coming to the lab. Show it to your TA for checking and grading (out of 15) at the beginning of the lab and get his/her signature. 1. Common Source amplifier 1.1. Use the JFET curve tracer in lab 3108 and follow the procedure explained in details in the Lab #9 of ECE240a course to obtain the input and output characteristics of the JFET 2N5457 from your lab parts kit. 1.2. For the circuit in Figure 6.1 calculate the values of RS and RD using the curve tracer plots. Assume that this circuit is biased for VDS=6V and ID=1/2 IDSS, with VDD=12V. 1.3. Calculate RS and RD resistors values. The bias design procedure for the amplifier shown in Figure6.1 differs somewhat from that for a general common-source amplifier. In the general case, the gate voltage VG can be controlled by the designer, but with this circuit the gate is tied to ground potential, which removes one degree of freedom in the design equations. First calculate the value of a RS, using Equation (6.1) VG = VGS + I D RS = 0 Equation (6.1) Then the value of the drain resistor is easily determined using Equation (6.2) 6-4 V DS = VDD − I D (RD + RS ) Equation (6.2) 1.4. Determine the small signal ac model at mid frequencies (1 kHz) for the 2N5457. Use the input and output characteristics and determine the ac small signal voltage gain using a graphical method. All the calculations must be shown. 1.5. Simulate the above circuit in MicroCap using standard resistors values. Note that 1M resistance should be entered as 1 Meg in MicroCap. You must show the values of the all the bias currents and voltages on your schematic printouts.* 1.6. Using the MicroCap AC analysis function obtain the gain and phase frequency response for this amplifier from 10Hz to 1MHz and find the 3dB point. Print the results and bring these plots with you to the lab session for comparing with the experimental data.** Bring the print-out of the DC quiescent point values and the Bode plots of the magnitude (in dB) and phase angle (in degrees) of the gain ratio to the lab. You should use the Bode plot printouts as the graphs on which to plot your experimental data. Attention: You must plot the Bode plots, i.e. the ratio of the output voltage over the input voltage, not the output voltage by setting the input voltage equal to 1.0∠0°! MicroCap simulations tips: • From MicroCap component library pick up a JFET 2N5545, which has a similar characteristics to the JFET 2N5457 you have in your parts kit. • * To provide a power supply to the circuit use the “Battery” source from the MicroCap library and set it to a 12V value. • *To obtain the values of the all the bias currents and voltages on your schematic choose the Probe AC mode from Analysis menu and click on Node Voltages and Currents icons on the toolbar. • **For a sine wave signal source (used for simulating the Vin), use a 1MHz Sinusoidal Source from the Micro–Cap library. Set the AC Amplitude to A= 0.1(V) in the model description area of the signal source. Note that A=0.1V corresponds to a magnitude of Vp-p=0.2V. • **To obtain the gain and phase frequency response plots for this circuit you must run “AC ANALYSIS”. To get best results for your plots set the AC Analysis Limits as follows: Frequency Range: 1E6,10 which corresponds to a frequency range from 10 Hz to 1MHz Plot parameters: P X-Expression Y-Expression X-Range Y-Range** Voltage Gain Phase 1 2 F F dB(V(3)/V(1))* 1e6,10,1k ph(V(3)/V(1))* 1e6,10,1k 20,10,1 -160,-190,5 Note: * V(1) and V(3) are the AC voltages at corresponding nodes(1) at the input and (3) at the output of the simulation circuit set up. In your particular case they could have different numeration. 2. Common Drain amplifier 1.1. For the circuit in Figure 6.4 calculate the values of R1 and RS. Bias this circuit for VDD=12V, VDS=6V and ID=1/2 IDSS using the curve tracer plots. 6-5 The procedure for calculation of R1 and RS values is very similar to that used for commonsource amplifier. The only unknown component values in this circuit are resistors R1 and RS. The following Equations (6.3) to (6.6) could be used for calculations: VS = VDD − VDS Equation (6.3) VG = VGS + VS Equation (6.4) VS −VG ID Equation (6.5) VS = I D (RS + R1 ) Equation (6.6) RS = 2.2. Determine the small signal ac model at mid frequencies (1 kHz) for the 2N5457. Use the input and output characteristics and determine the ac small signal voltage gain using a graphical method. All the calculations must be shown. 2.3. Simulate the above circuit in MicroCap using standard resistors values and attach the bias point results. For this you must show the values of the all the bias currents and voltages on your schematic.* 2.4. Using the MicroCap AC analysis function, obtain the gain and phase frequency response for this amplifier from 10Hz to 1MHz and find the 3dB point. Print the results and bring these plots with you to the lab session for comparing with the experimental results. Bring the print-out of the DC quiescent point values and the Bode plots of the magnitude (in dB) and phase angle (in degrees) of the gain ratio to the lab. You should use the Bode plot printouts as the graphs on which to plot your experimental data. Attention: You must plot the Bode plots, i.e. the ratio of the output voltage over the input voltage! MicroCap simulations tips: • For a sine wave signal source use a 1MHz Sinusoidal Source. Set the AC Amplitude to A= 1(V) in the model description area of the signal source. Note that A=1V corresponds to a magnitude of Vp-p=2V. • To get better results for your plots set the AC Analysis Limits as follows: Frequency Range: 1E6,10 which corresponds to a frequency range from 10 Hz to 1MHz Plot parameters: P X-Expression Y-Expression X-Range Y-Range** Voltage Gain Phase 1 2 F F dB(V(3)/V(1))* 1e6,10,1k ph(V(3)/V(1))* 1e6,10,1k -1.5,-2.5,0.2 10,-2,2 Note: *V(1) and V(2) are the AC voltages at corresponding nodes (1)- input and (2)output of the simulation circuit set up. In your particular case they could have different numeration. Note: For each simulation, print the Micro-Cap circuit set-up with node numbers and the supplementary text file with components description. This will help your TA to correct any mistakes in your simulations. Bring all required plots to your lab session and submit them to your TA. You will use these plots to draw practical results of your experiments during the lab session. 6-6 PROCEDURE 1. Common Source amplifier frequency response. 1.1. Build the circuit in Figure 6.5 using the components given in the pre-lab. Use standard parts when building the amplifier. Do not use multiple resistors to match the specified values. Also measure the actual value of the resistors using the multi-meter. CH1 CH2 PHASE METER RD V DD C1 RED CH1 1uF CH1 CH2 CH2 C2 47uF J1 RL FG BLACK Vin GND GND . RG 1M 3.9k Rs Cs Vout GND 47uF . GND OSCILLOSCOPE CH1 CH2 Figure 6.5. Common source amplifier circuit measurements 1.2. Initially apply only DC power to the circuit and measure the amplifier's Q point using the Digital multimeter (DC quiescent conditions). Make sure your circuit is biased correctly, your measurements should deviate no more than 15% from the calculated values for ID and VDS. If your values deviate more than the allowable, adjust the resistance values, and provide an explanation in your report. 1.3. Connect the Function Generator (FG) to supply the input ac signal to the CS amplifier circuit. 1.4. Connect CH1 of the Oscilloscope and CH1 of the Phase meter in parallel with the input of the CS amplifier to measure the parameters of the input signal Vin. Connect CH2 of the Oscilloscope and CH2 of the Phase meter in parallel with the load resistor RL to measure the parameters of the output signal Vout. 1.5. Set the input voltage level to Vin =100mV (RMS), as measured by the CH1 of the oscilloscope. Starting from 50 Hz, sweep the input frequency up to 1 MHz. 1.6. For each of the selected frequencies read the RMS voltage of the Vin (CH1) and Vout (CH2) from the oscilloscope display and record the data in Table 6.1. For the same frequencies record the Phase Meter readings (display will show the phase angle between these two signals in [deg]). 1.7. For each of the measurements calculate the voltage gain in (dB), using the Equation (6.7). AV (dB) = 20 log 6-7 Vout Vin Equation (6.7). Vin [V] f [Hz] 50 75 100 200 500 800 1k 2k 5k 10k 20 50k 100k 200k 500k 1M Θ[deg] Vout [V] Av[dB] Table 6.1. CS and CD amplifier frequency response 1.8. Plot the obtained data on top of your MicroCap simulations. Do they agree? If there is a difference, explain what could be the reason for it. 1.9. Increase the input signal level until output voltage clipping occurs. Record the maximum input and output levels of undistorted sine wave signal. 1.10. Note the phase shift between output and input. Is your amplifier inverting or noninverting? 2. Common Drain amplifier frequency response. 2.1. Build the circuit in Figure 6.6 using the components given in the pre-lab. Use standard parts when building the amplifier. Do not use multiple resistors to match the specified values. Also measure the actual value of the resistors using the multi-meter. CH1 CH2 PHASE METER RED CH1 CH1 C1 1uF FG BLACK V DD RG 1M Vin GND GND J1 Cs Rs 47uF CH2 CH2 . R1 C2 RL Vout 47uF 3.9k OSCILLOSCOPE . GND GND Figure 6.6. Common Drain amplifier circuit measurements 6-8 CH1 CH2 2.2. Initially apply only DC power to the circuit and measure the amplifier's Q point using the Digital multimeter (DC quiescent conditions). Make sure your circuit is biased correctly, your measurements should deviate no more than 15% from the calculated values for ID and VDS. If your values deviate more than the allowable, adjust the resistance values, and provide an explanation in your report. 2.3. Connect the Function Generator (FG) to supply the input ac signal to the CS amplifier circuit. 2.3. Connect CH1 of the Oscilloscope and CH1 of the Phase meter in parallel with the input of the CS amplifier to measure the parameters of the input signal Vin. Connect CH2 of the Oscilloscope and CH2 of the Phase meter in parallel with the load resistor RL to measure the parameters of the output signal Vout. 2.4. Set the input voltage level to Vin=1V (RMS), as measured by the CH1 of the oscilloscope. Starting from 50 Hz , sweep the input frequency up to 1 MHz. For each of the selected frequencies read the RMS voltage of the Vin (CH1) and Vout (CH2) from the oscilloscope display and record the data in Table 6.1. For the same frequencies record the Phase Meter readings (display will show the phase angle between these two signals in [deg]). For each of the measurements calculate the voltage gain in {dB), using the Equation (6.7). 2.5. Plot the obtained data on top of your MicroCap simulations. Do they agree? If there is a difference, explain what could be the reason for it. 2.6. Increase the input signal level until output voltage clipping occurs. Record the maximum input and output levels of undistorted sine wave signal. 2.7. Note the phase shift between output and input. Is your amplifier inverting or non-inverting? 2.8. Answer the following questions: • Do your experimental results agree with the MicroCap simulation? Comment on both the DC and the AC values. Explain any discrepancies. • Is your CD amplifier suitable for an audio amplifier? • What is a suitable application for the source follower? REPORT Your Lab report is due one week later. Please submit it to your TA in the beginning of your lab session. Note: You must copy/print the Signature and Marking Sheet from your manual before coming to the lab session. 6-9 SIGNATURE AND MARKING SHEET – LAB 6 To be completed by TA during your lab session Student Name:____________________ TA Name:___________________ Student # : _____________________ Check boxes Task Max. Marks Pre-lab completed 15 CS Amplifier completed 10 CD Amplifier completed 10 Overall Report Preparation 65 TOTAL MARKS 100 6-10 Granted TA Marks Signature