Download Exponential Carrier Wave Modulation

S-72.245 Transmission Methods in
Telecommunication Systems (4 cr)
Carrier Wave Modulation Systems
Phase-locked loops (PLLs)
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Phase-locked loop is a feedback arrangement capable to
synchronize itself to a noisy external reference
The output signals of the loop can be used to produce for
instance multitude of locked frequencies
PLL application areas include...
– modulators
– demodulators
– frequency synthesis
– multiplexers
– signal processors
Helsinki University of Technology,Communications Laboratory, Timo O. Korhonen
The PLL principle
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The PLL circuit consists of
– phase comparator (in the figure below the multiplier)
– lowpass filter
– feedback amplifier
– VCO (voltage controlled oscillator), whose output
frequency is linearly proportional to input amplitude
Principle: phase difference of Xc(t) and v(t) adjusts VCO
Phase comparator output is
comparable to phase difference of input signals
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Helsinki University of Technology,Communications Laboratory, Timo O. Korhonen
PLL phase comparator realizations
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Circuits: (a) analog and (b) digital phase comparator circuit
Note that for (a) output is proportional to
– input signal phase difference
– input signal amplitudes (unintended AM thus harmful)
In (b) AM effects are compensated and response is more linear
pulse ratio: 50/50
ideal
XOR-circuit
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sin(a  cos(  )  1 sin(   )  1 sin(   )
2
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Helsinki University of Technology,Communications Laboratory, Timo O. Korhonen
FM detection by PLL
time domain
sin  (t )   (t )   (t )  v (t )
 (t )  2 K  y(t )dt
phase domain
v t
v
dv (t )

 (t )  dt

t
v (t )    ( ) d


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frequency domain
t

v ( ) d  
Helsinki University of Technology,Communications Laboratory, Timo O. Korhonen

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V ( f )  1 V (0) ( f )
2
j 2 f
PLL FM-demodulator: the feedback analysis
Solve transfer function with feedback:
Y( f )
Y ( f )   X ( f )  H 2 ( f )Y ( f )  H1 ( f )
Y ( f )  H1 ( f ) H 2 ( f )Y ( f )  X ( f ) H1 ( f )
Y( f ) 
H1 ( f )
X(f )
1  H1 ( f ) H 2 ( f )
This is applied to the linearized PLL yielding relationship
between the input phase and output voltage:
Ka H ( f )
Y( f ) 
( f )
1  K a H ( f ) K v / jf
1 jfKH ( f )

( f )
K v jf  KH ( f )
(K  Ka Kv )
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Helsinki University of Technology,Communications Laboratory, Timo O. Korhonen
Applying the FM signal to
the linearized PLL model
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Remember the FM wave:
d (t ) / dt  2 f  x(t )
where the modulating signal is denoted by x(t). The input FM
phase to the system is thus
 (t )  2 f  x( )d 

t
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This is in frequency domain: ( f )  2 f  X ( f ) /( j  f )
assuming no DC component or V(0) = 0, or
 v ( ) d  
t
1
V ( f )  1 V (0) ( f )
2
j 2 f
0
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Helsinki University of Technology,Communications Laboratory, Timo O. Korhonen
Applying FM signal to the detector... (cont.)
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Thus the input is ( f )  f  X ( f ) /( jf ) and the output is
1 jfKH ( f )
f X ( f )
Y( f ) 
( f ) 
HL ( f )
K v jf  KH ( f )
Kv
where the loop equivalent transfer function is
Y(f)
HL ( f ) 
H( f )
H ( f )  j( f / K )
K  Ka Kv
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Assume that the first order LP function is used or
f
f
X(f )
W
1
Y( f )  
  X ( f ),  1
Kv 1  j( f / K ) Kv
K
1  j( f / K )
f
 y (t )   x(t )
Kv
Helsinki University of Technology,Communications Laboratory, Timo O. Korhonen
HL ( f ) 
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PLL based frequency synthesizer
Reference signal fin
is locked for instance
to the fundamental frequency
of a crystal oscillator
f in
Phase
detector
Divide by
10
By adjusting the
divider different
frequencies can be produced
whose phase is locked into fin
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Helsinki University of Technology,Communications Laboratory, Timo O. Korhonen
Filt.
VCO
f out  10 fin
Detecting DSB using PLL-principle
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An important application for PLLs is in synchronization of receiver
local oscillator in synchronous detection
In the Costas PLL (below) two phase discriminators are used to:
– cancel out DSB modulation x(t) in the driving signal
– synchronize the output frequency to the center frequency of the
DSB spectra (the suppressed carrier)
– to detect the DSB signal
Costas PLL detector
for DSB
PD: phase detector (=multiply+LPF)
Loop drives phase
error to zero
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LPF yields constant (zero)
output when loop is locked
to carrier
sin  ss cos  ss  1 sin 2 ss  sin 0   ss
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Helsinki University of Technology,Communications Laboratory, Timo O. Korhonen