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206 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 52, NO. 1, FEBRUARY 2005 An Improved Deadbeat Control for UPS Using Disturbance Observers Paolo Mattavelli, Member, IEEE Abstract—A digital control technique for the inverter stage of uninterruptible power supplies is proposed, which is based on a predictive regulator on both output voltage and inductor current. Its aim is to achieve a deadbeat dynamic response for the controlled variables (output voltage and inverter current). Besides the linear state feedback which allocates system poles at the origin so as to achieve deadbeat response for all state variables, the use of a disturbance observer for the estimation of the load current and of any other source of errors (such as dead-times, parameter, and model mismatches) is investigated. The proposed solution is able to guarantee a fast dynamic response and also a precise compensation of any source of unpredictable disturbance. Moreover, with a proper design of observer parameters, it is possible to reduce control sensitivity to model uncertainties, parameter mismatches, and noise on sensed variables, which usually characterizes existing deadbeat control techniques. Finally, the control algorithm is quite simple and requires only the measurements of the output voltage and inductor current. Experimental results on a single-phase 2 kVA prototype show the effectiveness of the proposed approach. Index Terms—Digital control, disturbance observer, uninterruptible power supplies (UPSs). I. INTRODUCTION T HE limitation of voltage distortion in ac power supplies (ACPS) or uninterruptible power supplies (UPS) feeding distorting loads is a challenging issue, which has stimulated the development of a variety of different control schemes [1]–[14]. In order to increase the voltage loop bandwidth, several highperformance feedback control schemes have been investigated, such as sliding mode control, optimal state feedback, repetitive-based control [5], deadbeat control [6]–[13], and many others. Deadbeat control is, indeed, one of the most attractive approach for discrete-time control since it is able to reduce the state variable errors to zero in a finite number of sampling steps, usually giving the fastest dynamic response for digital implementation. For this reason, a large number of techniques based on this methodology has been developed in the past [6]–[13]. The original deadbeat control on the output voltage [6], [7] and other similar solutions [9] developed in order to account for the computational delay are indeed able to achieve a very fast dynamic response on the output voltage at the rated load, but they have the drawback concerning the dynamics of the other state variables. Indeed, analysis of these approaches [12] reveals that, Manuscript received August 29, 2003; revised August 5, 2004. Abstract published on the Internet September 10, 2004. This paper was presented at the IEEE Power Electronics Specialists Conference (PESC’02), Cairns, Australia, June 23–27, 2002. The author is with the Department of Electrical, Mechanical and Management Engineering (DIEGM), University of Udine, 33100 Udine, Italy (e-mail: [email protected]). Digital Object Identifier 10.1109/TIE.2004.837912 even if one pole is located at the origin, there is another pole, with a magnitude slightly less than unity, which gives rise to a slow and oscillatory response. In order to overcome this limitation, deadbeat control on both output voltage and inductor (or capacitor) current has been proposed, either in multiloop configurations [8] or in a conventional linear state feedback [11], [12]. However, even the most recent deadbeat approaches reveal high sensitivity to model uncertainties, parameter mismatches, and noise on the sensed variables, especially for high sampling frequencies. Moreover, conventional deadbeat approaches strongly reduce their performance in presence of unpredicted sources of disturbance, such as dead-times, dc-link voltage fluctuations, and so on, since there is no inherent integral action in the control structure. This paper proposes a control scheme based on a deadbeat control method both on the output voltage and inductor current, where a state estimator is used for the compensation of the computational delay and a disturbance observer is used for the estimation of the load current and for any other source of errors (such as dead-times, parameter, and model mismatches). In the proposed solution, the measurement of the load current is avoided, while keeping a very fast dynamic response, and, unlike other existing deadbeat approaches, a precise compensation of any source of unpredictable disturbance is performed, ensuring a low total harmonic distortion (THD) on the output voltage in any load conditions. Moreover, by proper design of observer parameters, most of the existing drawbacks of deadbeat control, such as high sensitivity to model uncertainties, parameter mismatches, and noise on the sensed variables, can be minimized at the expense of a lower dynamic response. II. CONTROL METHOD A. System Modeling Let us consider the output stage of a single-phase UPS shown in Fig. 1. The second-order continuous time model of the output filter can be generally expressed in the following matrix form: (1) where erage inverter voltage, is the state vector, is output current, and is av- (2) Assuming that the inverter voltage and output current are constant between sampling instants (zero-order-hold 0278-0046/$20.00 © 2005 IEEE MATTAVELLI: IMPROVED DEADBEAT CONTROL FOR UPS USING DISTURBANCE OBSERVERS 207 known, the system dynamic equations can be written in incremental terms, i.e., (5) and . The discussion on how to obtain the reference variables , ) in this ideal case is reported in [11]. The ( linear state feedback where (6) which ensures a deadbeat response both for the output voltage and the inductor current, is obtained by allocating both eigenin the origin. Simple values (poles) of the matrix calculations show that coefficients and are given by (7) Since both poles of the closed-loop system are in the origin, the control on the two state variables is achieved in two sampling periods. Fig. 1. (a) Basic scheme of the proposed method. (b) Timing of the control law. sampling of the system), the discrete time dynamic equations can be written as (3) where (4.a) (4.b) (4.c) is the sampling peIn (4), is the 2 2 identity matrix, is the angular resonance frequency of riod, and the second-order - filter. The single-phase dynamic model (1)–(4) (as well as the control developed hereafter) is directly extendable to three-phase filters by means of the conventional three-wire balanced stationary frame ( ) transformation so that (1)–(4) can be seen as the system dynamic equations for both the and cofilters, each ordinates. In the case of three-phase four-wire phase can be treated separately and, of course, (1)–(4) are the dynamic equations of each independent phase. Thus, the discussed method is directly applicable to three-phase systems. C. Control Including the Computational Delay and the State Estimation The practical system is affected by an inherent delay due to the computational time, which means that the calculated inverter voltage during the sampling period can be applied to the actual system only the next sampling interval 1. From the modeling point of view, an additional dynamic equation representing the computational delay needs to be added to (3), i.e., , with being the calculated inverter voltage based on variables sensed at instant . Instead of including this additional dynamic equation into the system and solving the state feedback of the resulting third-order system, as proposed in [12], a state observer is used for predicting the state at sampling , as already proposed in [9]. In fact, taking into ac[or 1)] count that for the calculation of voltage 1 are available for control (see Fig. 1) and only samples at based on estimated evaluating the applied control voltage voltage and current at sampling instant , i.e., (8) is the estimated voltage and (where current at instant ), an alternative method to overcome the computational delay problem is used. Compared to [12], this approach gives a more intuitive insight on how to reduce the control sensitivity to model uncertainties, parameter mismatches, and noise on sensed variables, as described hereafter. The state estimation at instant ( 1) is obtained by means of a conventional Luenberger estimator B. Deadbeat Control on Output Voltage and Inductor Current [9] (9) Let us first consider the ideal case where the computation delay is neglected. Assuming that the reference trajectory is where is a 2 2 matrix designed by proper pole allocation. In the case of a deadbeat estimator, both the eigenvalues of the 208 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 52, NO. 1, FEBRUARY 2005 Fig. 2. (a) Deadbeat control with deadbeat state estimator. (b) Equivalent representation of deadbeat control with state estimator having two real poles in a . matrix are placed in the origin. In the case of load current measurement, the contribution of should be added in (9). In the case its contribution is neglected [as in (9)], the state estimation will be performed besides a constant term which will be compensated by a disturbance observer. Looking at (9), it is , which interesting to note that, in the particular case of is predicted using (3), the means that the state at instant solution proposed in [12] is obtained, which can be written as (10) where (11) and coefficients , , and are evaluated using (4), (7), and (11). Instead, in the general case, it is possible to properly design the pole locations of the estimator so as to optimize the robustness to noise and parameter uncertainties. Indeed, the practical implementation of any high-performance controller, such as the deadbeat one, requires some care in the conditioning of feedback control signals. Being an inherently wide-band controller, with a very quick speed of response, the controller is very sensitive to feedback noise and disturbances. In case the noise level cannot be reduced enough or the control bandwidth has to be lowered for any other reason, the proposed estimator (9) seems to be a very effective way to solve this problem. In fact, the proposed solution introduces a low-pass filter action on the sensed variables which can be tuned according to the noise level of the experimental setup. In order to show this property, let us assume are two real poles, both that the eigenvalues of the matrix equal to . In this particular example, it is easy to verify that the control law (10), also depicted in Fig. 2(a), can be rearranged separating the terms depending on the references values and the terms depending on the state variables, as shown in Fig. 2(b). In this framework, it is clear to see that the state observer, which is not deadbeat, introduces a low-pass filter action on the state vari, able calculations (besides the variation of the state feedback , and ), showing also that this provision is quite simple from the computational point of view. In any case, both (6)–(7) and (10) still require a proper calcu, ), which can be lation of reference variables ( easily obtained in the case of load current measurement [9]. D. Disturbance Observer In order to provide a precise voltage control, any disturbance in the system must be compensated. A disturbance observer provides the compensation, using the approach proposed in [4] for the current control. Under the assumption of using and not dependent on , the transfer function between the reference and the output voltage using the proposed deadbeat control is (12) This result in independent of the pole allocation of the state estimator. Thus, the proposed voltage control can be represented is assumed as the block diagram reported in Fig. 3(a), where ) containing to be the constant variable (i.e., all disturbances, such as the output current , inverter dead- MATTAVELLI: IMPROVED DEADBEAT CONTROL FOR UPS USING DISTURBANCE OBSERVERS Fig. 3. 209 (a) Equivalent block diagram of the voltage control. (b) Proposed control with deadbeat disturbance estimation (antiwindup algorithm is not shown). times, dc-link voltage fluctuations, etc.). With this assumption, the output voltage can be written as (13) Using an observer for the estimation of , the disturbance can compensated by a feedforward action, as shown in Fig. 3(b). The disturbance observer is derived by the plant state equations (14) where for disturbance timator: . The observer can be evaluated using the following es(15) where result obtained solving (15) for and is .The (16) where coefficients and determine the speed of response of the estimation. The final control law in the case of deadbeat estimation is reported in Fig. 3(a). Note that the control algorithm is quite simple, although low-pass filtering actions need to be added for estimators that are not deadbeat. III. STABILITY ANALYSIS In order to understand the sensibility of the proposed solution to parameter mismatches, a stability analysis is performed mapping the eigenvalues of the closed-loop system where the controller gains are evaluated based on the nominal value of filter ( , ), while the dynamic system (3) is evaluated with actual values ( , ). Main converter parameters are: Fig. 4. Real and imaginary part of the closed-loop poles using deadbeat state and disturbance estimator for variation of the actual output capacitance C from 0.5 to 6 C , with C being the nominal output filter capacitor. mH, F, kHz. As an example, Fig. 4 shows the real and imaginary part of the closed-loop poles using state and disturbance deadbeat estimator and for variation of the , showing that the actual output capacitance from 0.5 to 6 control algorithm becomes unstable. In order to increase the robustness of the proposed solution, the state estimator has been , designed with two real poles equal to 0.78 (i.e., equal to 150 s for which corresponds to a time constant ZOH sampling), while the disturbance estimator has been designed with a couple of complex poles with critical damping ) and angular frequency, which will be denoted later ( as , equal to 10 krad/s. Fig. 5 shows the results highlighting that the even small values of estimator time constants ensure stability and a reasonable distance from the unity circle. The value of estimator time constants may be further decreased depending on the noise level of the experimental setup. 210 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 52, NO. 1, FEBRUARY 2005 Fig. 7. Conventional multiloop PI control with triac load. (A) v : 100 V/div. (B) i : 10 A/div; time: 2 ms/div. Fig. 5. Real and imaginary part of the closed-loop poles using state and disturbance estimator for variation of the actual output capacitance C from 0.5 to 6 C , with C being the nominal output filter capacitor. Fig. 8. Proposed solution with diode rectifier load and = 0:1 ms, ! = 30 krad/s. (A) v : 100 V/div. (B) i : 5 A/div; time: 2 ms/div. Fig. 6. Proposed solution with triac load and = 0:1 ms, ! = 30 krad/s. (A) v : 100 V/div. (B) i : 10 A/div; time: 2 ms/div. IV. EXPERIMENTAL RESULTS The proposed controller has been tested on a single-phase laboratory prototype based on a full bridge inverter with the following parameters: switching frequency is 15 kHz (with 30 kHz mH, sampling frequency), dc-link voltage is 600 V, F, and nominal power is 2 kVA. The application is aimed to test power supplies for electromagnetic compatibility laboratories. It is worth noting that the output filter resonance frequency is around 1.2 kHz and the output capacitor is quite small (only 0.11 pu), making more challenging the implementation of a digital controller. The digital controller was first developed by means of a high-level and flexible board, which is based on an ADSP21062 floating-point digital signal processor by Analog Devices connected through a dual-port RAM to an ADMC401, a fixed-point processor, by the same manufacturer, giving the possibility of minimizing the development time. Then, the proposed solution has been directly implemented in the ADMC401, showing that the control is quite simple, since I have estimated an increase of control complexity of only about 50% compared to multiloop proportional–integral (PI) control. Fig. 6 shows the inverter behavior with a load composed by a triac and a resistive load (25 ). In order to highlight the control performance, the output voltage frequency has been set to 100 Hz. As far as the controller parameters are concerned, the pro( ms) posed solution has been tested with krad/s. Note the performance is very good, the load and transient is recovered in around 0.5 ms (but includes inverter saturation), and the output voltage THD has been reduced to 2.8%. In order to compare the performance of the proposed solution, I have implemented a conventional multiloop scheme where both the current and the voltage controllers are based on PI regulators. The bandwidth of the current loop was set to 25 krad/s, with a 70 phase margin, while the bandwidth of the voltage loop was set to 9 krad/s, with a 60 phase margin. Fig. 7 shows the results obtained with the same distorting load used for Fig. 6, highlighting the advantages of the proposed solution. The proposed controller has been then tested in the presence of a distorting load (diode bridge with capacitive filter: 470 F filter and 75 resistive load). Fig. 8 reports the results of the proposed solution showing that the output voltage waveform exhibits small deviations from the ideal sinusoidal waveform and the THD is limited to 4.1%. The performance of the conventional multiloop PI control with the same distorting load is MATTAVELLI: IMPROVED DEADBEAT CONTROL FOR UPS USING DISTURBANCE OBSERVERS Fig. 9. Conventional multiloop PI control with triac load with diode rectifier load and = 0:1 ms, ! = 30 krad/s. (A) v : 100 V/div. (B) i : 10 A/div; time: 2 ms/div. Fig. 10. Proposed solution with triac load and = 0:1 ms, ! (A) v : 100 V/div. (B) i : 10 A/div; time: 2 ms/div. = 30 krad/s. reported in Fig. 9. Since the closed-loop output impedance of the converter is somewhat higher with respect to the previous case, the voltage distortion induced by the distorting current is higher. This reduces the slope of the distorting current itself, whose peak is now lower and wider. As a result the THD of the output voltage is now 6.1%. In order to understand the effects parameters ( ) and , the controller behavior with the triac load has been reported in . In Figs. 10 and 11 highlighting internal controller variable ms and krad/s, the first case, I have set while in the second case, I have used a deadbeat estimation both for the state and disturbance observer, as reported in Fig. 3. As is much smoother, can be seen, the average inverter voltage while the speed of response of the controller does not change so much due to inverter saturation. It is worth underlining that the advantage of the detuning is a better tolerance of noise and disturbances on the feedback signals. In order to verify control robustness, the system has been tested with a capacitive load of 90 F, which is six times greater than the inverter output filter capacitor. The results, here not reported, are still very good and stability is ensured even with heavy capacitive loads. Finally, overcurrent protection capability is investigated. The proposed solution does not allow a direct implementation of the 211 Fig. 11. Proposed solution with triac load and deadbeat response for state and disturbance estimator, as shown in Fig. 3. (A) v : 100 V/div. (B) i : 10 A/div. (C) Internal control variable: inverter voltage v , time: 2 ms/div. Fig. 12. Example of current protection capability: proposed control with diode rectifier load and R = 20 . (A) v : 100 V/div. (B) i : 5 A/div; time: 2 ms/div). inverter current limitation, but a simple provision is proposed for such purpose. An internal current control with a proportional is implemented gain (17) is calculated from the where the ideal reference current (obtained previously by the procalculated average voltage posed control) solving (17) (18) , current protection capability is Limiting the value of provided, without affecting the original control under normal conditions. The effectiveness of this provision is reported in Fig. 12, where a limiting current value of 9 A has been set and a diode rectifier load with 25 resistive load has been used. V. CONCLUSION A digital control technique for voltage-source inverters with - output filter has been presented. It is based on deadbeat control on both output voltage and inductor current using a 212 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 52, NO. 1, FEBRUARY 2005 linear state feedback that allocates system poles in the origin. The compensation of the computational delay and of the load current has been achieved by means of a state observer and a disturbance observer, respectively. With a proper design of the control bandwidth, it is possible to minimize the control sensitivity to model uncertainties, parameter mismatches, and noise on sensed variables. Moreover, various details concerning the controller structure have been considered and analyzed. Finally, the system performance has been verified by experimental tests on a laboratory prototype, showing the effectiveness and advantages of the proposed solution. REFERENCES [1] Y. Dote and R. G. Hoft, Intelligent Control—Power Electronic Systems. Oxford, U.K.: Oxford Univ. Press, 1998. [2] M. J. Tyan, W. E. Brumsickle, and R. D. Lorenz, “Control topology options for single-phase UPS inverters,” IEEE Trans. Ind. Appl., vol. 33, no. 2, pp. 493–500, Mar./Apr. 1997. [3] U. B. Jensen, P. N. Enjeti, and F. Blaabjerg, “A new space vector based control method for UPS systems powering nonlinear and unbalanced loads,” in Proc. IEEE Applied Power Electronics Conf. (APEC’00), New Orleans, LA, Feb. 2000, pp. 895–901. [4] T. Ito and S. Kawauchi, “Microprocessor-based robust digital control for UPS with three-phase PWM inverter,” IEEE Trans. Power Electron., vol. 10, no. 2, pp. 196–203, Mar. 1995. [5] Y. Y. Tzou, R. S. Ou, S. L. Jung, and M. Y. Chang, “High-performance programmable AC power source with low harmonic distortion using DSP-based repetitive control technique,” IEEE Trans. Power Electron., vol. 12, no. 4, pp. 715–725, Jul. 1997. [6] T. Haneyoshi, A. Kawamura, and R. G. Hoft, “Waveform compensation of PWM inverter with cyclic fluctuating loads,” IEEE Trans. Ind. Appl., vol. 24, no. 4, pp. 582–589, Jul./Aug. 1988. [7] A. Kavamura, T. Haneyoshi, and R. G. Hoft, “Deadbeat controlled PWM inverter with parameter estimation using only voltage sensor,” IEEE Trans. Power Electron., vol. 3, no. 2, pp. 118–124, Apr. 1988. [8] T. Kawabata, T. Miyashita, and Y. Yamamoto, “Dead beat control of three phase PWM inverter,” IEEE Trans. Power Electron., vol. 5, no. 1, pp. 21–28, Jan. 1990. [9] T. Yokoyama and A. Kawamura, “Disturbance observer based fully digital controlled PWM inverter for CVCF operation,” IEEE Trans. Power Electron., vol. 9, no. 5, pp. 473–480, Sep. 1994. [10] J. S. Cho, S.-Y. Lee, H. S. Mok, and G. H. Choe, “Modified deadbeat digital controller for UPS with 3-phase PWM inverter,” in Conf. Rec. IEEE-IAS Annu. Meeting, Phoenix, AZ, Oct. 1999, pp. 2208–2215. [11] O. Kükrer, “Deadbeat control of a three-phase inverter with an output LC filter,” IEEE Trans. Power Electron., vol. 11, no. 1, pp. 16–23, Jan. 1996. [12] O. Kükrer and H. Komurcugil, “Deadbeat control method for singlephase UPS inverters with compensation of computational delay,” Proc. IEE—Elect. Power Applicat., vol. 146, no. 1, pp. 123–128, Jan. 1999. [13] P. Mattavelli, “Robust deadbeat control for UPS using state and disturbance observers,” in Proc. 9th Eur. Conf. Power Electronics and Applications (EPE 2001), Graz, Austria, Aug. 27–29, CD-ROM. [14] U. B. Jensen, F. Blaabjerg, and K. Pedersen, “A new control method for 400-Hz ground power units for airplanes,” IEEE Trans. Ind. Appl., vol. 36, no. 1, pp. 180–187, Jan./Feb. 2000. Paolo Mattavelli (S’93–A’96–M’00) received the Dr. degree with honors and the Ph.D. degree from the University of Padova, Italy, in 1992 and 1995, respectively, both in electrical engineering. From 1995 to 2001, he was a Researcher at the University of Padova. In 2001, he joined the Department of Electrical, Mechanical and Management Engineering (DIEGM), University of Udine, Udine, Italy, where he has been an Associate Professor of Electronics since 2002. He is also responsible for the Power Electronics Laboratory, which he founded in 2001. His major fields of interest include analysis, modeling, and control of power converters, digital control techniques for power electronic circuits, active power filters, and power quality issues. Dr. Mattavelli is a member of the IEEE Power Electronics, IEEE Industry Applications, and IEEE Industrial Electronics Societies, and the Italian Association of Electrical and Electronic Engineers (AEI). He currently serves as an Associate Editor for the IEEE TRANSACTIONS ON POWER ELECTRONICS and as a Member-at-Large of the IEEE Power Electronics Society AdCom.