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DOI 10.4010/2015.381 ISSN2321 3361 © 2015 IJESC Research Article June 2015 Issue High Switching Frequency for Sinusoidal Pulse Width Modulation Technique Shaik Suhail Ahamad 1 , V.Prataparao 2 Sri Sai Institute of Technology & Science, Rayachoty [email protected] m1 , [email protected] m2 Abstract: SPWM or sinusoidal pulse width tweak is generally utilized as a part of PE to digitize the power so an arrangement of voltage pulses can be produced by the on and off of the switches. The pulse width adjustment inverter has been the primary decision in power electronic for a considerable length of time, as a result of its circuit straightforwardness and rough control plan SPWM exchanging procedure is regularly utilized as a part of modern applications SPWM strategies are portrayed by consistent abundancy beats with distinctive obligation cycle for every period. The width of this pulse are regulated to get inverter yield voltage control and to decrease its consonant substance. Sinusoidal pulse width adjustment or SPWM is the for the most part utilized system as a part of engine control and inverter application. In this advancement a SPWM voltage regulation sort is chosen on the grounds that this system offers the benefit of successfully mu ltip lying the exchanging recurrence of the invert er voltage, subsequently making the yield channel littler, less expensive and simp ler to actualize. Tradit ionally, to produce this sign, triangle wave as a transporter sign is contrasted and the sinusoidal wave, whose recurrence is the fancied recurrence Index Terms: AC– DC power conversion, single-stage power factor correct ion (PFC), three-level converters, three-phase. I.INTRODUCTION Power gadgets contribute critical part of harmonics in all sort of utilizations, for example, power rectifiers, thyristor converters, and static var compensators (SVC). Indeed overhauled PWM procedures used to control advanced static converters, for examp le, machine drives, power component compensators then again dynamic power filters, don't create impeccable sinusoidal waveforms, which firmly rely on upon the semiconductors exchanging recurrence. Typically, with voltage or current converters, as they create discrete yield waveforms, compelling the utilizat ion of mach ines with exceptional seclusion, and in some applications substantial inductances associated in arrangement with the particular burden are needed. As it were, neither the voltage nor the present waveforms are not surprisingly. Likewise, it is surely understood that twisted voltages and current waveforms produce harmonic tainting, extra power misfortunes, and high recurrence clamor that can influence not just the load yet, additionally the related controllers. A ll these undesirable working qualities connected with PWM converters can be overcome with mu lti-level converters, with the expansion that higher voltage levels can be accomplished [1-5]. Mult i-level inverters can work with SPWM systems as well as with Space Vector Control (SVC), enhancing altogether the nature of the yield voltage waveform. With the utilization of sufficiency adjus tment, low recurrence voltage harmonics are consummately avoided, producing verging on flawless sinusoidal waveforms, with a lower THD. 1501 Another critical trademark is that every converter worked at a low switching frequency, dimin ishing the semiconductor stresses, and along these lines lessening the switching losses [6, 7]. II. MULTIL EV EL INVERT ER Multilevel inverters incorporate a variety of power semiconductors, capacitor voltage sources, the yield of which create voltages with ventured waveforms. The recompense of the switches allow the expansion of the capacitor voltages, which achieve high voltage at the yield, while the power semiconductors must withstand just dimin ished voltages. Fig.1 demonstrates a schematic graph of one stage leg of inverters with diverse quantities of levels, for which the activity of the power semiconductors is spoken to by a perfect switch with a few positions A twolevel inverter creates a yield voltage with two qualities (levels) concerning the negative terminal of the capacitor, while the three-level inverter creates three voltages, et cetera. The term mu ltilevel begins with the three-level inverter. By expanding the quantity of levels in the inverter, the yield voltages have more steps creating a staircase waveform, wh ich has a decreased harmonic bending. Be that as it may, a high number of levels builds the control unpredictability and presents voltage awkwardness issues. Three distinct topologies have been proposed for mu ltilevel inverters: d iode-cinched (unbiased clasped), capacitor-braced (flying capacitors) and fell mu lt i-cell with isolated dc sources. Also, a few balance and control http://ijesc.org/ techniques have been created or embraced for mu ltilevel inverters counting the accompanying: mult ilevel sinusoidal pulse width balance (PWM), mult ilevel specific harmonic elimination, also, space-vector balance (SVM) has been utilized as a part of three level inverters. Methods that work with low exchanging frequencies by and large perform maybe a couple reco mpenses of the force semiconductors amid one cycle of the yield voltages, producing a staircase waveform. Agents of this family are the multilevel particular consonant disposal and the spacevector control (SVC). Fig.1 One phase leg of an inverter with (a) two levels, (b) three levels, (c) n levels III. CONTROLLER DES IGN To control the flow of power in the converter, the switches interchange between two states. This happens quickly enough that the inductors and capacitors at the I/P & O/P hubs of the converter normal or filter the exchanged sign. The exchanged segment is constricted and the sought DC or low frequency AC segment is held. This procedure is called pulse Width Modulation (PWM), since the sought normal quality is controlled by adjusting the width of the pulses. Two necessities which all low heartbeat number PWM applicants ought to watch are synchronism with the key recurrence and quarter and half wave symmetry. Synchronism with the key recurrence means guaranteeing the exchanging recurrence fc is a nu mber d ifferent of the integrated central recurrence f1. That is, the beat number N = fc/ f1 must be a careful nu mber. The recurrence range of the PWM waveform will then comprise of discrete frequencies at products of the crucial recurrence nf1, here n is a whole number. Quarter and half wave symmetry guarantees that no even sounds will exist in the yield range. This can be accomplished by picking N odd. An essential even consonant which is wiped out is the DC part. No recurrence parts underneath the key recurrence (regularly alluded to as sub-sounds) will exist. This is essential since an undesired consonant part close to zero recurrence, regardless of the fact that little in abundancy, can bring about extensive streams to stream in inductive burdens. The balance techniques utilized as a part of mu ltilevel inverters can be ordered by recurrence. Systems that work with high exchanging frequencies have numerous substitutions for the force semiconductors in one time of the major yield voltage. An extremely pro minent system in modern applications is the fantastic transporter based sinusoidal PWM (SPWM) that uses the stage moving procedure to dimin ish the music in the heap voltage. Another fascinating option is the SVM procedure, wh ich 1502 Fig. 2 – Desired frequency is compared with a triangular waveform Fig. 3 (a) carrier arrangement, (b) output voltage IV. S IMULATION RES ULTS Simu lation is performed using MATLA B/SIM ULINK software. Simulin k liabrary files include inbuilt models of many electrical and electronics co mponents and devices such as diodes, MOSFETS, capacitors, inductors, motors, power supplies and so on. The circuit co mponents are connected as per design without error, parameters of all components are configured as per requirement and simu lation is performed. http://ijesc.org/ SIMULATION CIRCUIT CONTROLLER DES IGN SIMULATION PARAMETERS Reference signal, Vref= 4sin(wt) Switching frequency, fc=100KHz Output filters Lf=30mH Cf=150uF WAVEFORMS a) DC INPUT VLTAGE 1503 http://ijesc.org/ b) TRIGGERING PATTERN c) OUTPUT VOLTAGE OF INVERT ER d) LOAD VOLTAGE AND CURRENT AFTER FILTERING 1504 http://ijesc.org/ V.CONCLUS ION In this paper the single stage SPWM VS-inverter is composed and tried for fixed modulation index 0.6. It gives an alternate consequence of currents and voltages for diverse resistive burdens. It was found that it gives greatest proficiency for 80W load upto 89%.and recreate this model in MATLA B. Keeping in mind the end goal to achieve a vastly improved execution. REFERENCES [1] J. S. Lai and F. Z. Peng, “Multilevel Converter- A New Breed Po wer Converter,” IEEE IAS Annual Meeting Conf. Record, pp. 2348-2356, 1995 [2] Rodríguez, J., Lai J-S., Zheng Peng, F., “Multilevel Inverters: A Survey of Topologies, Controls,and Applications”, IEEE Transactions on Power Electronics, Vo l. 49, No.4, August 2002, pp.724-737. [3] M. Manjrekar and G. Venkataramanan, “Advanced topologies and modulation strategies for mu ltilevel inverters,” Conference Record of the IEEE-PESC, 1996, pp. 1013-1018. [4] Keith Co rzine, and Yakov Familiant, “A New Cascaded Multilevel H-Bridge Drive”, IEEE Transactions on Power Electronics, Vo l. 17 N°1, January 2002, pp.125-131. [5] Jose Rodriguez, Lu is Moran, Jorge Pontt, Pablo Correa and Cesar Silva, “A High Performance Vector Control of an 11-level Inverter”, IEEE Transactions on Industrial Electronics, Vo l. 50, N°1, February 2003, pp.80-85. [6] Dixon J., Moran, L., Breton, A., Rios, F., “Multilevel Inverter, Based on Multi-Stage Connection of ThreeLevel Converters, Scaled in Power of Three”, IEEE Industrial Electronics Conference, IECON'02, Sevilla, Spain, 5-8 Nov. 2002. [7] Dixon J., Ortuzar, M. Ríos, F., “Tract ion Drive System for Electric Veh icles, Using Multilevel Converters”, 19th Electric Vehicle Sy mposiu m, EVS-19, Busan, Korea 19- 23 Oct. 2002. [8] Nabae, I. Takahashi, and H. Akagi, “A new neutralpoint clamped PWM inverter,” IEEE Trans. Ind. Applicat., vol. IA-17, pp. 518– 523, Sept./Oct. 1981. [11] P. Hammond, “A new approach to enhance power quality for mediu m voltage ac drives,” IEEE Trans. Ind. Applicat., vol. 33, pp. 202–208, Jan./Feb. 1997. [12] E. Cengelci, S. U. Sulistijo, B. O. Woom, P. Enjet i, R. Teodorescu, and F. Blaabjerge, “A new med iu m voltage PWM inverter topology for adjustable speed drives,” in Conf. Rec. IEEE-IAS Annu. Meeting, St. Louis, M O, Oct. 1998, pp. 1416–1423. AUTHOR DETAILS AUTHOR 1: SHAIK SUHAIL A HAMAD currently pursuing M.TECH in POWER ELECTRONICS fro m SRI SAI INSTITUTE OF TECHNOLOGY AND SCIENCE Affiliated JNTU ANANTHAPUR (JNTUA).he has done his B.TECH degree fro m SRI SAI INSTITUTE OF TECHNOLOGY A ND SCIENCE affiliated to JNTUA in 2013 and his field of interest includes POWER ELECTRONICS AUTHOR 2: V.PRATAPA RAO has completed his B.Tech ELECTRICA L & ELECTRONICS ENGINEERING in 2003 fro m R.G.M COLLEGE OF ENGINEERING & TECHNOLOGY affiliated to JNTUH University M.TECH in POWER SYSTEM fro m A.I.T.S Rajampet affiliated to JNTUA University and presently he is interested to research topics includes POWER SYSTEM especially in ELECTRICA L DISTRIBUTION SYSTEM working as ASSISTA NT PROFESSOR and HOD of EEE Depart ment at SRI SAI INSTITUTE OF TECHNOLOGY A ND SCIENCE affiliated to JNTUA University, Rayachoty, Kadapa (DIST) ANDHRA PRADESH,INDIA. AUTHOR 3: A.MAHESH KUMA R REDDY has completed his B.E Electrical and Electronics Engineering fro m SAPTHA GIRI COLLEGE OF ENGINEERING affiliated to University of MADRAS. M .Tech in INSTRUM ENTATION A ND CONTROL SYSTEM fro m JNTU KAKINADA in 2008 Working as Assistant Professor in SRI SAI INSTITUTE OF TECHNOLOGY A ND SCIENCE affiliated to JNTUA University, Rayachoty, Kadapa(DIST) ANDHRA PRA DESH,INDIA. His area of interest include CONTROL SYSTEMS ,ADVA NCED CONTROL SYSTEM. [9] T. A. Meynard and H. Foch, “Multi-level choppers for high voltage applications,”Eur. Power Electron. Drives J., vol. 2, no. 1, p. 41, Mar.1992. [10] C. Hochgraf, R. Lasseter, D. Divan, and T. A. Lipo, “Co mparison of mu ltilevel inverters for static var compensation,” in Conf. Rec. IEEE-IAS Annu. Meeting, Oct. 1994, pp. 921– 928. 1505 http://ijesc.org/