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IRF820
Data Sheet
January 2002
2.5A, 500V, 3.000 Ohm, N-Channel Power
MOSFET
This N-Channel enhancement mode silicon gate power field
effect transistor is an advanced power MOSFET designed,
tested, and guaranteed to withstand a specified level of
energy in the breakdown avalanche mode of operation. All of
these power MOSFETs are designed for applications such
as switching regulators, switching convertors, motor drivers,
relay drivers, and drivers for high power bipolar switching
transistors requiring high speed and low gate drive power.
These types can be operated directly from integrated
circuits.
Formerly developmental type TA17405.
Ordering Information
PART NUMBER
IRF820
• 2.5A, 500V
• rDS(ON) = 3.000Ω
• Single Pulse Avalanche Energy Rated
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Symbol
PACKAGE
TO-220AB
Features
BRAND
D
IRF820
NOTE: When ordering, use the entire part number.
G
S
Packaging
JEDEC TO-220AB
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
©2002 Fairchild Semiconductor Corporation
IRF820 Rev. B
IRF820
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
TC = 100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Single Pulse Avalanche Energy Rating (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . EAS
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TJ, TSTG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
IRF820
500
500
2.5
1.6
8.0
±20
50
0.4
210
-55 to 150
UNITS
V
V
A
A
A
V
W
W/oC
mJ
oC
300
260
oC
oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. TJ = 25oC to 125oC.
Electrical Specifications
TC = 25oC, Unless Otherwise Specified
MIN
TYP
MAX
UNITS
Drain to Source Breakdown Voltage
PARAMETER
BVDSS
ID = 250µA, VGS = 0V (Figure 10)
500
-
-
V
Gate Threshold Voltage
VGS(TH)
VDS = VGS, ID = 250µA
2.0
-
4.0
V
-
-
25
µA
Zero Gate Voltage Drain Current
On-State Drain Current (Note 2)
Gate to Source Leakage Current
Drain to Source On Resistance (Note 2)
Forward Transconductance (Note 2)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Gate Charge
(Gate to Source + Gate to Drain)
Gate to Source Charge
SYMBOL
IDSS
ID(ON)
IGSS
rDS(ON)
gfs
td(ON)
tr
TEST CONDITIONS
VDS = Rated BVDSS, VGS = 0V
VDS = 0.8 x Rated BVDSS, VGS = 0V, TJ = 125oC
-
-
250
µA
VDS > ID(ON) x rDS(ON)MAX, VGS = 10V (Figure 7)
2.5
-
-
A
VGS = ±20V
-
-
±100
nA
ID = 1.4A, VGS = 10V (Figures 8, 9)
-
2.5
3.0
Ω
1.5
2.3
-
S
-
11
15
ns
-
11
18
ns
-
29
42
ns
VDS ≥ 10V, ID = 2.0A (Figure 12)
VDD = 250V, ID ≈ 2.5A, RGS = 18Ω, RL = 96Ω
MOSFET Switching Times are Essentially
Independent of Operating Temperature
td(OFF)
-
12
18
ns
VGS = 10V, ID = 2.5A, VDS = 0.8 x Rated BVDSS
Ig(REF) = 1.5mA
(Figure 14) Gate Charge is Essentially Independent
of Operating Temperature
-
12
19
nC
-
2.5
-
nC
-
6.0
-
nC
VDS = 25V, VGS = 0V, f = 1MHz (Figure 11)
-
360
-
pF
tf
Qg(TOT)
Qgs
Gate to Drain “Miller” Charge
Qgd
Input Capacitance
CISS
Output Capacitance
COSS
-
60
-
pF
Reverse Transfer Capacitance
CRSS
-
10
-
pF
-
3.5
-
nH
-
4.5
-
nH
-
7.5
-
nH
-
-
2.5
oC/W
-
-
80
oC/W
Internal Drain Inductance
LD
Measured From the
Contact Screw on Tab to
Center of Die
Measured From the Drain
Lead, 6mm (0.25in) From
Package to Center of Die
Internal Source Inductance
LS
Measured From the Source
Lead, 6mm (0.25in) from
Header to Source Bonding
Pad
Modified MOSFET
Symbol Showing the
Internal Device
Inductances
D
LD
G
LS
S
Thermal Resistance Junction to Case
RθJC
Thermal Resistance Junction to Ambient
RθJA
©2002 Fairchild Semiconductor Corporation
Free Air Operation
IRF820 Rev. B
IRF820
Source to Drain Diode Specifications
PARAMETER
SYMBOL
Continuous Source to Drain Current
ISD
Pulse Source to Drain Current
(Note 3)
ISDM
TEST CONDITIONS
Modified MOSFET Symbol
Showing the Integral
Reverse P-N Junction
Rectifier
D
MIN
TYP
MAX
UNITS
-
-
2.5
A
-
-
8.0
A
-
-
1.6
V
130
300
540
ns
0.57
1.4
2.3
µC
G
S
Source to Drain Diode Voltage (Note 2)
VSD
Reverse Recovery Time
trr
Reverse Recovery Charge
QRR
TJ = 25oC, ISD = 2.5A, VGS = 0V (Figure 13)
TJ = 25oC, ISD = 2.5A, dISD/dt = 100A/µs
TJ = 25oC, ISD = 2.5A, dISD/dt = 100A/µs
NOTES:
2. Pulse test: pulse width ≤ 300µs, duty cycle ≤≤ 2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
4. VDD = 50V, starting TJ = 25oC, L = 60mH, RG = 25Ω, peak IAS = 2.5A.
Typical Performance Curves
Unless Otherwise Specified
2.5
1.0
ID , DRAIN CURRENT (A)
POWER DISSIPATION MULTIPLIER
1.2
0.8
0.6
0.4
0.2
0
2.0
1.5
1.0
0.5
0
0
50
100
150
TC , CASE TEMPERATURE (oC)
25
75
50
150
125
100
TC , CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
ZθJC, TRANSIENT
THERMAL IMPEDANCE (oC/W)
10
1
0.5
0.2
0.1
PDM
0.05
0.1 0.02
0.01
t1
t2
NOTES:
DUTY FACTOR: D = t1/t2
PEAK TJ = PDM x ZθJC + TC
SINGLE PULSE
10-2
10-5
10-4
0.1
10-3
10-2
t1, RECTANGULAR PULSE DURATION (s)
1
10
FIGURE 3. MAXIMUM TRANSIENT THERMAL IMPEDANCE
©2002 Fairchild Semiconductor Corporation
IRF820 Rev. B
IRF820
Typical Performance Curves
Unless Otherwise Specified (Continued)
5
100
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VGS = 10V
OPERATION IN THIS AREA
IS LIMITED BY rDS(ON)
10
10µs
100µs
1
1ms
TC = 25oC
TJ = MAX RATED
SINGLE PULSE
0.1
VGS = 6.0V
3
VGS = 5.5V
2
VGS = 5.0V
1
10ms
0
103
0
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
VGS = 6.0V
3
VGS = 5.5V
2
VGS = 5.0V
VGS = 4.0V
TJ = 150oC
16
8
12
4
VDS, DRAIN TO SOURCE VOLTAGE (V)
20
10-2
0
3.0
NORMALIZED DRAIN TO SOURCE
ON RESISTANCE
rDS(ON), DRAIN TO SOURCE
ON RESISTANCE (Ω)
8
VGS = 10V
6
VGS = 20V
4
2
2.4
8
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
©2002 Fairchild Semiconductor Corporation
10
10
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VGS = 10V, ID = 2.5A
1.8
1.2
0.6
0
4
6
ID, DRAIN CURRENT (A)
2
4
6
8
VGS, GATE TO SOURCE VOLTAGE (V)
FIGURE 7. TRANSFER CHARACTERISTICS
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
2
TJ = 25oC
0.1
10
0
250
1
FIGURE 6. SATURATION CHARACTERISTICS
0
200
VGS = 4.5V
0
0
150
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
VDS ≥≥ 50V
VGS = 10V
4
1
100
FIGURE 5. OUTPUT CHARACTERISTICS
10
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
50
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
5
VGS = 4.0V
VGS = 4.5V
DC
10
102
VDS, DRAIN TO SOURCE VOLTAGE (V)
1
ID, DRAIN CURRENT (A)
ID, DRAIN CURRENT (A)
4
-40
0
40
80
120
160
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
IRF820 Rev. B
IRF820
Typical Performance Curves
Unless Otherwise Specified (Continued)
1000
1.25
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
800
COSS ≈ CDS + CGD
1.15
C, CAPACITANCE (nF)
NORMALIZED DRAIN TO SOURCE
BREAKDOWNVOLTAGE
ID = 250µA
1.05
0.95
600
CISS
400
COSS
0.85
200
CRSS
0.75
-40
0
40
80
120
0
160
1
10
VDS, DRAIN TO SOURCE VOLTAGE (V)
TJ , JUNCTION TEMPERATURE (oC)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
100
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
ISD, SOURCE TO DRAIN CURRENT (A)
gfs, TRANSCONDUCTANCE (S)
4.0
3.2
TJ = 25oC
2.4
TJ = 150oC
1.6
0.8
0
0.8
1.6
2.4
ID, DRAIN CURRENT (A)
3.2
4.0
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
VGS, GATE TO SOURCEVOLTAGE (V)
20
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
10
TJ = 25oC
TJ = 150oC
1
0.1
0
100
0
0.4
0.8
1.2
1.6
VSD, SOURCE TO DRAIN VOLTAGE (V)
2.0
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
ID = 2.5A
16
IRF820, IRF822
VDS = 400V
VDS = 250V
VDS = 100V
12
8
4
0
0
4
8
12
16
20
Qg , GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
©2002 Fairchild Semiconductor Corporation
IRF820 Rev. B
IRF820
Test Circuits and Waveforms
VDS
BVDSS
L
tP
VARY tP TO OBTAIN
+
RG
REQUIRED PEAK IAS
-
VGS
VDS
IAS
VDD
VDD
DUT
tP
0V
IAS
0
0.01Ω
tAV
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON
tOFF
td(ON)
td(OFF)
tf
tr
VDS
RL
90%
90%
+
RG
-
VDD
10%
10%
0
90%
DUT
VGS
VGS
0
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
VDS
(ISOLATED
SUPPLY)
CURRENT
REGULATOR
0.2µF
50%
PULSE WIDTH
10%
FIGURE 17. SWITCHING TIME TEST CIRCUIT
12V
BATTERY
50%
VDD
Qg(TOT)
SAME TYPE
AS DUT
50kΩ
Qgd
0.3µF
VGS
Qgs
D
VDS
DUT
G
0
Ig(REF)
S
0
IG CURRENT
SAMPLING
RESISTOR
VDS
ID CURRENT
SAMPLING
RESISTOR
FIGURE 19. GATE CHARGE TEST CIRCUIT
©2002 Fairchild Semiconductor Corporation
IG(REF)
0
FIGURE 20. GATE CHARGE WAVEFORMS
IRF820 Rev. B
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As used herein:
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systems which, (a) are intended for surgical implant into
support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose
be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance
support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be
effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification
Product Status
Definition
Advance Information
Formative or
In Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary
First Production
This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed
Full Production
This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. H4
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