Download Modeling of high current density trench gate MOSFET

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IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 47, NO. 12, DECEMBER 2000
Modeling of High Current Density Trench Gate
MOSFET
K. G. Pani Dharmawardana and Gehan A. J. Amaratunga, Member, IEEE
Abstract—This paper presents a semianalytical model devel) of trench gate MOSFETs. It
oped for the ON state (
incorporates a more realistic model for the inversion channel region, taking the effects of doping variation, transverse, and longitudinal electric fields including the surface scattering, into consideration. Accurate modeling of the inversion channel region is of paramount importance, especially in the case of low voltage power devices where the inversion channel resistance is a significant portion
of the overall resistance. The carrier velocity saturation at high longitudinal electric fields is also taken into account in the formulation
of the model. The proposed model is supported by both numerical
simulation results using MEDICI and experimental results, which
are in good agreement with the results of the model. This can be a
useful tool in the design of optimum devices.
Index Terms—Inversion channel, mobility, modeling, MOSFET,
trench gate.
I. INTRODUCTION
T
HE TRENCH GATE MOSFET (TMOSFET) is considered to be one of the most promising devices for power
switching at voltages up to 100 V [1]–[3]. The basic reason for
its attractiveness is that, in a multicell geometry, it allows for
maximization of the gate perimeter to cell area ratio by virtue of
having the inversion and accumulation channel regions placed at
right angles to the surface plane. Specific on resistances below
1 m cm for 50 V n-channel [4] and 30–40 V p-channel [5]
devices have been reported, and with the application of ULSI
technology to make submicrometer-wide trench gates, further
reductions in specific on resistances are expected.
In addition to the geometrical advantages of the TMOSFET
structure, there are device phenomena related effects which also
give it some advantages. These are mainly associated with the
lack of a “JFET” region. Traditionally in a DMOSFET the diffused p-body regions in the n-drift region, through which the
main channel current has to flow, has been viewed as giving
rise to depletion pinch off of this region as in a classical JFET.
Detailed studies however, show that at very high current densities the depletion region in the n-drift side of the p-body/n-drift
region junction can be retarded due to enhanced carrier flow
from accumulation channel formed in the gate-drain overlap region [6], [7]. In a TMOSFET this accumulation region is used
very effectively as it is placed within the n-drift region. The ul-
timate limit to the reduction of the specific on resistance of a
TMOSFET is not due to any pinch-off type saturation, but rather
velocity saturation of electrons in the n-drift region [8], [9]. Interestingly, it was noted by Darwish [6] in one of the original
analyses of DMOSFET operation that velocity saturation can
also be the limiting mechanism in the planar structure.
Analytical models for the power DMOSFET have been developed by several researchers [10], [11]. These models have
been adequate for modeling the larger cell geometry devices.
However, there has been no analytical treatment to date of the
ultrahigh current density TMOSFET where there are several
differences in the way in which current enters the drift region
from the inversion channel compared to the large cell geometry
DMOSFET. Of fundamental importance for both DMOSFET
and TMOSFET models is the accurate modeling of the inversion
channel voltage drop. This is a nontrivial task in power MOSFETs due to the fact that the inversion channel is formed in a
substrate (p-body) region in which the concentration is continuously varying, from a peak value at the source end to a minimum (equal to the drain concentration) at the drain end. We
have analyzed the channel region with a much more realistic
model and report here the success of the approach. It is also applicable to DMOSFETs and LDMOSFETs, where to date the
channel region has been approximated to be a constant electric
field region [10]. In addition, special attention is paid to the current transfer from the accumulation region into the n-drift region
in the TMOSFET. The model presented, and validated against
experimental devices can be a useful design aid to initial device
optimization and the determination of how different physical parameters interact to limit performance.
II. MODEL
A semianalytical model for the ON state of a typical trench
gate MOS (TMOS) transistor is derived using charge control
analysis of the channel and drain drift regions. The doping distribution and the dependence of low field mobility on doping
concentration, transverse and parallel field within the channel
region are taken into account in deriving this model.
The TMOS structure shown in Fig. 1 is used for the purpose
of modeling.
A. Channel Region
Manuscript received December 20, 1999; revised April 17, 2000. This work
was supported by Fuji Electric Research and Development Ltd, Japan. The review of this paper was arranged by Editor G. Baccarani.
The authors are with the Department of Engineering, University of Cambridge, Cambridge CB2 1PZ U.K. (e-mail: [email protected]).
Publisher Item Identifier S 0018-9383(00)10409-5.
Gradual channel approximation is assumed to be valid in
modeling the channel region so that the channel and depletion
layer widths are governed only by the perpendicular fields. The
doping profile of the channel region is taken to be a one sided
0018–9383/00$10.00 © 2000 IEEE
DHARMAWARDANA AND AMARATUNGA: TRENCH GATE MOSFET
Fig. 1.
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Structure of the trench MOS.
gaussian distribution with the peak at the source end of the
channel region and is given by
(1)
peak doping concentration in atoms/cm and
standard deviation of the doping distribution.
In order to take a proper account of the doping distribution in
the channel region, it is divided into a number of subregions of
equal length as shown in Fig. 2(a) and doping concentration in
each region is set to be constant as shown in Fig. 2(b).
The analysis is performed for a single subregion at a time and
extended for the entire channel region by matching of current
boundary conditions at each region boundary.
An incremental length along a sub region sustains a voltage
[see Fig. 2(c)] that can be expressed as a product of the
drop
and the incremental resistance
.
drain current
where
where
Fig. 2. (a) Subdivision of the channel region. (b) Doping profile. (c) Subregion
analysis.
fine the longitudinal field dependence of low field mobility, various empirical expressions for the electron drift velocity have
been proposed.
Equation (4) describes the piecewise-continuous electron velocity model which is used in [10], [11].
voltage drop across the element ;
drain current;
width of the device (in the direction);
electron mobility;
inversion layer charge densit.
for
for
Hence
(2)
where
subregion length and
Equations (5) and (6) show the famous Caughey–Thomas expression for electron velocity [12],
is given by
(3)
where
Flatband voltage
(4)
with
and
respectively.
(5)
oxide capacitance per unit area;
;
metal, semiconductor work function
potential difference;
Si/oxide interface charge;
The integration of (2) requires an expression for which is
dependent on longitudinal and transverse electric fields. To de-
(6)
Fig. 3 shows the velocity curves for these models. The saturation effect of the electron velocity is observed to be a built
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IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 47, NO. 12, DECEMBER 2000
Fig. 4. Variation of low field mobility with doping concentration.
Fig. 3.
Velocity curves for the three different models.
in feature in model (5). Further, the saturation electric field described by this model agrees well with the experimental satuV/cm [13].
ration electric field in Si which is around
Hence, model (5) is used here to obtain an expression for the
.
mobility given by
(7)
is the effective mobility.
where
The simplified Takagi mobility model [14], which is in good
agreement with the experimental results for surface scattering
effects, is used to account for the transverse field dependence of
the mobility.
is given
Electron mobility limited by phonon scattering,
by
Integration of (2) is performed taking a linear variation of the
voltage within the subregion thus giving a constant longitudinal
given by
and assuming an average
electric field
inside the inversion layer.
transverse electric field strength
The transverse electric field within the channel is calculated by
taking the depletion charge (relating only to the vertical doping
profile) and the inversion charge into account. At present, the
variation of the doping profile in the direction is not taken
into consideration. This has not been built into the calculation
due to the difficulty in obtaining experimental two-dimensional
(2-D) doping profiles. It can be easily included if such data is
available. For calculating conduction in the inversion channel,
which is the average of the perpendicular trapea quantity
is taken
zoidal electric field within the channel is defined.
to be constant in each of the subregions of the channel in the
direction, but changes from subregion to subregion. This gives
rise to a constant mobility within each subregion.
within a subregion is described by
Hence the drain current
(8)
and
K
where
Surface roughness limited mobility,
is given by
(9)
where
The effective mobility,
is obtained by Matthiessen’s rule,
(11)
(10)
is the doping concentration dependent low field mowhere
bility.
The combination of (7) and (10) describes a composite model
for mobility , which takes the effects of doping variation, longitudinal and transverse electric fields including surface scattering into account.
is obtained for each subregion by
The low field mobility
means of the graph shown in Fig. 4 [15] in order to account for
the doping concentration dependence of the low field mobility.
is given by equation (10) and the transverse electric
where
field averaged inside the inversion layer is
(12)
The derivation of (12) is given in the Appendix.
DHARMAWARDANA AND AMARATUNGA: TRENCH GATE MOSFET
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field is
becomes
, the current at the end of the th subregion
(15)
Fig. 5.
Current flow path.
The threshold voltage for the gate at which
source end is given by
at the
(13)
For a particular drain current, which should be continuous
throughout the channel, the voltage in each subregion can be
calculated sequentially starting from the first sub region at the
source end with a source voltage of 0 V. This is analogous to
having nMOSFETs in series where the nodal potentials need to
be calculated. The Newton–Raphson iterative method is used to
solve (11) in each subregion to get the nodal potentials in that
sub region. The Matlab software suite was used to perform all
the necessary computation.
B. Drift Region
The drift region is partitioned into two based on the current
flow path as shown in Fig. 5. In region 1 a portion of the current
is confined to the accumulation layer at the trench wall, whereas
in region 2 current flows throughout the total area.
The same model that was derived for the inversion channel
region is used for the current flow in region 1 with the inversion
layer charge density being replaced by the accumulation layer
charge density. However, a current decrease after each subregion
must be included in the model to take into account the continuous injection of accumulation channel charge into the drift region. The injection of accumulation charge into the drift region
in TMOS devices has been studied in detail by Evans and Amaratunga [9]. Variation in channel current in each accumulation
sub region is calculated in the following manner.
being replaced by the accumulation charge
Using (2) with
, with
we obtain
density
The surface potential in the accumulation layer,
and
is given by (10).
Voltage in each subregion is calculated sequentially using
equations (14) and (15) assuming no accumulation injection
and
voltage in the
from the first subregion
last subregion in the inversion channel.
Current is assumed to be uniformly distributed throughout
) in Fig. 5.
the total available area in region 2 which is (
Therefore, in the drift layer below the trench bottom, the voltage
varies only in the vertical ( ) direction and is constant in the
in this region.
lateral ( ) direction. Hence,
Equation (18), a combination of (16) and (17), is solved numerically using second/third-order Runge–Kutta method to obtain the voltage in region 2 in Fig. 5.
(16)
and
where the cross sectional area,
by equations (7) and (10) with the assumption that
region 2.
is given
in
(17)
(18)
can be
Therefore, for a given current , drain voltage
calculated using the channel and drift region analysis and is
given by
(19)
where
channel voltage drop;
voltage drop in region 1;
voltage drop in region 2.
by only
It should be noted that it is adequate to obtain
considering the accumulation channel voltage drop because the
accumulation channel region is in effect a parallel path to that
in which carriers injected from the accumulation channel region
flow in region 1.
(14)
III. RESULTS AND DISCUSSION
Using the fact that the accumulation charge at the end of the th
and the electric
subregion is
The semianalytical model was evaluated first by comparing
the results predicted with those obtained from direct numerical
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Fig. 6.
IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 47, NO. 12, DECEMBER 2000
I–V characteristic at V
= 10 V.
Fig. 7. Electron velocity in the channel region at V
simulation of the semiconductor equations using the MEDICI
program and secondly by comparing with experimental results.
Both semianalytical and numerical simulation was performed
for a TMOS having the following channel region parameters.
atoms/cm
0.3 m where the doping profile is given
by equation (1).
F/cm
Oxide layer
1000 Å giving
thickness
C/cm
1
m and 25 subregions giving
m in the inversion channel
region.
The trench depth in the drift region was taken as 1.7 m and
the accumulation region was divided into 25 subregions. For
is
the above mentioned parameter values, threshold voltage
approximately 4 V.
The other parameter values of this device are
atoms/cm ,
m,
m and
m (See
Fig. 5 for definition of parameters). The nominal off-state break
down voltage for the trial device is 400 V.
Fig. 6 shows the current–voltage (I–V) characteristic for this
device obtained using the proposed model.
The physics based device simulator, MEDICI which uses a
numerical method to solve the basic semiconductor equations
(20) and (21) was used to obtain the “correct” TMOSFET characteristics for comparison with the semianalytical model.
(20)
(21)
In MEDICI simulations, the p-body concentration was made
very close to that in the semianalytical model, Fig. 2(b) and the
other structure parameters were kept the same as for the model.
The Lombardi mobility model was used in place of the Takagi
model with adjusted parameter values so that it becomes closely
equivalent to the Takagi model.
In Fig. 6, I–V characteristics obtained from modeling and
MEDICI numerical simulation are compared. The agreement
= 50 V.
Fig. 8. I versus V
at V = 5, 7:5 and 10 V (Dashed lines show the
curves obtained using the model in [10], [11]).
over a large range of
values is very good. This agreement
between the model and the numerical simulation is remarkably
good in the linear region. We believe that this is because of the
accurate semianalytical model that we have developed for the inversion channel region taking into account the doping variation
in the p-body and a detailed mobility model. The deviation from
the numerically simulated curve is most noticeable in the quasisaturation region where velocity saturation of carriers commences in the n-drift region of the device [6]. The assumption
regarding the current path in the model is perhaps most inaccurate in this regime of operation. Nevertheless, the model only
gives a 5% error even in this regime where velocity saturation
of carriers in the drift region prevails.
value of 50 V considered, the channel
At the maximum
cm/s in the
velocity is seen to have a maximum value of
velocity plot in Fig. 7. This is well below the saturation velocity
cm/s). Therefore the saturation of electrons in
of electrons (
the n-drift region is the main cause for current saturation in the
trench gate MOSFET as previously proposed [9]. This is further
DHARMAWARDANA AND AMARATUNGA: TRENCH GATE MOSFET
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(a)
(a)
(b)
Fig. 9. (a) Channel voltage versus distance (b) electric field magnitude
distribution at V
10 V and I
0.06 mA/m.
=
=
confirmed by the fact that the saturation velocity for electrons
value of the
in the channel region is only reached when the
TMOSFET has a much higher value of 190 V.
For the 400 V trial device, the specific on resistance at
V in the linear region is 30 m cm whereas a classical DMOS
would have a specific on resistance of about 70 m cm . This
confirms the significant reduction in on-state loss which can be
obtained from the TMOS structure even for devices rated at high
voltage.
Fig. 8 shows the calculated drain current ( )–channel
) characteristic using the proposed model and
voltage (
the same characteristic obtained using the DMOSFET channel
models used previously [10], [11], which do not take the effects
of doping distribution, concentration dependence of the low
field mobility, and scattering effects on the voltage variation
along the channel into account.
Comparison of the results of both models in Fig. 8 shows that
value is significantly reduced
the channel current at a given
(b)
Fig. 10. (a) Electric field magnitude variation. (b) Carrier velocity plot in the
inversion channel region at V
10 V. (i) I
0:04 mA/m, (ii) I = 0:06
mA/m, (iii) I = 0:08 mA/m, (iv) I = 0:10 mA/m.
=
=
by the use of more accurate channel mobility model. This is because of the degradation of electron mobility due to the longitudinal and transverse electric fields, with the major contribution
being from the transverse field. This is discussed below with respect to Fig. 11.
Fig. 9(a) is a plot of the channel voltage from the source end
(0 m) to the drift layer (1 m) and Fig. 9(b) shows the corresponding electric field magnitude distribution for a drain current
of 0.06 mA/ m. It is apparent that for this drain current, electric
field gradually decreases with a maximum near the source end
of the channel.
In Fig. 10, we present electric field and carrier velocity plots
through the inversion channel for a series of drain currents (drain
voltages). It is interesting to note that the maximum electric
field position in the channel moves from the source end to the
. This is a conmiddle of the channel with increasing
sequence of the varying p-body doping concentration leading
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IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 47, NO. 12, DECEMBER 2000
(a)
Fig. 12.
(b)
Fig. 11. (a) Electric field magnitude distribution in the inversion channel
region at V
10 V and I
0:1 mA/m. (b) I–V characteristics for the
inversion channel region at V = 10 V (i) not considering the effects of
both doping variation and gate electric field on mobility, (ii) considering only
the effect of doping variation on mobility, (iii) considering only the effect of
gate electric field on mobility, and (iv) considering the effect of both doping
variation and gate electric field on mobility.
=
=
to the initial high field region occurring close to the source at
values. As
increases, voltage along the channel
low
becomes more comparable with the gate voltage and voltage increase and the doping variation along the channel have opposite
effects on the inversion layer charge. This leads to a maximum
electric field point at the middle of the inversion channel region. Fig. 11(a) shows the relative impact of the different mobility models on the channel electric field distribution. The more
complete mobility model leads to a shift in the maximum electric field position away from the source end into the middle of
the channel region. The effect of the doping profile and the gate
electric field is therefore to shift the point of maximum electric
field in the channel away from the source end. Fig. 11(b) shows
the channel I–V characteristics for the inversion channel region
with and without the effects of doping variation and gate electric field on mobility being considered. It can be clearly seen
that the doping variation and gate electric field, with the latter
Impact of number of subregions.
playsing the major role, causes a reduction in the value of
at
.
higher values of
The impact of the subdivision of the channel region into discrete elements with constant electric field was also evaluated.
values for a
of 0.1 mA/ m for a
Fig. 12 is a plot of
series of values. It is evident that the results converge to almost identical values when the number of subregions is greater
than 25. Hence, division of the channel region into 25 subregions gives an acceptable accuracy for this model with parameters used for gate oxide thickness, channel doping and length.
Fig. 13 shows the current flow lines in the device to a depth
values obtained from MEDICI.
of 3.2 m for two different
It should be pointed out that the current flow assumed in region 1 for the model, Fig. 5, is similar to the one produced by
MEDICI. In Fig. 13, the separation between each current flow
contour represents 2% of the total current. It is interesting to note
that approximately 2% of the drain current ( ) in the trench
MOSFET at the bias points shown, is a punch through current
through the depletion region under the MOS inversion channel.
The broken contour represents the edge of the depletion region
in the n-drift region. The carrier concentration due to the current
in the depletion region in the n-drift region at the p-body/n-drift
junction close to the trench gate is higher than the depletion car. This in turn leads to the
rier concentration, i.e.
“drowning” out of the n-drift depletion region and the consequent onset of quasi saturation. The junction however stays reverse biased with the built in potential being maintained by the
growth of the depletion region on the p-body side of the junction.
A TMOSFET rated at a lower break down voltage of 100 V
was also studied. The differences in the 100 V device structure
atoms/cm
are that drift region doping is increased to
and length
reduced to 7.2 m. The p-body region was
adjusted to have the same peak doping concentration (
atoms/cm ) at the source end and the channel length (1 m)
as for the 400 V device. The trench depth and width were
characteristics
3 m and 0.5 m. The predicted
values obtained from the
for the 100 V device for three
model and MEDICI are shown in Fig. 14. Again the agreement
DHARMAWARDANA AND AMARATUNGA: TRENCH GATE MOSFET
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Fig. 14.
I–V characteristics of the 100 V device at V
Fig. 15.
Experimental and modeled results for a 60 V device.
= 5 V, 10 V, and 15 V.
(a)
(b)
=
Current flow lines in a portion of the device at (a) V
10 V,
= 10 V, V
= 10 V (the broken lines show the edges
of the depletion regions).
Fig. 13.
V
= 1 V (b) V
between the numerical simulation and the model is excellent.
The fact that the quasisaturation, as opposed saturation in the
channel region, is the main phenomenon responsible for current
saturation in TMOSFETs leads to almost identical
characteristic curves for
values of 10 V and 15 V.
The experimental results for a 60 V TMOSFET were also
compared with the results predicted by the model. The model
was modified to read the experimental doping profile instead
of the Gaussian profile given in 1. This device has an oxide
thickness of 500 Å, a channel length of 1.4 m, and the trench
depth in the drift region is 0.6 m. The other parameter values
atoms/cm ,
m,
for this device are
m and
m (see Fig. 5 for definition of
parameters). The interface charge,
at the Si/Oxide interface
C/cm to obtain the experimental
was taken to be
threshold voltage which is 1.5 V. The resistance of the 0.007
cm, 300 m substrate was also included in the model. The
predicted results from the model are in excellent agreement with
the experimental results. The value of the parameter in the
Caughey–Thomas expression for electron velocity was taken as
1.9. An value of 1.9, as opposed to 2, in (5) was also found to
be appropriate for modeling power MOSFETs in previous work
[13]. All other parameters were as specified previously. Fig. 15
shows the experimental results and the results predicted by the
model. The model is capable of reproducing the experimental
results extremely well.
IV. CONCLUSION
A compact semianalytical model for a trench gate MOSFET
that is useful in the design of optimum high current density devices is presented here. The formulation is based on the regional
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IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 47, NO. 12, DECEMBER 2000
analysis of carrier transport in channel and drift regions. The effects of doping concentration, and transverse and longitudinal
electric fields on electron mobility are taken into account. This
model also considers the effect of carrier velocity saturation at
high longitudinal electric fields. The channel region modeling
methodology is also applicable to conventional VDMOS and
LDMOS transistors. The methodology can also be used in circuit simulation where a subcircuit model for a power TMOSFET
can be defined in terms of a number of series connected low
voltage MOSFETs. A key feature of the model is the accurate
incorporation of the voltage drop in the accumulation channel
region as it loses current into the n region.
Results of the proposed model are in good agreement with the
MEDICI simulation results. The current voltage characteristic
is accurate to the extent of greater than 95.5% with the least
50 V for the 400 V device. This can
accuracy of 95.5% at
be clearly seen in Fig. 6. The agreement is very good for a series
of Gate voltages for the 100 V device as well. The predicted
IV characteristics of the model are in excellent agreement with
experimental results for a 60 V device as shown in Fig. 15.
APPENDIX
DERIVATION OF AVERAGE PERPENDICULAR ELECTRIC FIELD
INSIDE THE INVERSION LAYER
The electric field at the surface can be related to the total
charge per unit area using Gauss’ Law of electrostatics.
(A1)
and
are the depletion and inversion charge per
where
unit area, respectively.
The electric field just below the inversion layer can be determined by assuming a very thin inversion layer so that the total
.
charge per unit area below the inversion layer is
(A2)
Thus the average electric field inside the inversion layer is
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[11] Y.-S. Kim, J. G. Fossum, and R. K. Williams, “New physical insights
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[12] D. M. Caughey and R. E. Thomas, “Carrier mobilities in silicon empirically related to doping and field,” Proc. IEEE, pp. 2192–2193, Dec.
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[13] D. A. Grant and J. Gowar, Power MOSFETs: Theory and Applications:
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K. G. Pani Dharmawardana was born in Colombo,
Sri Lanka, in 1966. He received the B.Sc. degree in
electronic and telecommunication engineering (first
class honor) from the University of Moratuwa, Sri
Lanka. He is currently pursuing the Ph.D degree in
the area of high performance power MOSFETs at
Cambridge University, U.K.
He was with the academic staff of the Department
of Electronic and Telecommunication Engineering,
University of Moratuwa. His research interests
include low power and high power semiconductor
devices, optical communication and electromagnetic waves.
(A3)
where
and
ACKNOWLEDGMENT
The authors are grateful to R. Grover and R. Hyndman of
Philips Semiconductors, Stockport, U.K., for providing experimental data and collaborating on model validation. The constructive comments of the referees for enhancing the paper were
much appreciated.
Gehan Amaratunga (M’85) received the B.Sc. degree from the University of Wales, Cardiff, and the
Ph.D. degree from the University of Cambridge, U.K.
He was a Lecturer in the Department of Electronics
and Computer Science, University of Southhampton,
U.K., prior to joining the faculty of the University
of Cambridge in 1986. From 1995 to 1998 he was
Professor and Chair in Electrical Engineering at the
University of Liverpool, U.K., and returned to Cambridge to take up his present position in 1998. He
is currently Professor of electrical engineering and
Head of Electrical Power and Energy Conversion, Department of Engineering,
Cambridge University. His current research interests are in the areas of power
semiconductor devices and ICs, carbon for electronic applications and vacuum
electronic devices. He has also recently initiated a research program at Cambridge on very low-cost solar cell technologies and power ICs for grid connection of solar modules. He has published over 250 journal and refereed conference papers in these and other topics in electrical engineering, physics, and
materials science.