Download Full-power converter based test bench for low voltage

Full-power converter based test bench for low voltage ride-through testing
of wind turbine converters
Riku Pöllänen, Lasse Kankainen, Mikko Pääkkönen
The Switch Drive Systems Oy
Salpausselänkatu 291, FI-53850 Lappeenranta, Finland
Tel.: +358 (0)20 783 8200, Fax: +358 (0)20 783 8470
E-Mail: [email protected]
URL: http://www.theswitch.com
Jaakko Ollila, Stefan Strandberg
Vacon Plc.
Runsorintie 7, FI-65380 Vaasa, Finland
Tel.: +358 (0)201 2121, Fax: +358 (0)201 212 205
E-Mail: [email protected]
URL: http://www.vacon.com
Keywords
Wind energy, Fault-ride through, Test bench
Abstract
This paper describes a full-power converter based test bench to generate voltage sags for fault ridethrough (FRT) testing of the full-power converter based wind turbine drive. Principles of the test
bench control and the generation of different types of voltage dips are explained. Proposed test bench
is also briefly compared with the shunt impedance based voltage dip generation system in terms of
features and operation. Finally, measurement results from LVRT tests using a 1.8 MVA full-scale test
bench are shown.
Introduction
With an increasing share of electricity produced by wind power, the behavior of wind turbines during
grid faults has become of great importance. More and more often grid code specifications require that
wind turbines must be able to ride through all kinds of grid faults, including faults with very low
remaining voltage levels and unsymmetrical (1-phase and 2-phase) faults [1]. From the control
engineering point of view, continuously tougher grid code requirements present many control
challenges for wind turbine converter control. Although the on-site tests are necessary to prove the
fault ride-through (FRT) compliance of wind turbines, in developing stage of the converter control, it
is a common procedure to simulate, test and analyze the system performance with a laboratory test
system. For this purpose, a grid emulator capable of generating defined, repeatable voltage dips of
variable magnitude, duration and fault type, is needed.
According to [2] there are generally four different types of voltage dip generators: 1) rotating
generator based, 2) shunt (or switched) impedance based, 3) transformer based and 4) full-power
converter based. An overview on each of them is shown in Fig. 1. Shunt impedance based solutions
are most often used and they are also recognized as a standardized way to create voltage dips [3], [4].
The shunt impedance based solutions are typically used to generate voltage dips in the medium
voltage level. Therefore medium voltage switchgears and adjustable inductors are needed. Moreover,
if this solution is about to be used at the production facilities, an independent medium voltage feeder
with sufficient high short-circuit ratio and dedicated only for testing purposes is typically required in
order to get the permission from the local distribution network operator and to limit the influences of
the voltage dip on the supplying grid.
1 ) R o ta tin g g e n e r a to r b a s e d
2 ) S h u n t im p e d a n c e b a s e d
e le c tr ic a l m o to r
o r d ie s e l e n g in e
e x c ita tio n
s y s te m
+
G r id
s h o r t c ir c u it ( s h u n t)
re a c ta n c e
L o a d
-
L o a d
s e r ie s
re a c ta n c e
s y n c h ro n o u s
g e n e ra to r
4 ) F u ll- p o w e r c o n v e r te r b a s e d
3 ) T ra n s fo rm e r b a s e d
s w itc h 1
v a r ia b le o u tp u t
tra n s fo rm e r
L o a d
L o a d
G r id
G r id
s w itc h 2
B a c k -to -b a c k c o n v e rte r
Fig. 1: Overview on four different types of voltage dip generators.
Transformer based voltage dip generators, although claimed to be low cost solutions and simple to
control [2], requires a bulky variable output transformer and practically a same number of power
electronic switches (four per phase), such as IGBT with anti-parallel diode, as the full-power converter
based solution. In order to prevent an overvoltage at the transformer output and to protect the IGBTs
from overvoltage when switching off large inductive currents slow switching of the IGBTs and
snubber circuits have to be used.
Full-power converter based test bench consists of back-to-back converter connected between the grid
and the equipment under test (EUT). By controlling the EUT-side output voltage several types of grid
faults can be emulated. Examples of such devices in down-scaled size are described in [5] and in MWscale in [6]. A comparison between a transformer based and a full-power converter based voltage dip
generator can be found in [7]. It is concluded that the full-power converter setup has small size, light
weight, and is more powerful compared with transformer based solution, but due to the claimed
disadvantages of the complex control, high cost and lower reliability due to the limited overvoltage
and overcurrent capabilities of the IGBTs the transformer based sag generator is the preferred solution
for laboratory type application.
For full-power converter manufacturer, however, the full-power converter based test bench is the
preferable choice, because exactly the same converter hardware, filter components and control
software can be used to build the test bench. Straightforward open loop type scalar control with simple
dip generation functions is found to be sufficient for the grid emulator voltage control.
Full-power converter test bench
Topology of full-power converter based test bench is shown in Fig. 2. The EUT, which is a full-power
back-to-back converter connected permanent magnet synchronous generator (PSMG), is supplied by
an identical full-power back-to-back converter. The grid side converter of the test bench controls the
DC-link voltage to its reference and serves as a power supply to the grid emulator. Grid emulator
converter operates as a controllable AC voltage source and generates voltage dips and frequency by
using an inbuilt voltage waveform generator. Both symmetrical and unsymmetrical voltage faults of
various types can be emulated.
W in d tu r b in e e m u la to r
3
M
~
P M S G
G r id
a n d
tra n s fo rm e r
L
G r id s id e
c o n v e rte r
L
1
G r id e m u la to r
C
1
C
F u ll c o n v e r te r b a s e d te s t b e n c h
2
2
G r id s id e
c o n v e rte r
G e n e ra to r
s id e
G e n e ra to r
c o n v e rte r
E q u ip m e n t u n d e r te s t ( E U T )
Fig. 2: Overview of the full converter based LVRT test bench.
Filter components
The actual control quantity of the grid emulator is the pulse width modulated output voltage at the
power module terminals. This point of coupling can be considered to correspond to the fault location
in a real grid. In shunt impedance based test systems the voltage dips are usually generated in the MV
level i.e. in primary side of the wind turbine transformer. The effect of the transformer impedance on
the voltage dip seen at the wind turbine power converter terminal is taken into account in the fullpower converter based test bench by the inductance L1, value of which is selected to be equal to the
transformer short-circuit reactance. Naturally, the need of inductance L1 between the grid emulator
power module output terminals and the capacitors C2 is also evident to prevent a low-impedance
switching of IGBTs between two voltage sources.
Capacitor bank C2 is a fixed part of the full-power converter under the test. In megawatt class power
converter with 690V line voltage it is typically connected in delta to minimize the number of
components. Therefore an additional star-connected capacitor bank, the star point of which is
grounded, is connected between the inductors L1 and the capacitors C2. The main purpose the
capacitors C1 is to offer a low-impedance ground point in the range of switching frequency and
prevent the common mode voltage from distorting the emulated phase voltages. Value of C2 should be
selected as small as possible but large enough to provide a sufficient common mode filtering of the
phase voltages. Another aspect to the selection of C1 is that the resonance frequency of the formed
LCL-filter shall not be decreased too low. A good rule of thumb for selection is C1 ≈ 0.1…0.2C2.
Capacitor bank C1 has also a significant role in reduction of the common voltage stress of the windings
of the tested PMSG. Filter parameters of the down-scaled 8.2 kVA and the full-scale 1.8 MVA test
benches are given in Table I.
Table I: Main parameters of full-converter test benches
Parameter
Down-scaled Full-scaled
Line voltage Un [V]
400
690
Power Sn [kVA]
8.2
1800
Filter inductance L1 [mH]
1.7
0.05
Filter capacitance C1 [μF]
1
68
Filter inductance L2 [mH]
4.1
0.09
Filter capacitance C2 [μF]
2.2
204
Max DC-link voltage Udc [V]
750
1100
Switching frequency fsw [kHz]
3.6
3.6
Test bench control and voltage dip generation
Symmetrical three-phase output voltage with given frequency ωref = 2πfref is produced by giving the
voltage space-vector reference to SVPWM as
u ref (t ) =
2
U ref e jω t =
3
2
U ref (cos(ωref t ) + j sin (ωref t )) = u x,ref (t ) + ju y,ref (t )
3
ref
(1)
where Uref is the reference of the grid emulator phase-to-phase output voltage in rms. When there is no
zero-sequence voltage, the phase voltages can be obtained from the space vector as
ua,ref (t ) = Re{u ref (t )} = u x,ref (t )
1
ub,ref (t ) = Re{a −1 u ref (t )}= − u x,ref (t ) +
2
1
uc,ref (t ) = Re{a −2 u ref (t )} = − u x,ref (t ) −
2
where a = e
j
2π
3
3
u y,ref (t )
2
3
u y,ref (t )
2
(2)
.
According to [8] and [9], depending on the type of fault (three-phase, phase-to-phase with or without
ground, single-phase to ground), the resulting voltage dip at the wind turbine PCC can be one of seven
types shown in Fig.3. Wind turbine is usually connected to the medium voltage grid through delta-star
(Dyn) connected distribution transformer. This leads to propagation and transformation of the dip
types as listed in Table II. From the table it can be concluded that voltage dips that can be observed in
the secondary of the Dyn-transformer can only be of type A, C, D, F or G.
D ip ty p e A
U
c
U
U
c
U
a
b ,d ip
U
b
U
c
c ,d ip
U
U
a ,d ip
a
c ,d ip
U
b ,d ip
b ,d ip
U
D ip ty p e D
U
c
c ,d ip
U
U
a ,d ip
D ip ty p e C
U
U
U
b
c
c ,d ip
U
U
D ip ty p e B
U
b
U
c
D ip ty p e E
U
U
U
a ,d ip
a
D ip ty p e F
U
c ,d ip
U
U
b
b ,d ip
a ,d ip
U
U
a
U
U
b
a ,d ip
U
U
a
U
b ,d ip
U
b
c
c ,d ip
U
U
D ip ty p e G
U
a ,d ip
U
a
U
c ,d ip
U
b ,d ip
a ,d ip
U
a
b ,d ip
U
b
Fig. 3: Voltage dip classification from “A” to “G”. Phasors of three-phase voltage before (dotted) and
during fault (solid) are shown.
Investigating the phasors shown in Fig. 3 simple expressions of faulted phase voltages in LV level can
be derived as a function of fault level factor k ∈ [0,1] . These are given in the second rightmost column
G
of the Table II. In contrast to a dip parameter D [9], which is generally defined as a complex number
and models therefore also the phase angle difference between the pre-fault and the faulty voltage, the
fault level factor k here is a real number. However, the phase angle jump can be incorporated to the
generated voltage dip by introducing the phase shift directly into voltage space vector reference
jump
u ref (t ) = u ref e
jθ jump
(3)
where θjump is the desired phase angle jump.
Even more compact formulation of LV-level voltage dip generation is obtained if the three-phase
voltage equations are transformed into a two-axis space-vector form as listed in the rightmost column
of the Table II. Examples of voltage dip generation using the proposed expressions are illustrated in
Figs. 4-5. Shown waveforms are the phase-to-phase voltages measured at the grid emulator power
module terminals and filtered with oscilloscope’s inbuilt low-pass filter. The voltage waveforms are in
excellent agreement with the phasor diagrams shown in Fig. 3.
Table II: Voltage dip classification, propagation through Dyn connected transformer and LV-level
generation equations.
Fault
Dip in
HV level
Dip in
MV level
Dip in
LV level
LV-level dip generation
Three-phase
abc
3-phase
fault
Type A
Type A
Type A
Two-axis
xy
u a,dip = (1 − k )ua,ref
u x,dip = (1 − k )u x,ref
u b,dip = (1 − k )u b,ref
u y,dip = (1 − k )u y,ref
u c,dip = (1 − k )uc,ref
1-phase
fault
Type B
Type C
Type D
ua,dip = (1 − k )ua,ref
u x,dip = (1 − k )u x,ref
u b,dip = ub,ref + k 2 ua,ref
u y,dip = u y,ref
uc,dip = uc,ref + k 2 ua,ref
phase-tophase
Type C
Type D
Type C
u a,dip = ua,ref
u b,dip = u b,ref − k 2 (u b,ref − u c,ref )
u c,dip = uc,ref + k 2 (u b,ref − uc,ref )
2-phase to
ground
Type E
Type F
ua,dip = (1 − k )ua,ref
u b,dip = ub,ref + k 3 (ua,ref − ub,ref )
uc,dip = uc,ref + k 3 (ua,ref − uc,ref )
2-phase to
ground
Type E
Type F
Type G
u x,dip = u x,ref
u y,dip = (1 − k )u y,ref
u x,dip = (1 − k )u x,ref
u y,dip = (1 − k / 3)u y,ref
u a,dip = (1 − k 3)u a,ref
u x,dip = (1 − k / 3)u x,ref
u b,dip = (1 − k )u b,ref − k 3 ua,ref
u y,dip = (1 − k )u y,ref
u c,dip = (1 − k )u c,ref − k 3 ua,ref
Comparison of shunt impedance based and full-power converter based
voltage sag generators
The main target of the demonstrated full-power converter based voltage dip generator is to offer a
flexible, cost effective and technically sound laboratory scale test system for R&D stage testing of the
wind power converter products at the manufacturing site. It is not primarily intended to compete with
and replace the voltage dip generators meant for at-site testing of the complete wind turbine. Therefore
the comparison of the shunt impedance based and full-power converter based test systems is made in
terms of grid connection requirements, grid disturbance, component costs, features, performance and
operation. The following items were identified for each concept:
(a)
(b)
Fig. 4: Phase-to-phase voltages in dip of type C (a) and type D (b). Fault factor k = 0.5. Y-scale
200V/div, x-scale 20ms/div.
Fig. 5: Phase-to-phase voltages in dip of type F. Fault factor k = 0.5. Y-scale 200V/div, x-scale
20ms/div.
Shunt-impedance based test system:
• Full-power grid connection and sufficiently high SCR needed
• Significant upstream grid disturbances possible
• Bulky circuit breakers and reactors needed
• Mobile test container solutions are expensive
• Relatively long setup time for different test cases (~15-20 minutes)
• In practice, a limited number of voltage dip types can be generated due to restrictions set by the
MV grid and/or DSO
• Voltage dip duration limited by the temperature increase of the short circuit reactance
• Special requirement for installation and operation in case of MV level system
• Wearing of the circuit breakers and other MV switchgear
Full-power converter based test system:
• Only partial-power grid connection needed
• Negligible upstream grid disturbance
• Exactly the same hardware as in EUT can be used
• Easy and fast setup of different test cases through parametrization
• Various types of voltage dips can be generated
• Arbitrary dip depth (fault factor k), duration and number of consecutive dips can be generated
• HVRT, phase jumps, frequency ramps also possible
• No moving parts in the dip generation system
It is concluded that the full-power converter setup has several advantages compared to the shunt
impedance based system regarding the R&D stage FRT testing at the power converter manufacturing
site. Therefore the full-power converter based sag generator is the preferred solution for research
laboratory type application.
Voltage waveforms
To verify the performance of the megawatt class full-power converter based voltage dip generator a
three-phase voltage sag for duration of 625 ms and the remaining voltage level of 20% is compared
with the same generated by a MV level installed shunt impedance based test system. Results are
shown in Fig. 6. Upper waveforms represent the 690 V level phase voltages in case of the shunt
impedance based system. Lower signals show the same dip generated with the full-converter based
test bench. There are no voltage interruptions or spikes in the waveforms. Voltage decreases from the
nominal to dip as well as the increases back to the nominal level within less than one millisecond. A
steady-state operation is reached in both cases within less than a half period. The main difference
between the voltage waveforms can be observed after the moment of the voltage restoration. In case of
shunt impedance based system the phase voltages are significantly distorted after the dip due to
transformer saturation. Saturation is due to the remaining DC component in the transformer
magnetizing flux caused by the stepwise changes of the transformer input voltage. The duration of the
saturation depends for example on the transformer size and can well be in range from hundreds of
milliseconds to seconds. In addition to the distorted phase voltage the transformer saturation slows
down the increase of the fundamental positive sequence voltage from the sag voltage back to the
nominal level.
sb: UMsWec1_trig
sb: UMsWec2_trig
sb: UMsWec3_trig
fcb: UMsWec1_trig
fcb: UMsWec2_trig
sb: UMsWec1_trig
fcb: UMsWec3_trig
600
500
500
400
400
300
300
200
200
sb: UMsWec3_trig
fcb: UMsWec1_trig
fcb: UMsWec2_trig
fcb: UMsWec3_trig
100
100
0
0
-100
-100
-200
-200
-300
-300
-400
-400
-500
-500
V
sb: UMsWec2_trig
V
V
V
500
600
400
500
300
400
200
300
100
200
100
0
0
-100
-100
-200
-200
-300
-300
-400
-400
-500
-500
-200
-190
-180
-170
-160
-150
-140
-130
410
-120
ms
420
430
440
450
460
470
480
490
500
510
520
530
ms
Fig. 6: Comparison of phase voltages in case of 3-phase fault generated with MV level shunt
impedance based and LV full-power converter based dip generators.
Experimental results
Measurement results from the LVRT tests of The Switch’s standard liquid cooled 1.5 MW full-power
converter using the full-power converter based test bench shown in Fig. 2 have been performed at the
test laboratory of The Switch Vaasa factory. Following the requirements stipulated in [3] the LVRT
tests have been carried out in partial and full load operation for both symmetrical three-phase and
asymmetrical two-phase voltage dips of different depths and duration. Results are recorded using an
IMC data acquisition device and the inbuilt datalogger of the tested converter. It will be demonstrated
that the full-power converter based voltage sag generator allows a reliable testing of wind power
converter products.
LVRT test at partial power operation
The results shown in Figs. 7-8 illustrate the responses of the line side converter of the tested 1.5 MW
full-power converter in case of 50% three-phase (Type A) and two-phase (Type C) voltage sag for
duration of 250 ms. In two phase voltage sag the 50% means the lowest phase-to-phase voltage and
corresponds to fault level factor value k = 0.5. The converter operates at 25% generating power. In
case of symmetrical voltage sag the dynamic voltage support by injection of capacitive reactive
current is enabled. Due to 50% voltage sag the power can be fed to the grid through the voltage fault
and therefore the DC voltage is well controlled without the activation of the dynamic electrical brake.
In asymmetrical 2-phase voltage dip a limited 100Hz oscillation of active and reactive currents due to
presence of the negative sequence voltage is observed.
Fig. 7: Datalogger signals of the tested line side converter during a 250 ms symmetrical voltage dip
(Type A) to 50% Un with reactive current injection. LineVoltage signal scaling is 10 = 1V and current
signal scaling is 1000 = In = 1255 A.
Fig. 8: Datalogger signals of the tested line side converter during a 250 ms asymmetrical voltage dip
(Type C) to 50% Un with reactive current injection. LineVoltage signal scaling is 10 = 1V and current
signal scaling is 1000 = In = 1255 A.
LVRT test at near full power operation
Measurement results for line side converter operating at nominal power under 3 s symmetrical (Type
A) three-phase 0% voltage sag and asymmetrical (Type C) two-phase 0% voltage sag are shown in
Figs. 9 and 10 respectively. Upper waveforms illustrate the instantaneous phase voltages and currents.
In lower graph the post calculated voltage sequences and the positive sequence active and reactive
powers are shown. Due to zero voltage dip the the active power cannot be fed to the grid which leads
to increase of the DC voltage and activation of the dynamic electrical brake. Due to limited thermal
capacity of the electrical braking the generator power is ramped down to zero during the 3 seconds
dip. After the dip the generator power is ramped back to the nominal with ramp rate of 0.25Pn/s.
Reactive power injection is enabled in both examples.
Fig. 9: Symmetrical voltage dip down to 0%. The dip duration is 3s. Reactive current injection is
enabled during the dip. Upper graph: Phase voltages (upper) and currents (lower). Lower graph:
Positive sequence active power, reactive power, positive sequence voltage amplitude, negative
sequence voltage amplitude.
Fig. 10: Asymmetrical voltage dip down to 0%. The dip duration is 3s. Reactive current injection is
enabled during the dip. Upper graph: Phase voltages (upper) and currents (lower). Lower graph:
Positive sequence active power, reactive power, positive sequence voltage amplitude, negative
sequence voltage amplitude.
Conclusions
A full converter based test bench for low voltage ride-through testing of wind turbine converters by
means of voltage controlled grid emulator was presented. The structure of the test bench and the
principles of voltage dip generation were explained. Measurement results illustrating the dynamic
performance of the test bench and the line side converter were shown.
References
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tests in the laboratory”, EPE-PEMC 2010, Ohrid, Republic of Macedonia.
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