Download Thermal Simulation

Optimization of a Boost Switching-mode Power Supply
using Electro-thermal Modeling and Simulation
Catalin Negrea, Marius Rangu
Paul Svasta
Electronics and Telecommunications Faculty
“Politehnica” University
Timisoara, Romania
[email protected]
Center of Technological Electronics and
Interconnection Techniques
“Politehnica” University
Bucharest, Romania
[email protected]
Abstract— One of the major drawbacks in the typical design flow
of electronic equipment is the lack of synchronization between
design stages. Schematic design and thermal management are
rarely correlated, although electrical and thermal parameters are
very closely linked. Poor thermal design can have severe
consequences on the reliability and functionality of the
equipment and is often the main cause of component failure.
As power density increases on the printed circuit board this
problem becomes critical. Our paper presents a method of
mixing electrical and thermal simulation with the goal of
improving functional parameters and thermal stress behavior.
Switching-mode power supply circuits have high power density
and are likely to fail due to thermal stress, so as a support
application for our method we will use a boost switching-mode
power supply designed for automotive use .
Keywords - spice model ;thermal model;design flow; electrothermal simulation;
I.
INTRODUCTION1
Thermal management is an important concern in the design
of the any power application. When we are dealing whit hursh
environmental conditions a detailed thermal analysis can be
vital. Conventional design flow of electronic equipment offers
limited possibilities for evaluating thermal effects on electronic
assemblies due to the lack of correlation between the schematic
design stage and the printed circuit board (PCB) layout design.
Often a standard thermal simulation based on computational
fluid dynamics (CFD) is not enough to reveal poor thermal
management that has its origin not in the layout design, but in
the early stages of component selection and schematic design.
As a result of this miscorrelation between thermal and
electrical parameters, in most cases a large number of tested
PCB prototypes is needed until the design can be validated.
II.
PROCESS DESCRIPTION
The conventional design flow implies several design stages
depending on the complexity of the electronic assembly.
Common for every design flow are the schematic design and
PCB design stages. The interaction between these two stages
has the objective of preserving the functional parameters
specified in schematic design, in a certain mechanical
configuration which represent the packaging of the entire
assembly. This optimization process is iterative and needs
several design cycles. The optimization can have two distinct
goals: one is signal integrity and electromagnetic compatibility,
the other is thermal management.
Realistic thermal analysis requires having a basic layout.
We can not obtain applicable design rules based only on
schematic design and datasheet analysis. Previous attempts in
electro-thermal simulation [1,2] only provided results
regardless of PCB parameters. The link between electrical and
thermal parameters was made by modeling thermal behavior
based on electrical-thermal analogies using a Spice simulator.
While this can be very useful in fine tuning schematic
parameters it does not provide clear design directives for the
layout engineer.
The basic concept of our approach is illustrated in fig.1.
Spice simulation and thermal simulation are used in a
concurrent manner.
Our approach is an attempt to close the loop on electrical
and thermal simulation with the aim of reducing the number of
prototypes needed for design validation.
Figure1. Improvement of the conventional design flow
using electro-thermal simulation
1
This paper is partially supported by Mentor Graphics, the EDA provider of
“Politehnica” University of Timisoara
III.
CIRCUIT DESCRIPTION AND APPLICATION
REQUIREMETS
In automotive applications electronic assemblies have to
withstand ambient temperatures from -40 to +80 oC. When we
are dealing with high current power supplies operating at high
ambient temperatures, special attention must be given to
layout design in order to maintain the functional parameters of
the circuit and junction temperatures within their limits.
The circuit that will serve as an example to illustrate our
optimization method is a boost switching mode power supply
based on Linear Technology (LT) LT3757 high efficiency
boost controller. The DC/DC boost converter topology used is
illustrated in fig.2.
Output filtering
capacitors
Output
voltage
Feedback
Resistive
Divider
Current
Sense Resistor
Figure 3.Simplified LT3757 Boost Converter Schematic
IV.
MODELING OF THERMAL PARAMETERS IN SPICE
Electrical simulation of the entire circuit, under specified
load conditions, was done using Spice 3 simulation models for
passive and active devices, except U1 for which LT’s
proprietary macromodel was used. For active components M1
and D1, the thermal behavior at junction level was already
integrated in the models. For passive components thermal
behavior and non-ideal parameters were modeled based on
manufacturer datasheet information.
Figure 2. DC/DC Boost Converter Topology
The application performance requirements are presented in
table 1.
TABLE I.
PERFORMANCE PARAMETERS OF BOOST CONVERTER
Parameter
Nominal Output
Voltage
Maximum Output
Voltage Variation
Maximum output
Curent
Minimum Input
Voltage
Nominal Input
Voltage
Maximum Input
Voltage
Minimum
Efficiency
Operating
temperature
Switching
frequency
Abbreviation
Value
Unit
Vout
24
V
smax
±2
%
Iout
2
A
Vin_min
8
V
Vin_nom
12
V
Vin_max
16
V
η
90
%
T
-40..+85
fsw
300
o
C
kHz
The converter simplified schematic, with component
identifiers and values is presented in figure 3. Those
component identifiers will be used throughout the paper.
The components represented in the simplified schematic are
crucial for the functionality of the circuit, and will receive a
detailed analysis. All components were chosen with high
operating temperature ratings in order to satisfy automotive
thermal stress demands.
A. Resistors
For resistors thermal modeling was implemented based on
the thermal coefficient of resistance (TCR).The equation for
electrical resistance at a certain temperature T is:
R(T )  R(Tnom )[1   R (T  Tnom )]
(1)
where R(T ) is the resistance at temperature T , Tnom is the
nominal temperature (usually 20 oC),  R is the thermal
coefficient of resistance. For surface mount resistors  R has
values between 50..200 [ ppm / oC] .
B. Capacitors
In the case of capacitors three parameters can be
considered: self capacitance which can vary in respect to
temperature and applied voltage, equivalent series resistance
(ESR) that is also temperature dependent, and equivalent
series inductance (ESL) which practically has no significant
variation in the operating temperature domain. The equivalent
capacitor model is illustrated by figure 4.
Figure 4. Equivalent capacitor model
Variation of capacitance due to temperature change
depends mostly on the type of dielectric of capacitor. This
variation can be modeled based on the thermal coefficient of
capacitance (TCC). The equation for capacitance at a specific
temperature is:
C (T ) = C (Tnom )[1 + a C (T - Tnom )]
(2)
where C (T ) is the capacitance at temperature T , Tnom is
the nominal temperature (usually 20 oC),  C is the thermal
coefficient of capacitance. Figure 5 illustrates normalized
capacitance as a function of temperature for the output
capacitor C1, which has an aluminum electrolytic dielectric.
Figure 5. Typical multiplier of capacitance as a
function of temperature [9]
A. SPICE Simulation
In order to determine electro-thermal behavior of different
components in the circuit an individual analysis is needed.
SPICE allows individual temperature sweeps for each
component by adding the model parameter “T_ABS” which
defines the absolute temperature regardless of global
temperature [4].
The goal is to determine the variations in performance
parameters described in table 1 and dissipated power vs.
temperature graphs.
In our application critical components are: switching
power transistor M1, output diode D1, output capacitors,
inductor L1, feedback voltage divider resistors R2 and R3.
1) Switching power MOSFET
The power transistor is the component with the highest
power dissipation and can have huge impact on the efficiency
of the boost converter. In the SPICE simulator M1’s junction
temperature was varied in order to determine the influence on
circuit parameters. The graph in figure 6 illustrates power
dissipation and efficiency vs. temperature over M1’s possible
operating range of -40..+175 oC.
ESR can be calculated using the formula [10]:
DF (T )
ESR(T ) 
 f C (T ) []
(3)
2
where DF represents the dissipation factor which is
temperature dependent , f is the operating frequency and C is
the capacitance calculated using (2) at temperature T . DF has
a nonlinear variation with temperature and is different for
every capacitor type so its effect can not be generally
modeled. It has to be extracted and implemented in the spice
model manually.
C. Inductors
Inductors do not present large variations of inductance
over de operating temperature range unless they are exposed
to currents that exceed the maximum ratings. Usually
inductance is within the components tolerance limits at
maximum operating temperature. To accurately predict power
dissipation ESR must be modeled. In our case inductor L1 has
a maximum current rating of 15 A, and peak current flowing
through it only 5.2 A so there is no need for additional
modeling besides ESR.
V.
OPTIMIZATION
The optimization process follows the basic steps in fig. 1.
The detailed method of electro-thermal optimization will be
discussed further with exemplification based on the
application described in paragraph III.
Figure 6. Power dissipation an efficiency of converter for
M1 temperature sweep
From the plot it can clearly seen that above 100 oC,
dissipated power increases drastically and converter efficiency
falls below the 90 % limit.
2) Output diode
D1 is a fast switching schottky rectifier diode. Because
forward voltage decreases with temperature rise dissipated
power is increased. D1’s junction temperature was varied
between operating temperature limits to determine the
influence on circuit parameters. Figure 7 represents power
dissipation and efficiency vs. temperature.
Figure 7. Power dissipation an efficiency of converter for
D1 temperature sweep
3) Output capacitors and inductor
Capacitors and inductors dissipate heat due to parasitic
components. Figure 8 presents inductor L1 and total output
capacitors power dissipation in the circuit as a function of
temperature in the case a global temperature sweep between
-40 and +85 oC.
B. Basic design rules
By analyzing the data presented in charts from figures 6,7
and 8 some basic directions of optimization can be
established:
a) in order to maintain efficiency within the 90 % limit
M1’s junction temperature must not exceed 105 oC.
b) output diode power dissipation can benefit from the
heat generated be other components at low ambient
temperatures
c) temperature difference between voltage divider
resistors, together with switching noise (of about 900 mV peak
to peak) can cause Vout to exceed variation limits; to avoid this
the resistors must be kept at about the same temperature, and
to further decrease the temperature difference effect 0.5%,
±50 ppm resistors can be used.
C. PCB Layout
To further analyze the circuit with a thermal simulation
software we need a basic PCB layout with partial routing. We
used a FR-4 substrate two layer board with 35 µm cooper.
Traces were designed to support 4 A currents. Figure 10
presents component placement for the basic layout and board
dimensions.
Figure 8. Power dissipation vs. temperature for
L1 and the output capacitors
32 mm
4) Feedback voltage divider
The feedback voltage at input FBX of the boost controller
sets the nominal output voltage. Variations of the divider ratio
can easily cause Vout to exceed the allowed variation limits of
2%. In case of regular 0402 package resistors with 1%
tolerance, TCC is ±100 ppm/oC. Percent change in output
voltage as function of temperature difference between R1 and
R2 is presented in figure 9.
Figure 9. Change in output voltage vs. temperature difference
between R1 and R2
62 mm
Figure 10. PCB Layout and board dimensions
D. Thermal simulation and modeling
For thermal simulation we used Mentor Graphics
HyperLynx Thermal. The designed layout is imported in IDF
file format. In order to accurately determine case and junction
temperatures, dissipated power as a function of temperature
extracted from the SPICE simulations and junction-to-case
thermal resistance data, must be modeled for each component.
The horizontal board is cooled through natural convection.
Ambient temperature is varied between -40 and +85 oC to
determine conditions in which maximum operating
temperatures are exceeded.
Figure 11 show temperature distribution over the board at
+50 oC ambient temperature, where the junction temperature
of M1 exceeds the maximum allowed value.
Using the design guidelines above a loop optimization
process can be defined be cycling through steps C to G.
VI.
Figure 11. Thermal simulation results at Tamb=+50 oC
Critical component case and junction temperature are
listed in table 2.
COMPONENT TEMPERATURE DATA AT TAMB = +50 OC
TABLE II.
M1
D1
L1
R1
R2
R3
Cout
U1
Case
107 oC
118 oC
82 oC
60 oC
78 oC
98 oC
60.. 70 oC
64 oC
Junction
119 oC
124 oC
82 oC
RESULTS
Using the optimization method described in paragraph 5 we
where able to improve the design in order to meet application
requirements listed in table 1. Four loop iterations were needed.
Table 3 presents functional parameter evolution in the
optimization process.
TABLE III.
Parameter
Efficiency
Maximum Vout
Variation
Ambient
temperature
FUNTIONAL PARAMETER EVOLUTION
Iteration 1
Iteration 2
Iteration 3
Iteration 4
88.9 %
87.2%
89.4%
93.2%
2.87%
1.88%
1.54%
1.54%
+40 oC
+65 oC
+70 oC
+85 oC
After 4 iterations the functional parameters are within limits
and the optimization process can end. Figure 12 presents the
temperature profile of the board after optimization.
Board Cutouts
E. SPICE Simulation with extracted temperature data
Thermal data presented in table 2 was introduced in the
SPICE simulation. Input voltage and load current were varied
to determine performance degradation through the entire
operating domain. In all cases efficiency was below 88.9 %.
Output voltage Vout dropped to 23.31 V when minimum input
voltage Vin_min was applied at the input.
F. Performance Evaluation
Results of the SPICE simulation show that at +50 oC
ambient temperature efficiency requirements are not met and in
some cases Vout drops below the 2% limit. M1’s dissipated
power causes the efficiency degradation. D1's junction
temperature is near the limit and the temperature difference
between voltage divider resistors cause an output voltage drop.
Additional layout design and thermal management is required
in order to meet specifications.
G. Layout and thermal management optimization
Based on component thermal behavior determined at step
A and thermal data extracted from the thermal simulation, a set
of optimization guidelines can be defined:
1) In order to minimize the junction-to-air thermal
resistance of M1, the heat dissipation cooper area connected
to the drain pad must be increased.
2) Repositioning resistors R1 and R2 in an area with
smaller temperature gradient will solve output voltage
variation problems.
3) Repositioning of components to balance the thermal
profile of the board.
Figure 11. Thermal simulation results at +85 oC after optimization
At +85 oC the power transistor junction temperature reaches
98.6 oC, allowing a safety margin of about 7 oC until the
established limit of 105 oC is exceeded. Besides the guidelines
defined in paragraph 5 G cooling was improved by:
a) using board cutouts to improve convection near M1
and D1 (represented in figure 11)
b) providing an larger convection area for M1 by
repositioning the output capasitors and connectors
VII. CONCLUSIONS
An optimization method for the conventional design flow
was developed, based on the correlation between electrical and
thermal simulation parameters. The method involves running
SPICE and thermal simulations in concurrent manner with the
goal to evaluate the influence of different cooling solutions
and layout configurations on the functional parameters of the
circuit. The optimization process can be divided in to seven
stages:
SPICE modeling simulation – modeling thermal
parameters and determining component thermal
behavior in the circuit
2. Basic design rules – establishing basic guidelines
for optimization
3. Basic PCB Layout – PCB layout design used as a
starting point in thermal simulation
4. Thermal simulation – simulation of the defined
PCB layout using dedicated software (Mentor
Graphics HyperLynx Thermal was used)
5. SPICE Simulation using extracted thermal data –
electrical circuit simulation based on component
temperatures obtained in the thermal simulation
6. Performance evaluation
7. Layout and thermal management optimization –
optimization of current design based on extracted
data at step 1.
The optimization process is iterative so steps 4 to 7 will be
repeated until the design meets application requirements and
can be validated.
We applied the optimization method on a DC/DC boost
converter intended for use in the automotive industry.
Although our application circuit is relatively simple, wide
temperature operating range required in the automotive
industry posed several problems regarding thermal
management. After four iterations of the optimization process
described above, the overall design met all electrical
specifications. By running concurrent electro-thermal
simulations the need for several prototypes, which are usually
used for thermal design validation, was eliminated.
Our study shows that, by using optimization through
electro-thermal simulation, without using additional hardware
resources, thermal management can be improved and the
number of prototypes can be significantly reduced.
Further improvements to the described method ca be made
by defining application specific strategies and automating the
electro-thermal simulation data exchange.
1.
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