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Transcript
ELEC 351L
Electronics II Laboratory
Spring 2002
Lab 4: Small-Signal Modeling of BJT Amplifiers
Introduction
BJTs and FETs are most commonly used in amplifier circuits. The design of amplifiers is
simplified substantially by considering the bias settings and small-signal behavior as separate
design tasks. Small-signal modeling involves analyzing how a circuit responds to “incremental”
(small compared to the bias levels) changes in the input voltage or current; it is therefore used to
determine the amplifying characteristics of the circuit. In this lab experiment you will
investigate the small-signal modeling of a common emitter amplifier with emitter degeneration.
Theoretical Background
Shown in Figure 1 is a common emitter amplifier intended for use with small signals. The
resistor values have been chosen to obtain the bias conditions indicated in the figure caption.
These are the same bias conditions used in Lab #2. The capacitors Ci and Co isolate the amplifier
at DC from the source and the load. If the capacitors were not present, then the bias levels
(quiescent base current, quiescent output voltage, etc.) would be affected by the source voltage
and impedance and the load impedance. Instead, the capacitors act as open circuits at DC, so the
VCC
Ci
vs (t)
RC
R1
6.2 k
30 k
+
Co
+
vB
input
signal
+
2N3904
RL
R2
4.7 k
+
vRE
_
vOUT
_
RE
1 k
Figure 1. Common emitter amplifier with emitter degeneration. The operating point of the
circuit has been set at VOUT = 6 V, IC = 1 mA, and VRE = 1 V. “DC blocking capacitors” Ci and
Co typically are electrolytic units.
1
bias levels depend only upon the values of R1, R2, RC, and RE. The capacitors will, of course,
have an effect on the AC (small-signal) operation of the circuit and are usually chosen to have a
negligible reactance at the lowest frequency of interest. Thus, the reactance is made much
smaller than the input resistance of the amplifier. Recall that the formula for capacitive
reactance is given by
XC 
1
1
.

C 2fC
To analyze the small-signal behavior of this circuit, the transistor is replaced with its small-signal
model, and all DC voltage and current sources are set to zero. (Deactivated voltage sources
become short circuits, and deactivated current sources become open circuits.) The small-signal
model of the amplifier circuit is shown in Figure 2. The resistor Rs represents the source
resistance (the Thévenin equivalent resistance of the source). Also, the incremental resistance
between the base and the emitter has been represented by the symbol r instead of rbe; both
symbols are widely used. The double bar (||) notation indicates the parallel combination of two
resistors. For example, R1 || R2 = R1 R2/(R1 + R2).
Rs
vb
B
C
ib
R C || R L
+
vs (t)
+
_
r 
R 1 || R2
o i b
vout
_
E
R in
RE
Figure 2. Small-signal model of the common emitter amplifier.
We will now use the small-signal model to derive an expression for the small-signal voltage gain
(vout/vs) of the amplifier. First, note that the dependent current source draws current from the
ground through the parallel combination of resistors RC and RL (RL typically represents the input
resistance of a following amplifying stage or of an output transducer such as a speaker or
recording device). The output voltage is thus equal to
2
vout    oib RC RL .
If the source resistance Rs is very small compared to the parallel combination of R1, R2, and the
resistance looking into the base of the BJT, then Rs can be neglected, and a KVL loop around vs,
the base-emitter junction, and RE leads to
v s  ib r   o  1ib RE .
Using the valid approximation o + 1  o, solving for the base current yields
ib 
vs
.
r   o RE
Substituting this result into the equation for vout leads to the expression for the small-signal
voltage gain av of the amplifier given by
vout    o RC RL
vs
r   o RE
or a v 
vout   o RC RL

.
vs
r   o RE
If r << oRE (which is often the case), then the voltage gain can be further simplified as
av 
 RC RL
RE
.
In the case of this amplifier, in which IC = 1 mA (quiescent), r = VT/IB = VTo/IC, which has a
value of around 3 to 4 k. (Recall that   1 for the base-emitter junction of a BJT and that
VT = T/11600.) The value of oRE should be 50 k or more. Note that when r can be neglected
the amplifier is linear for rather large input and output signals, because the fluctuations in r with
changes in the total base current iB = IB + ib are “swamped” by the much larger value of oRE.
That is, the sum r + oRE changes very little as iB changes; thus, the gain is not a function of the
base current in this case.
The gain equation must be modified if the value of RS is significant compared to the other
resistor values in the base circuit. The exact expression for the base current is
ib 
vb
,
r   o RE
where, as indicated in Figure 2, vb is the voltage measured between the base and ground. Also
indicated in Figure 2 is the total small-signal input resistance Rin seen by the source, given by
Rin  R1 R2 r  o RE  .
3
By the voltage divider rule, vb can be expressed as
vb 
R1 R2 r   o RE 
R in
vs 
vs ,
Rin  Rs
R1 R2 r   o RE   Rs
and finally the equation for the output voltage becomes
vout    o RC RL ib    o RC RL
  o RC RL R1 R2 r   o RE 
vb

vs
r   o RE
r   o RE R1 R2 r   o RE   Rs
or
vout   o RC RL R1 R2 r   o RE 
.

vs
r   o RE R1 R2 r   o RE   Rs
If r << oRE, then the gain equation simplifies to
vout  RC RL R1 R2  o RE
.

vs
RE
R1 R2  o RE  Rs
Quite often, if the base bias network is stiff, then either R1 or R2 will be substantially smaller than
the other values in parallel with it. In this case, the quantity R1||R2||oRE is approximately equal
to the small resistor value.
The values of R1 and R2 thus come into play in the gain equation only when the value of Rs is
large enough that it cannot be neglected. This illustrates one important reason why voltage
amplifiers are often designed to have as small an output resistance (source resistance) as
possible. If the output resistance of an amplifier is small, then the values of the bias resistors R1
and R2 in the following amplifying stage have no bearing on the gain of that stage.
Experimental Procedure
Assemble a common emitter amplifier circuit with the resistor values shown in Figure 1. (The
value of the load resistor RL will be given later.) Use a 2N3904 npn transistor (pin-out in Figure
3) and a power supply voltage VCC of 12 V. Use 10 F electrolytic capacitors for the “DC
blocking capacitors” Ci and Co. Note that electrolytic capacitors are polarized. If they are
connected backwards in the circuit, they could self-destruct in a spectacular and dangerous
fashion!
 Verify that the quiescent voltages and currents listed in the caption of Figure 1 are close to
their design values in your circuit. These measurements must be taken with no source voltage
applied to the amplifier.
4
 Estimate the value of r. To do this, assume a o value of 150 and an ambient temperature of
300 K. Assuming that o is never less than 50, why is it probably valid to neglect the effect of r
on the operation of this circuit?
 Calculate the capacitive reactances of Ci and Co at 1 kHz. Should their reactances be
negligible at the test frequency of 1 kHz that you will be using?
Connect a load resistance of 100 k to the output of the amplifier, and apply a sinusoidal signal
at a frequency of around 1 kHz and amplitude (peak voltage) of approximately 20 mV to the
input. Simultaneously monitor the incremental base voltage vb and the incremental output
voltage vout on the oscilloscope. Use the BW Limit feature to eliminate as much of the noise on
the trace as possible. If the signal is still noisy with the BW Limit feature on, you will not be
able to use the voltage readout feature to determine the amplitude; instead you must interpolate
the midpoint of the “fuzziness” and use the display’s grid lines to measure the voltage. Note that
vb must be taken from the left side of Ci and that vout must be taken from the right side of Co to
avoid a DC offset voltage.
 The source resistance Rs of the function generator should be around 50 . Do you think that
Rs has a significant effect on the operation of the circuit? That is, can you safely make the
approximation that vs  vb? Explain why or why not.
 Sketch or print the input and output waveforms on the same plot. Make sure you label both
axes, include units, and clearly indicate which trace is the input voltage and which is the output
voltage. Axis labels are especially important if the input and output voltages are plotted to
different scales. Calculate the measured small-signal voltage gain of the amplifier. Don’t forget
to indicate whether or not the amplifier is inverting the input signal (i.e., use a minus sign, if
appropriate). Compare your measured value of the voltage gain to the value calculated using one
of the gain equations in the Theoretical Background section above. Does the difference in
measured and calculated values (if significant) seem reasonable given the approximations you
assumed and the tolerances of the resistors?
 Maintain the input voltage at the level used earlier and decrease the value of the load resistor
RL until the output voltage drops to half the value obtained with the 100 k load resistor. You
may need to lower RL substantially in order to accomplish this. Record this load resistor value.
Does the value you obtain make sense in terms of the appropriate formula for the voltage gain?
Lead identification for 2N3904 inTO-92 package
(top view)
E
B
C
Figure 3. Identification of terminals for the 2N3904 npn transistor.
5