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MULTISTAGE AMPLIFIERS A REVISIT TO AMPLIFIER BASICS: There are many situations wherein the signal picked up from a source (say a transducers) is too feeble to be of any use and has to be magnified before it can have the capability to drive a system (say another transducer). For example, the electrical signal produced by a microphone has to be magnified before it can effectively drive a loudspeaker. This function of magnifying the amplitude of a given signal, without altering its other properties is known as amplification. In any signal transmission system, amplification will have to be done at suitable locations along the transmission link to boost up the signal level. In order to realize the function of amplification, the transformer may appear to be a potential device. However, in a transformer, though there is magnification of input voltage or current, the power required for the load has to be drawn from the source driving the input of the transformer. The output power is always less than the input power due to the losses in the core and windings. The situation in amplification is that the input source is not capable of supplying appreciable power. Hence the functional block meant for amplification should not draw any power from the input source but should deliver finite out power to the load. Thus the functional block required should have input power Pi = Vi Ii = 0 And give the output P0 = V0 I0 = finite Such a functional block is called an ideal amplifier, which is shown in Fig.1 below. Power gain is G = P0/Pi The power gain of an ideal amplifier being infinite may sound like witchcraft in that something can be produced from nothing. The real fact is that the ideal amplifier requires dc input power. It converts dc power to ac power without any demand on the signal source to supply the power for the load. 1 CLASSIFICATION OF AMPLIFIERS: Amplifiers are classified in many ways based on different criteria as given below. I In terms of frequency range: 1. DC amplifiers. (0 Hz to 20 Hz) 2. Audio amplifiers (20 Hz to 20 KHz) 3. Radio frequency amplifiers (Few KHz to hundreds of KHz) 4. Microwave amplifiers (In the range of GHz) 5. Video amplifiers (Hundreds of GHz) II In terms of signal strength: 1. Small signal amplifiers. 2. Large signal amplifiers. III. In terms of coupling: 1. Direct coupling. 2. Resistance – capacitance (RC) coupling. 3. Transformer coupling. IV. In terms of parameter: 1. Voltage amplifiers. 2. Current amplifiers. 3. Power amplifiers. V. In terms of biasing condition: 1. Class A amplifier 2. Class B amplifier 3. Class AB amplifier 4. Class C amplifier. VI. In terms of tuning: 1. Single tuned amplifier 2. Double tuned amplifier 3. Stagger tuned amplifier. DECIBEL NOTATION: The power gain of an amplifier is expressed as the ratio of the output power to the input power. When we have more than one stage of amplification i.e. when the output of one stage becomes the input to the next stage, the overall gain has to be obtained by multiplying the gains of the individual stages. When large numbers are involved, this calculation becomes cumbersome. Also, when we have passive coupling networks between amplifier stages, there will be attenuation of the signal that is gain less than unity. To find the overall gain of a typical multistage 2 amplifier such as the one given below We have to multiply the various gains and attenuations. Moreover, when we wish to plot the gain of an amplifier versus frequency, using large numbers for plotting is not convenient. Hence it has been the practice to use a new unit called the decibel (usually abbreviated as dB) for measuring the power gain of a four terminal network. The power gain in decibels is given by G = 10 log10 P0 / Pi dB This new notation is also significant in the field of acoustics as the response of the human ear to sound intensity is found to be following this logarithmic pattern. The overall gain in decibel notation can be obtained for the amplifier gain of the figure1 by simply adding the decibel gains of the individual networks. If any network attenuates the signal, the gain will be less than the unity and the decibel gain will be negative. Thus the overall gain for the amplifier chain shown above is given by Overall gain = 10 – 6 + 30 – 10 + 20 = 44 dB The absolute power level of the output of an amplifier is sometimes specified in dBm, i.e. decibels with reference to a standard power power level, which is usually, 1 Mw dissipated in a 600 load. Therefore, if an amplifier has 100 Mw, its power level in dBm is equal to 10 log 100/1 = 20 dBm MULTISTAGE AMPLIFIERS: In real time applications, a single amplifier can’t provide enough output. Hence, two or more amplifier stages are cascaded (connected one after another) to provide greater output Such an arrangement is known as multistage amplifier Though the basic purpose of this arrangement is increase the overall gain, many new problems as a consequence of this, are to be taken care. For e.g. problems such as the interaction between stages due to impedance mismatch, cumulative hum & noise etc. MULTISTAGE VOLTAGE GAIN: The overall voltage gain A of cascaded amplifiers as shown below, is the product of the individual gains. (Refer to FIG.2) above. AT = Av1 Av2 Av3 ------------------Avn Where ‘n’ is the number of stages. P1: An amplifier has an input power of 5W. The power gain of the amplifier is 40 dB. Find the out power of the amplifier. SOLN: Power gain in Db = 10log10 P0 / Pi = 40. Hence P0 /Pi = antilog10 4 = 104 Output power P0 = Pi 104 = 5 104 W. 3 P2: An amplifier has at its input a signal power of 100 W and a noise power of 1W. The amplifier has a power gain of 20 dB. The noise contribution by the amplifier is 100W. Find (i) the input S/N ratio (ii) out S/N ratio (iii) noise power factor and (iv) noise figure of the amplifier. SOLN: Input S/N = 100/1 = 100 Power gain = 20 dB = ratio of 100 Hence output signal power = 100 100 W Output noise power = input noise power power gain + noise of amplifier = 1 100 + 100 = 200W S/N at output = 10000 / 200 = 50 Noise factor, F = (S/N)i / (S/N)0 = 100 / 50 = 2 Noise figure = 10 log F = 3 dB DISTORTION IN AMPLIFIERS: In any amplifier, ideally the output should be a faithful reproduction of the input. This is called fidelity. Of course there could be changes in the amplitude levels. However in practice this never happens. The output waveform tends to be different from the input. This is called as the distortion. The distortion may arise either from the inherent non – linearity in the transistor characteristics or from the influence of the associated circuit. The distortions are classified as: 1. Non – linear or amplitude distortion 2. Frequency distortion 3. Phase distortion 4. Inter modulation distortion NON – LINEAR DISTORTION: This is produced when the operation is over the non-linear part of the transfer characteristics of the transistor. (A plot between output v/s input is called as the transfer characteristics). Since the amplifier amplifies different parts of the input differently. For example, there can be compression of the positive half cycle and expansion of the negative half cycle. Sometimes, the waveform can become clipped also. (Flattening at the tips). Such a deviation from linear amplification produces frequencies in the output, which are not originally present in the output. Harmonics (multiples) of the input signal frequency are present in the output. The percentage harmonic distortion for the nth Harmonic is given by Dn = An (amplitude of the n the harmonic) 100% A1(amplitude of the fundamental) And the total harmonic distortion by 4 DT D2 D3 Dn 2 2 2 Where D2, D3 are harmonic components. A distortion factor meter measures the total distortion. The spectrum or wave analyzer can be used to measure the amplitude of each harmonic. FREQUENCY DISTORTION: A practical signal is usually complex (containing many frequencies). Frequency distortion occurs when the different frequency components in the input signal are amplified differently. This is due to the various frequency dependent reactances (capacitive & inductive) present in the circuit or the active devices (BJT or FET). PHASE DISTRIBUTION: This occurs due to different frequency components of the input signal suffering different phase shifts. The phase shifts are also due to reactive effects and the active devices. This causes problems in TV picture reception. To avoid this amplifier phase shift should be proportional to the frequency. INTERMODULATION DISTORTION: The harmonics introduced in the amplifier can combine with each other or with the original frequencies to produce new frequencies to produce new frequencies that are not harmonics of the fundamental. This is called inter modulation distortion. This distortion results in unpleasant hearing. FREQUENCY RESPONSE OF AN AMPLIFIER: Frequency response of an amplifier is a plot between gain & frequency. If the gain is constant (same) for all frequencies of the input signal, then this plot would be a flat line. But this never happens in practice. As explained earlier, there are different reactive effects present in the amplifier circuit and the active devices used. Infact there are external capacitors used for blocking, capacitors etc. Also, in tuned amplifiers, resonant LC circuits are connected in the collector circuits of the amplifier to get narrow band amplification around the resonant frequencies. Fig below shows a frequency response of a typical amplifier. 3 Where Amid = mid band voltage gain (in dB) 5 fL = Lower cut – off frequency. (in Hz) fH = Upper cut - off frequency (in Hz) Usually the frequency response of an amplifier is divided into three regions. (i) The mid band region or flat region, over which the gain is constant (ii) The lower frequency region. Here the amplifier behaves like a high pass filter, which is shown below. FIG .4 At high frequencies, the reactance of C1 will be small & hence it acts as a short without any attenuation (reduction in signal voltage) (iii) In the high frequency region above mid band, the circuit often behaves like the low pass filter as shown below. FIG.5 As the frequency is increased, the reactance of C2 decreases. Hence more voltage is dropped across Rs and less is available at the output. Thus the voltage gain of the amplifier decreases at high frequencies. LOW FREQUENCY RESPONSE: In the frequency below the mid band, the High pass filter as shown above can approximate the amplifier. Using Laplace variable‘s’ , the expression for output voltage can be written as: V0 s Vi s R1 s ----------- -(1) Vi s 1 1 R1 s sC1 R1C1 For real frequencies (s = j = 2f) , equation (1) becomes AVL(jf) = 1 / (1 - jfL / f) ---------------------------------------------(2) Where fL = 1 / (2R1C1 ) ----------------------------------------------(3) 6 The magnitude of the voltage gain is given by AVL jf 1 f 1 L f 2 -------------------------------------------- (4) The phase lead of the gain is given by L = tan –1(fL/f) -----------------------------------------------(5) 1 At f = fL, AVL 2 0.707 This is equal to 3 dB in log scale. For higher frequencies f >> f L, AL tends to unity. Hence, the magnitude of AVL falls of to 70.7 % of the mid band value at f = fL, Such a frequency is called the lower cut-off or lower 3 dB frequency. From equation (3) we see that fL is that frequency for which the resistance R1 Equals the capacitive reactance, XC 1 2f L C1 HIGH FREQUENCY RESPONSE: In the high frequency region, above the mid band , the amplifier stage can be approximated by the low pass circuit shown above.(fig 2 b). In terms complex variables, ‘s’ , the output voltage is given by V0 ( s) 1 sC 2 R2 1 sC 2 Vi ( s) 1 Vi s -------------------- (6) 1 sR2 C 2 In terms of frequency (i.e s = j = 2f) equation (2) becomes AH jf Where V0 s Vi s S j 2f fH 1 f 1 fH 1 . 2R2 C 2 H = - arc tan (f / fH ) 2 -------------------- (7) The phase of the gain is given by ------------------------------------(9) At f = fH, AH = (1/2) AV = 0.707AV, then fH is called the upper cut off or upper 3 dB frequency. It also represents the frequency at which the resistance R2 = Capacitive reactance of C2 = 1/ 2fHC2. Thus, we find that at frequencies fL & fH , the voltage gain falls to 1/2 of the mid band voltage gain. Hence the power gain falls to half the value obtained at the mid band. Therefore these frequencies are also called as half power frequencies or –3dB Frequency since log (1/2) = -3dB. 7 FREQUENCY RESPONSE PLOTS: The gain & phase plots versus frequency can be approximately sketched by using straight-line segments called asymptotes. Such plots are called Bode plots. Being in log scale, these plots are very convenient for evaluation of cascaded amplifiers. BANDWIDTH: The range of frequencies from fL to fH is called the bandwidth of the amplifier. The product of mid band gain and the 3dB Bandwidth of an amplifier is called the Gain-bandwidth product. It is figure of merit or performance measure for the amplifier. RC COUPLED AMPLIFIER: Fig. (1) above shows a two stage RC coupled CE amplifier using BJTs where as fig.(2) shows the FET version. The resistors RC & RB ( = R1R2 / (R1 + R2 ) and capacitors CC form the coupling network. Because of this, the arrangement is called as RC coupled amplifier. The bypass capacitors CE (= CS) are used to prevent loss of amplification due to –ve feedback. The junction capacitance Cj should be taken into account when high frequency operation is considered. 8 When an ac signal is applied to the input of the I stage, it is amplified by the active device (BJT or FET) and appears across the collector resistor RC / drain resistor RD. this output signal is connected to the input of the second stage through a coupling capacitor CC. The second stage doesn’t further amplification of the signal. In this way, the cascaded stages give a large output & the overall gain is equal to the product of this individual stage gains. ANALYSIS OF TWO STAGE RC COUPLED AMPLIFIER: This analysis is done using h parameter model. Assuming all capacitors are arbitrarily large and act as ac short circuits across RE. The dc power supply is also replaced by a short circuit. Their h parameter approximate models replace the transistors. 3 The parallel combination of resistors R1 and R2 is replaced by a single stage resistor RB. RB = R1 || R2 = R1R2/ (R1 + R2) For finding the overall gain of the two stage amplifier, we must know the gains of the individual stages. Current gain (Ai2): Ai = - hfe / (1 + hoe RL) Neglecting hoe as it is very small, Ai = -hfe Input resistance (Ri2): We know that Ri = hie + hreAi RL Hence, Ri = hie and Ri2 = hie Voltage gain (Av2): We know that Av = Ai RL/ Ri Av2 = - hfe RC2 / Ri2 Current gain (Ai1): Ai1 = -hfe Input resistance (Ri1): Ri1 = hie Voltage gain (Av1): AV = Ai RL / Ri1 Here RL = RC1 || RB || Ri2 AV1 = - hfe (RC1 || RB || Ri2 ) / Ri1 Overall gain (Av ): AV = AV1 X AV2 9 FEEDBACK AMPLIFIERS: Feedback is a common phenomenon in nature. It plays an important role in electronics & control systems. Feedback is a process whereby a portion of the output signal of the amplifier is feedback to the input of the amplifier. The feedback signal can be either a voltage or a current, being applied in series or shunt respectively with the input signal. The path over which the feedback is applied is the feedback loop. There are two types of feedback used in electronic circuits. (i) If the feedback voltage or current is in phase with the input signal and adds to its magnitude, the feedback is called positive or regenerative feedback.(ii) If the feedback voltage or current is opposite in phase to the input signal and opposes it , the feedback is called negative or regenerative feedback. We will be more interested to see how the characteristics of the amplifier get modified with feedback. CLASSIFICATION OF AMPLIFIERS: Before analyzing the concept of feedback, it is useful to classify amplifiers based on the magnitudes of the input & output impedances of an amplifier relative to the sources & load impedances respectively as (i) voltage (ii) current (iii) Tran conductance (iv) Tran resistance amplifiers. 1. VOLTAGE AMPLIFIER: The above figure shows a Thevenin’s equivalent circuit of an amplifier. If the input resistance of the amplifier Ri is large compared with the source resistance Rs, then Vi = Vs. If the external load RL is large compared with the output resistance R0 of the amplifier, then V0 = AV VS .This type of amplifier provides a voltage output proportional to the input voltage & the proportionality factor doesn’t depend on the magnitudes of the source and load resistances. Hence, this amplifier is known as voltage amplifier. An ideal voltage amplifier must have infinite resistance Ri and zero output resistance. 10 2. CURRENT AMPLIFIER: Above figure shows a Norton’s equivalent circuit of a current amplifier. If the input resistance of the amplifier Ri is very low compared to the source resistance RS, then Ii = IS. If the output resistance of the amplifier R0 is very large compared to external load RL, then IL = AiIi = Ai IS .This amplifier provides an output current proportional to the signal current and the proportionally is dependent of the source and load resistance. Hence, this amplifier is called a current amplifier. An ideal current amplifier must have zero input resistance & infinite output resistance. 3. TRANSCONDUCTANCE AMPLIFIER: The above figure shows the equivalent circuit of a transconductance amplifier. In this circuit, the output current I0 is proportional to the signal voltage VS and the proportionality factor is independent of the magnitudes of source and load resistances. An ideal transconductance amplifier must have an infinite resistance Ri & infinite output resistance R0. 11 4. TRANSRESISTANCE AMPLIFIER: Figure above shows the equivalent circuit of a transconductance amplifier. Here, the output voltage V 0 is proportional to the signal current IS and the proportionality factor is independent of magnitudes of source and loads resistances. If RS >>Ri , then Ii = IS , Output voltage V0 = RmIS . An ideal transconductance amplifier must have zero input resistance and zero output resistance. THE FEEDBACK CONCEPT: In each of the above discussed amplifiers, we can sample the output voltage or current by means of a suitable sampling network & this sampled portion is feedback to the input through a feedback network as shown below. RL All the input of the amplifier, the feedback signal is combined with the source signal through a unit called mixer. The signal source shown in the above figure can be either a voltage source VS or a current source. The feedback connection has three networks. (i) Sampling network (ii) Feedback network (iii) Mixer network 12 SAMPLING NETWORK: There are two ways to sample the output, depending on the required feedback parameter. The output voltage is sampled by connecting the feedback network in shunt with the output as shown in fig6.6 (a) below. This is called as voltage sampling. If the output current is sampled by connecting feedback network in series with the output (figure 6.6 (b)). (ii) FEEDBACK NETWORK: This is usually a passive two-port network consisting of resistors, capacitors and inductors. In case of a voltage shunt feedback, it provides a fraction of the output voltage as feedback signal Vf to the input of the mixer. The feedback voltage is given by Vf = V0 Where is called feedback factor. It lies between 0 & 1. (iii) MIXER: There are two ways of mixing the feedback signal with the input signal with the input signal as shown in figure . below. 13 When the feedback voltage is applied in series with the input voltage through the feedback network as shown in figure 6.7 (a) above, it is called series mixing. Otherwise, when the feedback voltage is applied in parallel to the input of the amplifier as shown in figure (b) above, it is called shunt feedback. GAIN OR TRANSFER RATIO: The ratio of the output signal to the input signal of the basic amplifier is represented by the symbol A , with proper suffix representing the different quantities. Transfer ratio V0 AV = Voltage gain Vi Transfer ratio I0 AI = Current gain Ii Ratio I0 V Gm = Transconductance Ratio i Rm = Transresistance Vi I0 A suffix ‘f’ is added to the above transfer ratios to get the corresponding quantities with feedback. AVf V0 = Voltage gain with feedback VS AIf GMf I0 = Transconductance with feedback VS RMf V0 = Transresistance with feedback IS I0 = Current gain with feedback IS TYPES OF FEEDBACK: Feedback amplifiers can be classified as positive or negative feedback depending on how the feedback signal gets added to the incoming signal. If the feedback signal is of the same sign as the incoming signal, they get added & this is called as positive feedback. On the other hand, if the feedback signal is in phase inverse with the incoming signal, they get subtracted from each other; it will be called as negative feedback amplifier. Positive feedback is employed in oscillators whereas negative feedback is used in amplifiers. FEATURE OF NEGATIVE FEEDBACK AMPLIFIERS: 1. Overall gain is reduced 2. Bandwidth is improved 3. Distortion is reduced 4. Stability is improved 5. Noise is reduced 14 ANALYSIS OF FEEDBACK AMPLIFIER: The analysis of the feedback amplifier can be carried out by replacing each active element (BJT, FET) by its small signal model and by writing Kirchoff’s loop or nodal equations. Consider the schematic representation of the feedback amplifier as shown below. The basic amplifier may be a voltage, transconductance, current or transresistance amplifier connected in a feedback configuration as shown in figures below. 15 The four basic types of feedback are: 5. Voltage –Series feedback 6. Current – Series feedback 7. Current – Shunt feedback 8. Voltage – Shunt feedback 1. GAIN WITH FEEDBACK: Consider the schematic representation of negative feedback amplifier as shown in fig.6.8.The source resistance RS to be part of the amplifier & transfer gain A (AV,Ai ,Gm , Rm ) includes the effect of the loading of the network upon the amplifier.The input signal XS, the output signal X0, the feedback signal Xf and the difference signal Xd , each represents either a voltage or a current and also the ratios A and as summarized below. Table 1. Voltage and Current signals in feedback amplifiers Signal or ratio Type of feed back Voltage series Current series Current shunt Voltage shunt X0 Voltage Current series Current Voltage XS Xf Xd Voltage Voltage Current Current Gm A1 Rm Vf / Io If/Io If / Vo A AV β Vf / Vo The gain, A = X0 / XS ---------------------------------------(1) The output of the mixer, Xd = Xs + (-Xf ) = Xi The feedback ratio , = Xf / X0 ----------------------------------- (2) ----------------------------------- (3) The overall gain (including the feedback) Af = X0 / XS ------------------------------------(4) 16 From equation (2), XS = Xi + Xf Af = X0 / (Xi + Xf) Dividing both numerator and denominator by Xi and simplifying, we get Af = A / (1 + A) ----------------------------------------- (5) Equation (5) indicates that the overall gain Af is less the open loop gain. The denominator term (1 + A) in equation (5) is called the loop gain. The forward path consists only of the basic amplifier, whereas the feedback is in the return path. 2. GAIN STABILITY: Gain of an amplifier depends on the factors such as temperature, operating point aging etc. It can be shown that the negative feedback tends to stabilize the gain. The ratio of fractional change in amplification with feedback to the fractional change without feedback is called the sensitivity of the gain Sensitivity of the gain = Af = dA f dA ------- (1) A --------(2) 1 A Differentiating equation (2) wrt A, dAf = (1 A )1 A dA = (1 A ) 2 1 dA 1 2 (1 A ) A f (1 A ) 2 Dividing both sides by Af , we get dA f Af i.e 1 1 dA dA dA 1 . = . 2 2 (1 A ) A (1 A ) (1 A ) ( A /(1 A ) Af dA f Af dA 1 A 1 A --------------- (3) ---------------------------- (4) Where dA f Af = Fractional change in gain with feedback dA = Fractional change in gain without feedback. A Here 1 is sensitivity. The reciprocal of the sensitivity is called the desensitivity D. 1 A The term desensitivity indicate the factor by which the gain has been reduced due to feedback. Desensitivity, D = 1 + A ------------------------ (5) 17 in Af = A A 1 A D If A >> 1, then Af = -------------- (6) 1 ------------------------(7) Hence the gain may be made to depend entirely on the feedback network. If the feedback network contains only stable passive elements, it is evident that the overall gain is stabilized. The same thing can be said about all other type of feedback amplifiers. 3. REDUCTION IN FREQUENCY DISTORTION: If the feedback network is purely resistive, the overall gain is then not a function of frequency even though the basic amplifier gain is frequency dependent. Under such conditions a substantial reduction in frequency & phase distortion is obtained. 4. NONLINEAR DISTORTION: Negative feedback tends to reduce the amount of noise and non-linear distortion. Suppose that a large amplitude signal is applied to an amplifier, so that the operation of the device extends slightly beyond its range of linear operation and as a consequence the output signal is distorted. Negative feedback is now introduced and the input signal is increased by the same amount by which the gain is reduced, so that the output signal amplitude remains the same. Assume that the second harmonic component, in the absence of feedback is B2. Because of feedback, a component B2f actually appears in the output. To find the relationship that exists between B2f& B2, it is noted that the output will contain the term –AβB2f , which arises from the component –βB2f that is feedback to the input. Thus the output contains two terms: B2, generated in the transistor and –AβB2f , which represents the effect of the feedback. Hence B2 – AβB2f = B2f B2f = B2 B 2 1 A D Thus, it is seen that, the negative feedback tends to reduce the second harmonic distortion by the factor (1+βA). 5. NOISE: Noise or hum components introduced into an amplifier inside the feedback loop are reduced by the feedback loop. Suppose there are two stages of amplifier with gains A1 & A 2 and noise or hum pick-up is introduced after the amplifier with gain A1 as shown in the fig. below 18 The output voltage can be expressed as V0 = A 1 A2 VS + A2 N – A1 A2 Vf = A1 A2 VS + A2N – A1 A2βV0 Hence Therefore V0 = 1 ( A1 A2VS A2 N 1 A1 A2 V0 = A1 A2 N VS 1 A1 A2 A1 The overall gain of the two stage amplifier is reduced by the factor 1 + A1A2β. In addition the noise output is reduced by the additional factor A1 which is the gain that precedes the introduction of noise. In a single stage amplifier, noise will be reduced by the factor 1/(1 + Aβ) just like distortion. But if signal-to-noise ratio has to improve, we have to increase the signal level at the input by the factor (1 + Aβ) to bring back the signal level to the same value as obtained without feedback. If we can assume that noise does not further increase when we increase the signal input, we can conclude that noise is reduced by the factor 1/(1+Aβ) due to feedback while the signal level is maintained constant. 19 1. EFFECT ON BANDWIDTH: The gain of the amplifier at high frequencies can be represented by the function A= Amid jf 1 f H --------------------------------------- (1) Where Amid is the mid and gain without feedback. Gain with feedback is given by Amid jf 1 f H Af = Amid 1 jf 1 fH Amid = 1 Amid jf fH -------------- (2) Dividing both numerator and denominator by (1+βAmid), we get Amid 1 Amid Af = jf 1 f H (1 Amid ) ) = Amidf jf 1 f Hf ----------------------------------- (3) Where Amidf = mid band gain = Amid 1 Amid -------------------------------- (4) And fHf = upper 3 dB frequency with feedback = fH(1+βAmid) ------------------------------------- (5) By a similar reasoning, we can show that the lower 3 dB frequency with feedback is given by fLf = fL 1 Amid ----------------------------------------------(6) Thus fH is multiplied by (1+Aβ) and fL is divided by (1+Aβ).Hence the bandwidth is improved by the factor (1+Aβ). Therefore negative feedback reduces the gain and increases the bandwidth by the same factor (1+Aβ) resulting in a constant gain-bandwidth product. Thus one can employ negative feedback to trade gain for bandwidth. 20 2. INPUT RESISTANCE: The introduction of feedback can greatly modify the impedance levels within a circuit. If feedback signal is added to the input in series with the applied voltage (regardless of whether the feedback signal is obtained by sampling output current or voltage) it increases the input resistance. Since the feedback voltage Vf opposes VS, input current Ii is less than it would have been without feedback. On the other hand, if the feedback signal is added to the input in shunt with the applied voltage, it decreases the input resistance. Since IS = Ii + If , then the current Ii is decreased from what it would be if thare was no feedback current. Hence Rif = Vi IR = i i is decreased because of feedback. IS IS (A) VOLTAGE SERIES FEEDBACK The topology of voltage series feedback is shown above, with the amplifier replaced by Thevenin’s model. Let AV be the open circuit voltage gain taking RS into account. From the above figure, the input resistance with feedback is given as Rif = VS ---------------------------------------------------- --- (1) Ii Applying KVL to the input circuit, we get VS = I i Ri + Vf Since V f = βV0 , VS = Ii Ri + β V0 ----------------------------- (2) But from the output circuit , 21 V0= AV Vi RL = AV Ii Ri ----------------------------------- -- (3) R0 RL = AV Vi Where AV = V0 A R V L ----------------------------------- (4) Vi R0 RL Where AV is the voltage gain without feedback taking the load RL into account. Input resistance with feedback is Rif = VS Ii ------------------------------------------ ------------(5) Substituting the value of VS from equation (2) I i Ri VO Ii Rif = Since VO = AV Vi Rif = I i Ri AV Vi = Ii Ri + βAVRi ------------------ (6) Thus the negative feedback increases the Ri by a factor (1+βAV). (B) CURRENT SERIES FEEDBACK: The topology for this amplifier is shown above. The input resistance for this circuit is given by Rif = VS ------------------------------------ (1) Ii Applying KVL to the input circuit VS = Ii Ri + Vf = Ii Ri + β I0 ---------------------- (2) The output current is given by, I0 = GmVi R0 = GMVi R0 RL Where GM = Gm R0 I = 0 R0 RL Vi --------------------- (3) --------------------- (4) Note that Gm is the short transconductance without feedback taking the load RL into account. Input resistance with feedback is given by Rif = VS -------------------------------------- (5) Ii Substituting the value of VS from equation (2), we gat Rif = I i Ri I 0 Ii Since I0 = GMVi 22 Rif = I i Ri GM Vi = Ri + βGM Ri Ii Rif = Ri(1+βGM) --------------------------------(6) Hence for series mixing Rif > Ri (C) CURRENT SHUNT FEEDBACK: The topology for this amplifier is shown above. Here the amplifier is replaced by by Norton’s model .Let Ai represent the short-circuit current gain taking RS into account. Applying KCL to the input node IS = Ii + If = Ii + βI0 (1) Ai I i R0 = AIIi ---------------- (2) R0 R L Output voltage, V0 = Where AI = ------------------------------------------------- Ai R0 R0 RL = I0 ------------------------- (3) Ii Note that AI represents the current gain without feedback taking the load RL into account. Input resistance with feedback is given by, Rif = Vi --------------------------------------- (4) IS Substituting the value of IS from equation (1) Rif = Vi I i I 0 Since I0 = AIIi Rif = Ri ------------------------- (5) 1 AI 23 (D) VOLTAGE- SHUNT FEEDBACK: The topology for this configuration is shown above, in which the amplifier input circuit replaced by Norton’s model and output circuit replaced by Thevenin’s model. Here Rm is the open circuit transresistance. Applying KCL to the input node, we get IS = Ii + If = Ii + βI0 -------------------------------- (1) By voltage divider rule , the output voltage is given by V0 = R m I i R0 R0 RL ------------------------------------- (2) = RM Ii ------------------------------------------- (3) Where RM = Rm R0 I = 0 ----------- ----------- (4) R0 RL Ii is the transresistance without feedback ,taking the load RL into account. Input resistance with feedback is given by Rif = Vi ------------------------------------------------ (5) IS Substituting the value of IS from equation (1) Rif = Vi Vi = I i I 0 I i RM I i Rif = (I0 = RMIi) Vi I i I RM Thus Rif = Ri ---------------------------------- (6) 1 RM Thus, it is evident from the above analysis that, for series configuration, the input resistance gets multiplied by (1+ A), whereas for shunt configurations, the input resistance gets divided by (1+βA). 24 3. OUTPUT RESISTANCE: It will be shown that the voltage feedback tends to decrease the output resistance whereas current feedback tends to increase the output resistance. (A) VOLTAGE-SERIES FEEDBACK: In this topology, the output resistance can be measured by shorting the input source (i.e VS = 0) and looking into the output terminals with RL disconnected as shown above. Applying KVL to the output circuit, AV Vi +IR0 – V = 0 Or I= Since the input is shorted, Vi = -Vf = -βV --------------------------------------------- (2) Substituting the value of Vi = βV I= V AV Vi ----------------------------------------------- (1) R0 in equation (1), we get V AV V V AV V V 1 AV = = ------------------- (3) R0 R0 R0 The the output resistance with feedback is given by R0f = V I From equation (3) , R0f = R0 ------------------------- (4) 1 AV Where AV is the open-circuit voltage gain. The output resistance with feedback which includes RL as part of the amplifier is given by, R’0f = R0f I I RL = Rof RL R0 f R L R’0f Where AV = Substituting for Rof and simplifying we get, R '0 ------------------------------ (5) 1 AV AV RL R0 RL 25 OUTPUT RESISTANCE WITH FEEDBACK (B) VOLTAGE SHUNT FEEDBACK: In this topology, the output resistance can be measured by opening the input source (i.e. I0 = 0) and looking into the output terminals with RL disconnected as shown above. Applying KVL to the output circuit, we have Rm Ii +IR0 = 0 I V Rm I i ---------------------------------- (1) R0 Since the input is shorted Ii = -If = -βV -------------------------------- (2) Substituting the value of Ii in equation (1),we get I= V Rm V V Rm V V 1 Rm = = --------- (3) R0 R0 R0 The output resistance with feedback is given by R= V I From equation (3) , Rof = R0 --------------------------- (4) 1 Rm Rm is the open loop transresistance without taking RL into account. The output resistance with feedback which includes RL as part of the amplifier is given by, R’0f = Rof I I RL = R0 f R L R0 f R L From equation (4), 26 --------(5) R0 1 Rm R0 RL R’0f = RL = R0 RL 1 Rm R0 RL 1 Rm Dividing Numerator and Denominator by (R0 +RL), we get R’0f R0 RL R0 RL = Rm R L 1 R0 R L Since R’of = R0 I I RL is the output resistance without feedback R’0f = R '0 Rm R L 1 R0 R L Where RM = = R '0 ------------------------------ (6) 1 RM Rm R L is the transresistance without feedback taking the load into account. R0 RL (C). CURRENT SHUNT FEEDBACK: In this topology, the output resistance can be measured by opening the input source .i.e. IS = 0 and looking into the output terminals, with load RL disconnected as shown in the above figure. Applying KCL to the output node, I= V - Ai Ii R0 ------------------------------ (1) The input current is given by Ii = -If = I 0 ( I S 0 ) 27 But I = -I0 , Ii = I ------------------------(2) Substituting the value of Ii in equation (1), we get V Ai I R0 I= I(1+ Ai ) = V ----------------------------(3) R0 Output resistance with feedback is given by , R0f = V I From equation (3) Rof = R0 1 A ---------------------------- (4) Ai is the short circuit gain without taking load RL into account. The output resistance accounting for RL, is given by R’of = R0f I I RL = Rof R L Rof R L -----------(5) From equation (4), R’0f = R0 1 Ai RL R0 RL (1 Ai ) = R0 1 Ai RL R0 RL Ai Ro Dividing Numerator and Denominator by (R0 + RL) , we get 1 Ai R0 RL R’of = R0 RL Ai R0 1 R0 RL Since R’0 = R0 I I RL is the output resistance without feedback. R’of = R ' 0 (1 Ai ) Ai R0 1 R0 R L R ' 0 1 Ai = ---------------------------------(6) 1 AI Where AI = Ai R0 is the current gain without feedback taking the load RL into account. R0 RL 28 (D) CURRENT SERIES FEEDBACK: In this topology, the output resistance can be measured by shorting the input source (i.e VS = 0) and looking into the output terminals with RL disconnected. As shown above. Applying KCL to the output node I= V G mV i R0 -------------------------- (1) The input voltage is given by Vi = -Vf = I 0 Since I = -I0,Vi = I ------------------------------- (2) Substituting the value of Vi from equation (2) in equation (1), we get I= or V Gm I R0 I(1+Gm ) = V R0 ------------------(3) The output resistance with feedback given by R0f = V I From equation (3), Rof = Ro(1+ Gm ) -----------------------(4) Where Gm is the short circuit transconductance without taking RL into account. The output resistance R’of which includes RL as part of the amplifier is given by R’of = Rof I I RL = R0 f R L R0 f R L ---------------------(5) From equation (4) 29 R0 1 Gm RL R0 1 Gm RL R’0f = 1 Gm R0 RL = R0 RL Gm R0 Dividing numerator and denominator by (R0 +RL), we get R’0f = 1 Gm R0 RL R0 RL 1 Gm R0 R0 RL Since R’0f = R0 I I RL is the output resistance of the amplifier without feedback R 1 Gm R’0f = 0 Gm R0 1 R0 RL ' R ' 0 1 Gm = ---------------------------------------------- (6) 1 GM Where GM = Gm R0 is the transconductance without feedback taking the load RL into account. R0 RL PROBLEMS P1. An amplifier has an open loop gain of 500 and a feedback of 0.1.If open loop gain changes by 20% due to change in the temperature, find the %change in the closed loop gain . SOLN: Given A = 500, β= 0.1 & dA 20 A Change in closed loop gain = 20 X dA f Af dA 1 A 1 A 1 = 0.3921 or 39.21% 1 500 X 0.1 P2. An amplifier has a voltage gain of 200.The gain is reduced to 50, when negative feedback is applied. Determine the reverse transmission factor and express the amount of feedback in dB. SOLN: Given A = 200, Af = 50 We know Af = i.e. 50 = A 1 A 200 1 200 0.015 30 Feedback factor in dB N = 20 log10 1 = 20 log10 A 1 A Af 1 = 20 log10 1 200 X 0.015 = -12.042 dB. P3. For the circuit shown above with RC = 4K, RL = 4K, RB = 20K, RS = 1K and the transistor parameters are hie = 1.1 K, hfe = 50, hre = 2.5 X 10-4 and hoe = 24 µS. Find the (a) current gain (b) voltage gain (c) transconductance (d) transresistance. (e) the input resistance seen by the source and (f) the output resistance seen by the load. Neglect all capacitive effects. SOLN: The ac equivalent circuit is shown below. RL (a) From the above circuit, Current gain Ai = I I I IL = i . b. L IS I S Ii Ib 31 Ii RS I S RS Ri Where And input resistance Ri = Rb I I hie = 20K I I 1.1 K = Then 20 X 1.1 = 1.04 K 20 1.1 Ii 1 1K = 2.04 I S 1K 1.04 K Ib RB = 0.95 I i RB hie RC IL 4 = -50 X = -25 h fe 44 Ib RC RL Ai = IL 1 X 0.95X 25 11.65 I S 2.04 (b)Voltage gain, AV = V0 I R R 4K = L L = Ai L 11.65 46.6 VS I S RS RS 1K (c) Transconductance: Gm = I L V0 1 V0 1 . X VS RL VS VS RL = AV X 1 1 46.6 X RS 4K = -11.65 mA/V (.d) Transresistance: Rm = V0 RS V .V0 RS . 0 I S VS VS = 1K X (-46.6) = -46.6K (e).Input resistance: Ri = RB I I hie = 20K I I 1.4K = 1.04K (f) Output resistance: R0 = RC I I 1 = 4K I I 40K = 3.64 K h0 e P4. An amplifier with open loop voltage gain, AV = 1000 100 is available .It is have an amplifier where voltage gain varies by no more than 0.1% . Find the (a) feedback ratio and (b) the gain with feedback. 32 necessary to SOLN: Given AV = 1000 100 , (a) dA f Af dA f Af 0.1% 1 dA 1 A A Substituting the values 0.1 1 100 1 1 X X 100 1 A 1000 1 A 10 1 A 100 and 99 0.099 1000 (b) Voltage gain with feedback Af = A 1000 10 1 A 1 0.099 X 1000 P5. An amplifier without feedback gives a fundamental output of 36 V with 7% second harmonic distortion when the input is 0.028 V. 9. If 1.2% of the output is fedback to the input in a negative series feedback circuit , what is the output voltage? 10. If the fundamental output is maintained at 36 V but the second harmonic distortion is reduced to 1%, what is the input voltage? SOLN: Given V0 = 36V, Vi = 0.028V D =7 D0 f Vf = 1.2% , (a) Voltage gain, A = V0 36 1285 Vi 0.028 Feedback ratio, β = Af = Vf V0 1.2 0.012 100 A 1285 78.2 1 A 1 0.012 X 1285 Output voltage, V0f = A fVS = 78.2 X 0.028 = 2.19V (b)If the output is maintained constant at 36 V, then the distortion generated by The device is unchanged. The reduction in the total distortion is due to feedback. D0f = D 1 A 1 A D 7 D0 f 33 A 6 Af = VS = A 1285 1 A 7 V0 36 = 0.196 V V f 1285 7 P.6 The output resistance of a voltage series feedback amplifier is 10 .If the gain of the basic amplifier is 100 and the feedback fraction is 0.01, what is the output resistance of the amplifier with out feedback ?. SOLN: Given R0f = 10A = 100, β = 0.01. R0f = R0 1 A With out feedback, R0 = R0f (1+βA) = 10 (1+0.01 X 100) = 20 . 7. The input and output voltages of an amplifier are 1mV& 1V respectively. If the gain with negative feedback is 100 and input resistance without feedback (Voltage series feedback) is 2 K.Find the feedback fraction and input resistance with feedback. SOLN: Given VS = 1mV, V0=1V, Af = 100, Ri = 2K. Open circuit voltage gain, A = Gain with feedback, Af = (1+βA) = V0 1V 1000 VS 1mV A 1 A A 1000 10 Af 100 = 0.009 Input resistance with feedback, Rif = Ri(1+βA) = 2K X 10 = 20 P8. If an amplifier has a bandwidth of 200 KHz and voltage gain of 80.What will be the bandwidth and gain if 5% negative feedback is introduced ?. SOLN: Given BW = 200 KHz, A = 80, β = 5% = 0.05. Af = A 80 16 1 A 1 0.05 X 80 BWf = (1+βA) BW = (1+80X0.05)200 X 103 = 1MHz. 34 new P9. An amplifier has a normal gain of 1000 and harmonic distortion of 10%. If 1% inverse feedback is applied, find the gain with feedback and the distortion in the presence of feedback. SOLN: Feedback factor, β= Gain with feedback,Af = 1 0.01 100 A 1000 90.9 1 A 1 1000 X 0.01 Distortion with feedback, Df = D 1 A 10 0.909% 1 0.01X 1000 = P10. An amplifier gain changes by 10% .Using negative feedback, the amplifier is to be modified to yield a gain of 100 with 0.1% variation. Find the required open loop gain of the amplifier and the amount of negative feedback. SOLN: We have dA f Af dA 1 X A 1 A dA 10% 100 Improvement in gain stability = 1+βA = A dA f 0 .1 % Af Hence, Open loop gain = (Closed loop gain )(1+βA) = (100)100 = 104 Amount of negative feedback required A 100 1) 0.0099. A 10 4 P11. An amplifier with an open loop voltage gain of 2000 delivers 20 W of power at 10% second harmonic distortion when input signal is 10 mV. If 40 dB negative voltage series feedback is applied and the out power is to remain at 10W, determine the (a) required input signal (b) percentage harmonic distortion. SOLN: (a) -40 dB 20 log 10 1 1 A = -20log10 1 A 1 A 100 Af A 1 A 200 20 100 35 When the amplifier delivers 20W, it’s output voltage is’ V0 = A X VS = 2000 X (10 X 10-3) = 20 W. If the output power is to remain at 10W, then the output voltage also must remain at 10W. Hence the input signal required when feedback is applied will be’ VS = V0 20 1V Af 20 (b)The distortion of the amplifier with feedback will be reduced by the factor 1 A . Df = 10% 0.1% 100 POWER AMPLIFIERS An amplifying system usually has several cascaded stages. The input and intermediate stages are small signal amplifiers. Their function is only to amplify the input signal to a suitable value. The last stage usually drives a transducer such as a loud speaker, CRT, Servomotor etc. Hence this last stage amplifier must be capable of handling and deliver appreciable power to the load. These large signal amplifiers are called as power amplifiers. Power amplifiers are classified according to the class operation, which is decided by the location of the quiescent point on the device characteristics. The different classes of operation are: (i) Class A (ii) Class B (iii) Class AB ((iv) Class C CLASS A OPERATION: 36 A simple transistor amplifier that supplies power to a pure resistive load RL is shown above. Let iC represent the total instantaneous collector current, ic designate the instantaneous variation from the quiescent value of IC. Similarly, iB ,ib and IB represent corresponding base currents. The total instantaneous collector to emitter voltage is given by vc and instantaneous variation from the quiescent value VC is represented by vc. Let us assume that the static output characteristics are equidistant for equal increments of input base current ib as shown in fig. below. If the input signal ib is a sinusoid , the output current and voltage are also sinusoidal.Under these conditions, the non-linear distortion is neglible and the power output may be found graphically as follows. P =VcIc = Ic2 RL ------------------------------ (1) Where Vc & Ic are the rms values of the output voltage and current respectively.The numerical values of Vc and Ic can be determined graphically in terms of the maximum and minimum voltage and current swings.It is seen that Ic Im 2 I max I min ---------------------------- (2) 2 2 and Vc Vm 2 Vmax Vmin 2 2 2 ------------------------- (3) 2 V I I R V Power, Pac = m m m L m ----------------- (4) 2 2 2 RL This can also be written as, Pac = Vmax Vmin I max I min --------------(5) 8 37 DC power Pdc = VCC ICQ Pac Vmax Vmin I max I min Pdc 8VCC I CQ MAXIMUM EFFICIENCY: For a maximum swing, refer the figure below. Vmax VCC & Vmin 0 I max 2 I CQ & I min 0 max VCC 2 I CQ 8VCC I CQ 25% SECOND HARMONIC DISTORTION: In the previous section, the active device (BJT) is treated as a perfectly linear device. But in general, the dynamic transfer characteristics are not a straight line. This non-linearity arises because of the static output characteristics are not equidistant straight lines for constant increments of input excitation. If the dynamic curve is non-linear over the operating range, the waveform of the output differs from that of the input signal. Distortion of this type is called nonlinear or amplitude distortion. To investigate the magnitude of this distortion, we assume that the dynamic curve with respect to the quiescent point ‘Q’ can be represented by a parabola rather than a straight line as shown below. 38 Thus instead of relating the alternating output current ic with the input excitation ib by the equation ic = Gib resulting from a linear circuit. We assume that the relationship between ic and ib is given more accurately by the expression ic = G1ib + G2ib2 -----------------------------------------(1) where the G’ s are constants. Actually these two terms are the beginning of a power series expansion of ic as a function of ib. If the input waveform is sinusoidal and of the form ib = Ibm Cos t --------------------------------------------(2) Substituting equation (3), into equation (2)’ ic = G1Ibm Cos t + G2 Ibm2 Cos2 t Since Cos 2t 1 1 Cos2t , the expression for the instantaneous total current 2 2 reduces the form, iC = IC + ic =IC +B0 + B1 Cos t + B2 Cos 2t ------------------------ (3) Where B’s are constants which may be evaluated in terms of the G’s. The physical meaning of this equation is evident. It shows that the application of a sinusoidal signal on a parabolic dynamic characteristic results in an output current which contains, in addition to a term of the same frequency as the input, a second harmonic term and also a constant current. This constant term B0 adds to the original dc value IC to yield a total dc component of current IC +B0.Thus the parabolic nonlinear distortion introduces into the output a component whose frequency is twice that of the sinusoidal input excitation. The amplitudes B0, B1 & B2 for a given load resistor are readily determined from either the static or the dynamic characteristics. From fig. 7.2 above, we observe that When ωt = 0, ic = Imax 39 ωt= π /2, ic = IC ωt = π, ---------------------------------------------------------------------------------(4) ic = Imin By substituting thase values in equation (4)’ Imax = IC +B0 +B1+ B2 IC = IC + B0 –B2 ------------------------------------------------------- (5) Imin = IC +B0 –B1+B2 This set of three equations determines the three unknowns B0, B1 & B2. It follows from the second group that B0 = B2 --------------------------------------------------------------------(6) By subtracting the third equation from the first, B1 = I max I min --- -----------------------------------------------------(7) 2 Then from the first or last of equation (6), B2 = B0 = I max I min 2Ic ------------------------------------------- (8) 4 The second harmonic distortion D2 is defined as, D2 = B2 B1 ------------------------------------------------------------ (9) If the dynamic characteristics is given by the parabolic form & if the input contains two frequencies ω 1 & ω2, then the output will consist of a dc term & sinusoidal components of frequencies ω1, ω2, 2ω1,2ω2 , ω1+ω2 and ω1-ω2.The sum & difference frequencies are called intermodulation or combination frequencies. HIGHER ORDER HARMONIC GENERATION The analysis of the previous section assumed a parabolic dynamic characteric.But this approximation is usually valid for amplifier where the swing is small. For a power amplifier with a large input swing, it is necessary to express the dynamic transfer curve with respect to the Q point by a power series of the form, ic G1ib G2 i 2 b G3i 3 b + ---------------------------------- (1) If the input wave is a simple cosine function of time, then ib I bmCost --------------------------------------------- (2) Then, ic B0 B1Cost B2 Cos2t B3Cos3t (3) Where B0, B2, B3 – are the coefficients in the Fourier series for the current. i.e. the total output current is given by iC I CQ ic = I CQ B0 B1Cost B2 Cos2t (4) 40 Where ( I CQ B0 is the dc component. Since iC is an even function of time, the Fourier series in equation (4) representing a periodic function possessing the symmetry, contains only Cosine terms. Suppose we assume as an approximation that harmonics higher than the fourth are negligible in the above Fourier series, then we have five unknown terms B0, B1 , B2 , B3, & B4 .To evaluate those we need output currents at five different value of I B. Let us assume that iC 2iCost ----------------------------- (5) Hence, I B I BQ 2iCost ----------------------------------- - (6) At t 0, At t 3 At t At t I B I BQ 2i , , I B I BQ i , iC I max ------------------- (7) iC I 1 ------------------- ---(8) 2 2 , I B I BQ , 2 , I B I BQ i , 3 At t , I B I BQ 2i , iC I CQ -------------------- (9) iC I 1 2 ---------------------(10) iC I min ----------------------(11) By combining equations (4) & (7) to (11), we get five equations & solving them, we get the following relations, B0 B1 1 I max 2 I 1 2 I 1 I min - I CQ ------------------------- (12) 6 2 2 1 I max I 1 I 1 I min 3 2 2 ----------------------------------- (13) 41 B2 1 I max 2 I CQ I min 4 B3 1 I max 2 I 1 2 I 1 I min ------------------------------ (15) 6 2 2 B4 1 I max 4 I 1 6 I CQ 4 I 1 I min -------------------- (16) 12 2 2 --------------------------------------- (14) The harmonic distortion is defined as, B2 D2 B1 , D3 B3 B1 , D4 B4 B1 -----------------------------(17) Where D n represents the distortion of the n th harmonic. Since this method uses five points on the output waveform to obtain the amplitudes of harmonics, the method is known as the five point method of determining the higher order harmonic distortion. POWER OUTPUT DUE TO DISTORTION If the distortion is not negligible, the power delivered to the load at the fundamental frequency is given by 2 P1 B1 RL 2 --------------------------------- (1) The ac power output is, Pac B1 B2 B3 2 2 2 R2 L = 1 D2 D3 P1 2 2 -------- (2) --------- (3) Where D2 , D3 etc are the second, third harmonic distortions. Hence, Pac 1 D 2 P1 -------------------------------- (4) Where D is the total distortion factor & is given by D D2 D3 D4 --------- (5) 2 2 2 For e.g. if D 10% of the fundamental, then Pac 1 0.1 P1 2 Pac 1.01P1 ---------------------------------------- (6) When the total distortion is 10%, the power output is only 1%.higher than the fundamental power. Thus, only a small error is made in using only the fundamental term P1 for calculating the output power. 42 THE TRANSFORMER COUPLED AUDIO POWER AMPLIER The main reason for the poor efficiency of a direct-coupled classA amplifier is the large amount of dc power that the resistive load in collector dissipates. This problem can be solved by using a transformer for coupling the load. TRANDFORMER IMPEDANCE MATCHING Assume that the transformer is ideal and there are no losses in the transformer. The resistance seen looking into the primary of the transformer is related to the resistance connected across the secondary .The impedance matching properties follow the basic transformer relation. V1 N1 V2 and N2 I1 N2 I2 N1 ----------------------------------- (1) Where V1 Primary voltage, V2 Secondary voltage. I 1 Primary current, V2 Secondary current. N1 No. of turns in the primary. N 2 No. of turns in the secondary. From Eq. (1) N1 V2 2 N 1 V2 V1 N 2 I1 N 2 N 2 I 2 I 2 N1 V1 1 2 I1 n V2 --------------------------------------------- (2) I2 43 As both V1 V2 are resistive terms, we can write & I1 I 2 2 ' RL N 1 2 R L 1 R L --------------------- (3) n N2 In an ideal transformer, there is no primary drop.Thus the supply voltage VCC appears as the collector-emitter voltage of the transistor. i.e. VCC VCE ------------------------------------ (4) When the values of the resistance RB(= R1I I R2) and VCC are known, the base current at the operating point may be calculated by the equation. IB VCC VBE VCC ---------------------- (5) RB RB OPERATING POINT: Operating point is obtained graphically at the point of intersection of the dc load line and the transistor base current curve. After the operating point is determined; the next step is to construct the ac load line passing through this point. 44 AC LOAD LINE: In order to draw the ac load line, first calculate the load resistance looking into the primary side of the transformer. The effective load resistance is calculated using Eq.(3) from the values of the secondary load resistance and transformer ratio. Having obtained the value of R ' L , the ac loads line must be drawn so that it passes through the operating point Q and has a slope equal to 1 . The dc and the ac load R'L lines along the operating point Q are shown. In the above figure, two ac load lines are drawn through Q for different values of R ' L . For R ' L very small, the voltage swing and hence the output power ‘P’, approaches zero.For R ' L very large, the current swing is small and again ‘P’ approaches zero.The variation of power & distortion wrto load resistance is shown in the plot below. EFFICIENCY: Assume that the amplifier as supplying power to a pure resistance load. Then the average power input from the dc supply ic VCC I C . The power absorbed by the output circuit is, I C R1 I CVce , where 2 I C & Vce are the rms output current & voltage respectively & R1 is the static load resistance. If PD is the average power dissipated by the active device, then by the principle of conservation.of energy, VCC I C I C R1 I CVce PD ------------ (1) 2 Since VCC VCEQ I C Vce I c , PD may be written in the form, PD VCEQ I C Vce I c ---------------------- (2) If the load is not pure resistance, then Vce I e must be replaced by Vce I c must be replaced by Vce I c Cos , where Cos is the power factor of the load. 45 The above equation expresses the amount of power that must be dissipated by the active device. If the ac output power is zero i.e. If no applied signal exists, then PD VCE I C % Efficiency, -------------------------------- (3) acoutputpower X 100 -------------- (4) dcpowerinput 1 2 ' B1 R L 2 X 100% --------------- (5) In general, VCC I C B0 In the distortion components are neglected, then 1 Vm I m V I 2 % X 100 50 m m -------------------- (6) VCC I C VCC I C MAXIMUM EFFICIENCY: An approximate expression for efficiency can be obtained by assuming ideal characteristic curves. Referring to above fig., maximum values of the sine wave output voltage is, Vm And Vmax Vmin 2 -------------------------- (7) I m I CQ ----------------------------------- (8) The rms value of collector voltage, 46 Vrms I rms Similarly, Vm 2 Vmax Vmin 2 2 I max I min 2 2 -------------- (9) --------------------- (10) The output power is, Pac Vrms .I rms Vmax Vmax Vmin I max I min . 2 2 2 2 Vmin . I max I min ----------------(11) 8 The input power is, Pdc VCC .I CQ Pac Vmax Vmin I max I min -------------(12) Pdc 8VCC I CQ The efficiency of a transformer coupled class A amplifier can also be expressed as, Vmax Vmin Vmax Vmin 50 % -------------------------- (13) The efficiency will be maximum when Vmin 0 , I min 0,Vmax 2Vcc & I max 2 I CQ , substituting these values in eq.(12), we get max 2VCC .2 I CQ 8VCC .I CQ X 100 50% ----------------- (14) In practice, the efficiency of class A power amplifier is less than 50% due to losses in the transformer winding. DRAWBACKS: (1) Total harmonic distortion is very high. (2) The output transformer is subject to saturation problem due to the dc current in the primary. 47 PUSH-PULL AMPLIFIER: The distortion introduced by the non-linearity of the dynamic transfer characteristic may be eliminated by a circuit known as a known as push-pull configuration. It employs two active devices and requires input signals 180 degrees out of phase with each other. The above figure shows a transformer coupled push-pull amplifier. The circuit consists of two centre tapped transformers T1 & T2 and two identical transistors Q1 and Q2.The input transformer T1 does the phase splitting. It provides signals of opposite polarity to the transistor inputs. The output transformer T 2 is required to couple the ac output signal from the collector to the load. On application of a sinusoidal signal, one transistor amplifies the positive half-cycle of the input, whereas the other transistor amplifies the negative half cycle of the same signal. When a transistor is operated as class-B amplifier, the bias point should be fixed at cut-off so that practically no base current flows without an applied signal. Consider an input signal (base current of the form ib1 I bmCost applied to Q1 . The output current of this transistor is given as, i1 I C B0 B1Cost B2 Cos2t B3Cos3t --------- (1) The corresponding input signal to Q2 is ib 2 ib1 I bmCost The output current of this transistor is obtained by replacing t by t in expression for i1 . i.e. i2 (t ) i1 (t ) ------------------ (2) i2 I C B0 B1Cost = I C B0 B1Cost B2 Cos2t B3Cos3t -- (3) 48 As illustrated in the above fig., the current i1 & i2 are in opposite directions through the output transformer windings. The total output current is the proportional to the difference between the collector currents in the two transistors. i.e. i k i1 i2 2k B1Cost B3Cos3t -------- (4) This expression shows that a push-pull circuit cancels out all even harmonics in the output and will leave the third harmonic as the principal source of distortion. This is true only when the two transistors are identical. If their characteristics differ appreciably, the even harmonics may appear. ADVANTAGES OF PUSH-PULL SYSTEM: Because no even harmonics are present in the output of a push-pull amplifier ,such a circuit will give more output per active device for given amount of distortion. Also, a push-pull arrangement may be used to obtain less distortion for given power output per transistor. It can be noticed that the dc component of the collector current oppose each other magnetically in the transformer core. This eliminates any tendency towards core saturation and consequent non-linear distortion that might arise from the curvature of the magnetization curve. Another advantage of this system is that the effects of ripple voltages that may be contained in the power supply because of inadequate filtering will be balanced out. This cancellation results because the currents produced by this ripple voltage are in opposite directions in the transformer winding and so will not appear in the load. CLASS-B AMPLIFIER The circuit for the class-B push pull system is the same as that for the class A system except that the devices are biased approximately at cut-off. The above circuit (class A) operates in class B if R2 =0 because a silicon transistor is essentially at cut –off if the base is shorted to the emitter. ADVANTAGES OF CLASS B OPERATION (1) It is possible to obtain greater power output (2) Efficiency is higher (3) Negligible power loss at no signal. DRAWBACKS OF CLASS B AMPLIFIER (1) Harmonic distortion is higher (2) Self bias can’t be used (3) Supply voltage must have good regulation 49 POWER CONSIDERATION. To investigate the power conversion efficiency of the system, it is assumed that the output characteristics are equally spaces for equal intervals of excitation, so that the dynamic transfer curve is a straight line. It also assumes that the minimum current is zero. The graphical construction from which to determine the output current & voltage wave3shapes for a single transistor operating as a class B stage is indicated in the above figure. Note that for sinusoidal excitation, the output is sinusoidal during one half of each period and is zero during the second half cycle. The effective load resistance is R '' L N 1 N2 2 R L where N1 represents the number of primary turn to the center tap. The waveform illustrated in the above figure represents one transistor Q1 only. The output of Q2 is, of course, a series of sine loop pulses that are 180 degrees out of phase with those of Q1.The load current, which is proportional to the difference between the two collector currents, is therefore a perfect sine wave for the ideal conditions assumed. The power output is P I m I m I m VCC Vmin -------------------------- (1) 2 2 The corresponding direct collector current ion each transistor under load is the average value of the half sine loop since I dc Im for this waveform, the dc input power from the supply is, Pi 2 I mVCC ----------------------- (2) The factor 2 in this expression arises because two transistors are used in the push-pull system. From equations (1) and (2) , 50 P0 Vm Vmin X 100 1 Pi 4 VCC 4 V CC X 100% Since Vmin VCC 4 X 100% 78.5% ---------------------- (3) The large value of results from the fact that there is no current in a class B system if there is no excitation, where as there is a drain from the power supply in class A system even at zero signal. POWER DISSIPATION The power dissipation PC in both transistors is the difference between the ac power output and dc power input. PC Pdc Pac Pi P0 2 = = 2 VCC I m Vm I m 2 2 VCC Vm Vm ---------------------------- (5) R ' L 2 RL ' This equation shows that the collector dissipation is zero at no signal Vm 0 , Rises as Vm is increases and passes through a maximum at Vm 2VCC . MAXIMUM POWER DISSIPATION The condition for maximum power dissipation can be found by differentiating eq.(5) wrt Vm and equating it to zero. dPC 2V 2 VCC m' 0 ' dVm RL 2 RL Vm RL ' 2 VCC RL ' Vm 2 VCC ----------------------------------- (6) Substituting the value of Vm in eq.(5), we get 2 P PC ,max 2 VCC 2 1 2 VCC VCC X ' ' RL 2 RL = 4VCC 2 2 RL ' 2 VCC 2 2 RL ' = 2 VCC 2 2 RL ' ------------- (7) 51 Output power, P0 Vm 2 2 RL ' When Vm VCC P0,max VCC 2 2 RL ' ----------------------------------------- (8) Equation (7) can be written as PC ,max 2 4 VCC 2 2 RL ' PC ,max 4 2 4 2 P0,max P0,max 0.4 P0,max ---------------------- (9) Equation (9) gives the maximum power dissipated by both the transistors and therefore the maximum power dissipation per transistor is, PC ,max per transistor = PC ,max 2 . 4 P0,max 0.2 P0,max 2 2 ----- (10) If, for e.g. 10W maximum power is to be delivered from a class B push-pull amplifier to the load, then power dissipation ratio of each transistor should be 0.2 X 10W=2W. HARMONIC DISTORTION The output of a push-pull system always possesses mirror symmetry, so that I 1 I 2 1 2 We know that B0 B1 1 I max 2 I 1 2 I 1 I min I C 6 2 2 1 I max I 1 I 1 I min 3 2 2 B2 1 I max 2 I C I min 4 B3 1 I max 2 I 1 2 I 1 I min 6 2 2 B4 1 I max 4 I 1 6 I C 4 I 1 I min 12 2 2 When I C 0, I max I min & I 1 I 2 1 2 , the above equations reduce to 52 I C 0, I max I min & B0 B2 B4 0 B1 ----------------------- (11) 2 I max I 1 ------------------------ (12) 3 2 1 B3 I max 2 I 1 ------------------------ (13) 3 2 Note that there is no even harmonic distortion. The major contribution to distortion is the third harmonic and is given by , D3 B3 B1 100% ------------------------- (14) The output power taking distortion into account is given by P0 1 D3 2 2 B1 RL 2 ' --------------------- (15) SPECIAL CIRCUITS Fig 3 A circuit that avoids using the output transformer is shown above. This configuration requires a power supply whose centre tap is grounded. Here, high powered transistors are used. They have a collector to emitter output impedance in the order of 4 to 8 .This allows single ended push-pull operation. The voltage developed across the load is again due to the difference in collector currents i1 i2 , so this is a true push-pull application. 53 PROBLEMS P1. Calculate the input power and efficiency of the amplifier shown below for an input Voltage resulting in a base current of 10mA peak. Also calculate the power dissipated by the transistor. SOLN: The Q point for the given circuit is determined as follows. IB VCC VBE 20 0.7 19.3mA RB 1X 10 3 I C I B 25 X 19.3mA 482.5mA VCE VCC I C RC 20 482.5 X 10 3 X 20 10.35V I C ( peak ) I B ( peak ) 25 X 10mA 250mA I Pac CPEAK 0.625W 2 Input power, Pdc VCC I C 20 X 482.5 X 10 3 9.6W Efficiency, Pac 0.625 X 100% 6.48% Pdc 9.65 Power dissipated by the transistor, PC Pdc Pac 9.65 0.625 9.025W P2: A class A power amplifier with a direct coupled load has a collector efficiency of 30% and delivers a power input of 10W.Find (a) the dc power input (b) the power dissipation `of full output and (C) the desirable power dissipation rating of the BJT. SOLN: Given Pac 10W , 30% 0.30 54 Pac Pdc (a) Pdc Pac 10 33.33W 0.3 (b) Dissipation at full output, PC 33.33 5 28.33W (c) Dissipation at no output, PC Pdc 33.33W ' BJT rating = 33.33W P3: A BJT supplies 0.85 W to a 4K load. The zero signal dc collector current is 31 mA. Determine the percent second harmonic distortion. SOLN: Given P 0.85W , I C , Zero 31mA RL 4k, I C , signal 34mA Using the dynamic characteristics of the transistor, ic G1ib G2 i 2 b We have B0 I C signal I C nosignal =34-31=3mA 2 B1 RL 2P 2 orB1 2 RL Power, P B1 2 2 X 0.85 430 X 10 6 4K B1 20.6mA Or The second harmonic distortions, B2 D2 B1 X 100% 3mA X 100% 14.6% 20.6mA P4. Design a class B push pull circuit to deliver 200mW to a 4 load. Output transformer efficiency is 70%., VCE=25V, average rating of the transistor to be used is 165Mw at 25 0 C .Determine VCC , collector to collector resistance RCC’ SOLN: Given Pac=200mW, RL=4 , 0.7 , VCE(max) =25V, Ptrans=165mW, at 250C,RE=10 . Assume Pac that Pac max the given power delivered to 200 285.714mW on primary of transformer. 0.7 55 the load is maximum. Maximum voltage rating per transistor is 2VCC. VCC =12.5V. Let VCC=12V 2 Pacprimary 1 VCC 2 R' L 122 1 VCC X 252 2 Pacprimary 285.714 X 10 3 2 R' L 2 N R But R' L 2L 1 RL n N2 n2 RL 4 0.125 R' L 252 N1 8 N2 P5: A single stage, class A amplifier has VCC=20V, VCEQ = 10V, ICQ= 600mA, and ac output current is varied by 300mA with the ac input signal. Determine the (a) power supplied by the dc source to the amplifier circuit (b) dc power consumed by the load resistor (c) ac power developed across the load resistor (d) dc power delivered to the transistor (e) dc power wasted in the transistor collector (f) overall efficiency (g) collector efficiency. SOLN: Given VCC = 20V, VCEQ=10V, ICQ = 600Ma, RL = 16 , Imax= 300Ma (a) Power supplied by the dc source to the amplifier circuit is given by Pdc = VCC .ICQ=20X0.6=12W (b) DC power consumed by the load resistor is given by PLdc = (ICQ)2 RL = (0.6)2X16 = 5.76 W (c) AC power developed across the load resistor is Pac. I Im 2 0.3 2 Pac I 2 RL 0.212 16 0.72W 0.212 2 (d) DC power delivered to the transistor’ Ptr dc Pdc PLdc 12 5.76 6.24W (e) DC Power wasted in the transistor collected is Pdc Ptr dc Pac 6.24 0.72 5.52W (f) Overall efficiency, Pac 0.72 0.06 6% Pdc 12 (g) Collector efficiency, C Pac 0.72 11.5% Ptr dc 6.24 56 OPAMP APPLICATIONS INTRODUCTION: OPAMP is a very versatile IC.The name itself indicates that almost all the mathematical operations (e.g. Addition, substraction, multiplication, averaging, integration & differentiation etc) can be easily realized using this IC chip. Analog computers, which existed before the onset of digital computers, were built using these IC’s only. Also almost all the circuits that are realized using discrete devices like BJT, FET etc can be designed using OPAMP.Applications of the OPAMP can be broadly classified as open loop & closed loop depending on whether there is a feedback connection between the input and output. Some of the important and widely used circuits are discussed here. INSTRUMENTAION AMPLIFIER: Basically it is a difference amplifier. It is employed to control the industrial parameters like pressure; temperature etc. A transducer converts these parameters into equivalent electrical voltage. This is then applied to the instrumentation amplifier, which boosts the signal level to drive the display devices. An instrumentation amplifier must meet the following requirements. (i) Low-level signal amplification: The instrumentation amplifiers should amplify signals of very small amplitude. Hence they should have very high gain. Also, the gain should be stable. (ii) Low noise: As the signals involved are very weak, the instrumentation amplifiers must contribute minimum noise, otherwise, it may interfere with the signals. The instrumentation amplifier beng a differential amplifier they are capable of rejecting the noise common to both the inputs. (iii) Low thermal drift. The environment in which the instrumentation amplifiers are employed may have lot of temperature fluctuations. Hence the parameters of these amplifiers must be thermally stable. (iv) High input impedance: To avoid loading effect on the input source, the instrumentation amplifiers must have high input impedance. THREE OPAMP INSTRUMENTATION AMPLIFIERS: This is a high impedance amplifier using cross-coupled difference amplifiers. A1 & A2 in the above figure are non-inverting amplifiers. As all the OPAMPS are assumed to have infinite Zi ,their i/p current is zero. 57 EXPRESSION FOR VOLTAGE GAIN: From the above figure, we can write VA V2 & VB V1 V VB --------------- (1) I A R2 But VA V2 & VB V1 V V1 --------------------- (2) I 2 R2 But V1 V01 & V2 V02 Since A1 &A2 are unity gain amplifiers. V V2 V01 V1 V2 V02 ---------- (3) I 1 R2 R1 R1 V01 V1 V1 V2 1 V 1 V1 2 ----- (4) R1 R1 R2 R2 R1 R2 R2 R R V01 1 1 V1 1 V2 ---------------------- (5) R2 R2 Similarly, V02 V2 V1 V2 V 1 1 1 V2 R1 R1 R2 R2 R2 R1 R2 R R1 V1 1 1 V2 ------------------ (6) R2 R2 Output voltage of the first stage is R R 2R R R V02 V01 1 V1 1 1 V2 1 1 V1 1 V2 1 1 V2 V1 -----------(7) R2 R2 R2 R2 R2 V02 Gain of the first stage V VO1 2R AV 1 02 1 1 -------------------------- (8) V2 V1 R2 Second stage is a differential amplifier with a gain of R AV 2 4 ------------------------------------------- (9) R3 Overall gain of the instrumentation amplifier is 2R R AV AV 1 AV 2 1 1 4 ---------- (10) R2 R3 Hence by varying R2, the overall gain can be linearly varied. Output voltage, V0 AV V1 V2 ---------- (11) ADVANTAGES OF INSTRUMENTATION AMPLIFIERS: The gain can be adjusted precisely by varying a single resistor. Input impedance is very high as it depends on two unity gain buffers A1&A2 This circuit can reject any common mode signals such as noise due to high CMRR of the three amplifier stages A1, A2, &A3. 58 P1. Calculate the gain of the configuration shown below. SOLN: Overall gain of this circuit is 2R R AV 1 1 4 R2 R3 Substituting the given values, 2 10 22 AV 1 292 2 10 P2. For the instrumentation amplifier of p1 above, calculate the output voltage if V1 = 2mV & V2 = 1mV. SOLN: (i) Referring to above fig, output amplifier A1 is R R V02 1 V1 1 1 V2 R2 R2 Substituting the different values 10 10 V02 2mV 1 1mV 4mV -------------- (1) 2 2 (ii) Again from the above figure, R R V01 1 1 V1 1 V2 R2 R2 Substituting the values, 10 10 V01 1 2mV 1mV 7mV 2 2 (iii) V01 &V02 are the inputs to the difference amplifier A3. Output voltage can be calculated using superposition theorem. (a)Assume V02 = 0 & calculate the output V0’ only R R4 22 22 V0’= 1 4 V01 1 7mV 15.4mV . 10 10 22 R3 R3 R4 (b) Assume V01 = 0 & calculate the output V0’’due to V02 only. R 22 '' V0 4 V02 4mV ) 8.8mV R3 10 (iv) Total output voltage, ' '' V0 V0 V0 15.4 8.8 29.2mV 59 INSTRUMENTATION AMPLIFIER USING TRANSDUCER BRIDGE: Above figure shows a differential instrumentation amplifier using a transducer bridge. Resistance RT is a resistance of which changes proportional with some physical quantity Such as temperature, pressure, light intensity etc. RT is the resistance of the transducer & R is the change in the resistance RT. A DC or AC voltage source can excite the bridge. Under balanced conditions Va Vb ------------------ (1) RA Vdc R A RT RB Vb Vdc RB RC RA RB Vdc V RA RT RB RC dc But Va R A RB R A RC R A RB RB RT R A RC RB RT RC RT ------------------------ (2) RB R A (Under balanced condition) The values of RA,RB& RC are such that they are equal to RT at a particular value of the physical quantity being measured. This value is decided by the designer depending on the transducer characteristics. 60 INSTRUMENTATION AMPLIFIER WITH DUAL OP-AMPS: The above figure shows an instrumentation amplifier using only two opamps. 1.A1 is a non-inverting amplifier. Hence, it’s output voltage is given by R V01 1 3 Vin1 ---------------------------------------- (1) R4 2. V01 is applied to the inverting terminal of A2.Hence, it’s output voltage can be obtained with the help of superposition theorem by considering V01 & V02 separately. 3. Output voltage considering only V01, R R R ' V0 2 V01 2 1 3 Vin1 --------------------- (2) R1 R1 R4 Output voltage considering only Vin2 is --------------------------------------- (3) R '' V0 1 2 Vin2 R1 4. Output voltage, V0 V0 V0 , substituting the values, ' " R3 R2 1 Vin1 1 Vin2 R4 R1 R 1 3 R4 R2 Vin 2 Vin1 ------------------ (4) =1 R1 R1 1 R2 5. The circuit works as a true difference amplifier if R1 R3 R2 R4 V0 R2 R1 R So that V0 1 2 (Vin2 Vin1 ) -------------------- (5) R1 61 OPAMP AS A COMPARATOR: Comparator is basically a circuit which compares the signals applied to it’s inputs. Let the voltage applied at the non-inverting input be denoted by VP & that applied at the inverting terminal be VN. Then the output voltage V0 is, V0 VOH if VP > VN V0 V0 L if VP<VN The voltage transfer characteristics of an ideal comparator is shown in fig.(b) above. It is basically a plot between differential voltage Vd V/S V0. The above characteristics can be expressed as, V0 V0 H for Vd >0 V0 V0 L for Vd <0 OPAMP in open-loop mode is used as comparator. It compares a signal voltage applied to one of it’s input, with a known or reference voltage applied to the other input as shown below. 62 The output will be either +Vsat or -Vsat depending on Vi -Vref . The OPAMP comparator can be either inverting or non-inverting type. NON-INVERTING COMPARATOR: The schematic diagram of a non-inverting comparator is shown above. The reference voltage is applied to the inverting terminal & the signal to be compared is applied to non-inverting terminal. Because of the high input impedance of the OPAMP, the current through resistors R1&R2 almost zero and hence the voltage drop across them will be nearly zero. Hence V1=Vin & V2 = Vref .The differential input voltage is, Vd V1 V2 Vin Vref ------------------------ (1) When Vin Vref , the inverting terminal is at higher potential than the non-inverting terminal is at higher potential than the non-inverting terminal. As the Vd is negative, OPAMP output will swing to -Vsat. Similarly, for Vin Vref , Vd i s positive & output will swing to +Vsat .The waveforms are shown below. For OPAMPs working with single power supply, the comparator output will be unipolar. are shown below. SCHMITT TRIGGER: (REGENERATIVE COMPARATOR) This circuit uses a positive or regenerative feedback. The resistance divider network R1 R2 facilitates for positive feedback. OPERATION OF THE CIRCUIT: The voltage developed across R2 will serve as the reference voltage. R2 V1 V ---------------------------(1) R1 R2 0 There are two different triggering levels for Schmitt-Trigger i.e. UTP& LTP. The output voltage V0 switches whenever the input voltage crosses the value of Vi ,which forces a transition from +Vsat to -Vsat in the output voltage. Similarly the lower trigger level is the value of Vin ,which forces a transition from +Vsat to -Vsat .These threshold levels can be given as, 63 UTP R2 Vsat (2) R1 R2 LTP R2 (Vsat ) (3) R1 R2 The waveforms & the transfer characteristics for the Schmitt trigger are shown below. HYSTERISIS: The hysteresis or backlash for a comparator occurs when a positive feedback is employed. It is defined as the difference between the turn-on and turn-ff input voltage. Due to hysteresis, the comparator makes transitions between high state and low state. VH UTP LTP R2 Vsat Vsat R1 R2 R2 2V R1 R2 sat. P1: Design a Schmitt trigger using IC741, such that the hysteresis will be 6V. Use supply of 10V . We have, 2 R2 V R1 R2 sat Let Vsat 10V 2 R2 6 10 R1 R2 VH R2 0.3 R1 R2 R2 0.3R1 0.3R2 3 R1 7 LetR1 10 K R2 R2 3 10 4.3K 7 64 In the OPAMP comparator shown above, supply voltages are 12V & Vsat 0.9VCC if a sine wave of 10V is applied, calculate the threshold levels & plot the input & output waveforms. SOLN: We have R2 1 Vsat 0.9 12) 2.16V R1 R2 1 4 R2 LTP Vsat 1 R1 R2 = 0.9 12 2.16V 1 4 UTP The waveforms are shown above. CLIPPING CIRCUITS USING OPAMP: Clipping circuits are used for removing a portion of the input signal. Clippers can be positive or negative depending on which part of the input signal is clipped off. POSITIVE CLIPPER: 65 Above fig. Shows the circuit diagram & waveform for a positive clipper using OPAMP.The potentiometer P is used to adjust the reference voltage. The reference voltage Vref has been adjusted to say +1.5V, by using the pot. P. When Vi is positive but less than Vref , the diode D will conduct as it is forward biased. If the diode is assumed to be identical, it will act as a short circuit & force the circuit to operate as a voltage follower. V0 Vin for Vin Vref ----------- (1) As soon as the positive input exceeds Vref , the diode is reverse biased. Hence it acts like an open circuit and isolates the OPAMP output from the load .The output voltage is equal to Vref. V0 Vref for Vin Vref --------- (2) During the negative half cycle of the input, the diode is forward biased & hence conducts to make V0 Vin . V0 Vin --------------- Vin 0 ---------(3) Thus the positive half cycle of the input is clipped particularly or fully depending on the amplitude of Vref. For Vref = 0, we get only the negative half cycle at the output. 66 OPAMP APPLICATIONS NEGATIVE CLIPPER: The above figures show the circuit diagram & waveforms for a clipper circuit. Here the diode is reversed compared to +ve clipper. The negative half cycle of the input gets clipped partially or fully depending on the magnitude of the Vref CLAMPERS USING OPAMP: A clamper is a circuit used to shift dc level of the input signal. It adds a desired dc level to the ac input voltage. If the added dc level is positive, it is called as a +ve clamper. Otherwise negative clamping if the added dc level is negative. 67 The above figures show the circuit diagram & waveforms for a clamper circuit. The potentiometer ‘p’ is used to vary the reference voltage applied to the non-inverting terminal of the OPAMP. The waveforms to be clamped is applied to the inverting terminal & the dc reference voltage is applied to the non-inverting terminal of the OPAMP.As both the inputs are non-zero; the circuit can be analyzed using superposition theorem. With only +Vref given to the non-inverting terminal (assuming Vin =0), the OPAMP output is positive, the diode ‘D’ is forward biased and the output is, V0 ‘=Vref When Vin is +ve, the OPAMP output will be negative. The diode will be reverse biased and the capacitor can’t discharge, as there is no discharge path for it. Output becomes V0’’=Vm +Vin Total output is V0 = V0’+V0’’=Vref + Vm +Vin In this expression Vref +Vm is the fixed dc level added to the input signal. Note: In the above circuit, a battery Vref can also be used instead of the pot. For negative clamping, the is to be reverse biased. ABSOLUTE VALUE OUTPUT CIRCUIT: This circuit is used for wave shaping of the input signals. Output of this circuit will be always positive, irrespective of the polarity of the input signal. 68 PEAK DETECTOR USING OPAMP: This is a non-linear application of the OPAMP.Output of this circuit fllows the peak value of the input signal and retain it infinitely. Peak detectors can be positive or negative type. Positive peak detector: Above figures show the circuit diagram equivalent circuits and waveforms. Operation of the circuit: The OPAMP workas as a voltage follower & hence the gain is 1.Diode ‘D’ will be forward biased only in the positive half cycle of the input, hence this circuit is sensitivity only positive input voltages. Diode ‘D’ is assumed to be ideal and the output is taken across the capacitor. i.e. V0 = VCC. Track mode: Initially capacitor is discharged i.e. V0 = 0. Hence in the first positive half cycle of the input, the diode is forward biased and the capacitor charges to the +ve peak of the input. Hold mode: Now as the Vin decreases, diode is reverse biased. There is no way for the capacitor to discharge; hence it holds the peak value of Vin. In the next positive half cycle, diode is forward biased as soon as Vin rises above the capacitor voltage. Thus the capacitor now charges to a new higher peak value as shown in fig (b) above. It should be noted that the capacitor will charge only to a new higher value. If the new peak value of the input is less than the existing VC, then the output will not change. This is because the diode remains reverse biased. The MOSFET switch across the capacitor is to reset the circuit. By turning on this switch momentarily, the capacitor can be discharged completely. 69 By reversing the diode, the same circuit can work as a negative peak detector. Note: Peak detectors are used in instrumentation, AM detectors etc. SAMPLE & HOLD CIRCUIT USING OPAMP: The sample & hold circuit is used to hold the sampled value of the input signal for a specified period of time. Thus S/H operation has two different processes: sampling the input signal and holding the latest sample value. BASIC SAMPLE & HOLD CIRCUIT: The above figure shows the minimum circuitry required for a sample & hold circuit. The circuit operation in either of the modes (sampling & holding) depending on the position of the switch. Sampling mode: In this mode, the switch is in the closed position and the capacitor charges to the instantaneous input voltage. Hold mode: In this mode, the switch is in the open position. The capacitor is now disconnected from the input. As there is no path for the capacitor to discharge, it will hold the voltage on it just before opening the switch. The capacitor will hold this voltage till the next sampling instant. 70 Figures above show the sample and hold circuit using OPAMP and the relevant waveforms. The MOSFET driven by a control voltage VC acts as a switch. Operation: When VC is high, MOSFET is turned ON and acts like a closed switch. The capacitor charges through the MOSFET to the instantaneous input voltage. As soon as V C =0, the MOSFET turns off and the capacitor is disconnected from OPAMP1 output capacitor can’t discharge through amplifier A2 due to it’s high input impedance. This is the hold mode and the capacitor holds the latest sample value. Waveforms for both these modes have been shown above. Applications: In the pulse modulation schemes In ADC circuits. ACTIVE FILTERS USING OPAMP: Filters are frequency selective circuits.They are required to pass a specific band of frequencies and attenuate frequencies outside the band. Filters using an active device like OPAMP are called active filters.Other way to design filters is using passive components like resistor, capacitor and inductor. ADVANTAGES OF ACTIVE FILTERS: 1. Possible to incorporate variable gain 2. Due to high Zi & Z0 of the OPAMP, active filters donot load the input source or load. 3. Flexible design. FREQUENCY RESPONSE OF FILTERS: Gain of a filter is given as, G V0 Vi (1) Ideal & practical frequency responses of different types of filters are shown below. 71 72 I-ORDER LPF: In I order LPF which is also known as one pole LPF. Butterworth filter and it’s frequency response are shown above. This circuit uses a RC & values decide the cut-off frequency of the filter, where as the resistors R1 & RF will decide it’s gain in pass band. As the OPAMP is used in the non-inverting configuration, the closed loop gain of the filter is given by RF R1 EXPRESSION FOR THE GAIN OF THE FILTER: AVF 1 Voltage across the capacitor is, V1 jX C Vin (1) R jX C Reactance of the capacitor is, XC 1 2fC Equation (1) becomes 1 j Vin 2fC jVin Vin V1 (2) 1 2fRC j 1 2fRC R j j 2fC Vin 1 j 2fRC Output of the filter is R Vin V0 AVF V1 1 F R1 1 j 2fRC = AVF f 1 j fH Where fH = cut-off frequency. V0 Vin 73 DESIGN PROCEDURE: Step1: Choose the cut-off frequency fH Step2: Select a value of ‘C’ (Approximately between o.001 & 0.1µF) Step3: Calculate the value of R using 1 R 2f H C Step4: Select resistors R1 & R2 depending on the desired pass band gain. Eg1. For a first ordr Butterworth LPF, calculate the cut –off frequency if R=10K & C=0.001µF.Also calculate the pass band voltage gain if R1=10K RF =100K . 1 1 15.915KHz SOLN: (1) f H 3 2RC 2 10 10 0.001 10 6 R 100K (2) AVF 1 F 1 11 R1 10K Eg2. Design a I order LPF for the following specification (i) Pass band voltage gain = 2 (ii) Cut off frequency, fC = 10KHz. Soln: Given AVF = 2 Let RF = 10K AVF 1 (i) RF R1 RF 1 & R F R1 10 K R1 (ii) Let C = 0.001µF 1 1 1 fH &R 3 2RC 2f H C 2 10 10 0.001 10 6 R=15.9K I ORDER HPF: Circuit diagram & frequency response are shown above. Again RC components decide the cut off frequency of the HPF where as R F & R1 decide the closed loop gain. 74 EXPRESSION FOR THE GAIN: V1 Voltage R Vin R jX C WhereX C V1 R R j 2fC Vin 1 2fC R R 1 j 2fC R j 2fC V 1 j 2fRC in f j fL V = in f 1 j fl jf AVF fL V Output voltage, V0 AVF .V1 f in 1 j fL jf AVF V fL Gain = 0 Vin f 1 j fL Magnitude is given as V0 AVF 2 Vin fL 1 f Phase angle is given as V0 V 0 Vin Vin 75 NARROW BAND PASS FILTERS: This circuit uses only one OPAMP. Frequency response of this filter is also shown above. This is a band pass filter with a small bandwidth. Bandwidth is equal to fH - fL. Normally we design the narrow band pass filter for specific values of center frequency fC and the Q factor of the filter. DESIGN EQUATIONS: 1. Select C1 = C2 =C Q R1 2. 2f C CAF Q 3. R2 2f C C 2Q 2 AF Q 4. RB f C C 5. A is the gain at f =fC R AF 3 2R1 6. Condition on gain AF 2Q 2 76 BAND REJECT FILTERS: These filters attenuate a specific range of frequencies & pass the rest of frequencies. Circuit diagram & frequency response of a notch filter are shown above. These are used in communication & biomedical instrumentation for eliminating the undesired frequencies. DESIGN STEPS: (1) Select a capacitor ‘C’ of value less than 1µF 1 (2) Calculate R 2f N C Eg: Design an active notch filter for rejecting the mains frequency of 50Hz. SOLN: Given fN = 50Hz. 1. Choose the capacitor C= 0.47µF 1 1 6.8K 2. R 2f N C 2 50 0.47 10 6 ALL PASS FILTER: It is a special type of filter which passes all the frequency components of the input signal to output without any attenuation. But it introduces a predictable phase shift for different frequency of the input signal. The all pass filters are also called as delay equalizers or phase correctors. 77 OPAMP APPLICATIONS ADC & DAC: Most of the physical quantities such as temperature, pressure, displacement, vibration etc exist in analog form. But it is difficult to process, store or transmit the analog signal because errors get introduced easily. Hence to enable these signals to be processed digitally, these are to be represented in equivalent digital form. Hence the need for ADC. Again, after processing is over, the digital signals are to be converted into equivalent analog signals for human observations or activation of further circuits.For this, we need DAC. There are two major types of DAC. (i) Binary weighted resistor DAC (ii) R-2R ladder type DAC. BINARY WEIGHTED RESISTOR AC: Above figure shows a binary weighted resistor type DAC. Basically it uses a network of binary resistors & a summing amplifier. There is ‘n’ number of switches, one per digit. For e.g. when bit d 1 =1, the first switch connects the 21R to a negative reference voltage (-VR) and so on. Depending upon the position of various switches, the current I1 to In start flowing through the resistors 21 to 2n R respectively. Output voltage of this circuit is given as RF (d1 2 1 d 2 2 2 d n 2 n ) R The graph of digital input versus output voltage V0 is plotted. V0 VR 78 ADVANTAGES: (i) Simple to construct (ii) Economic DISADVANTAGES: (i) Accuracy & stability of this ADC depends on the resistors (ii) A wide range of resistors required (iii) Finite resistance of the switches may disturb the currents. R-2R LADDER DAC: This circuit employs only two values of resistors. Output of this circuit is given by R 2R VR VFS V0 F Vin R 4 2 Ri 79 ADVANTAGES OF R/2R LADDER DAC’s 1. Easier to build, as only two values of resistors are needed. 2. It is possible to increase the no. of bits just by adding more sections of same R/2R values. Eg. The basic step size of a 4 bit DAC is 312.5mV.If 0000 represents 0V, calculate the output voltage produced for the digital input of 1101. SOLN: DAC output is given by V0 VFS d1 2 1 d 2 2 2 d n 2 n Here n=4, V0 VFS d1 2 1 d 2 2 2 d 3 2 3 d 4 2 4 ----------------------- (1) Basic step size is d1d 2 d 3 d 4 0001 Substituting into equation (2) V0 VFS 0 2 1 0 2 2 0 2 3 1 2 4 V V Basic step size, V0 FS FS 24 16 But given that basic step size = 312.5Mv V 312.5 10 3 FS 16 3 V FS 312.5 10 16 5V Now for the input 1101 V0 5 1 2 1 1 2 2 0 2 3 1 2 4 4.0625V analog ----------------------- (2) DAC SPECIFICATIONS: For selecting a particular DAC we have to consuder following specifications 1. Resolution 2. Accuracy 3. Linearity 4. Temperature 5. Settling time 6. Speed Resolution: This is defined as the smallest possible change in the analog output voltage.It’s value depends on the number of bits in the digital input applied to DAC.Higher the number of bits, higher is the resolution. Accuracy: This indicates how close the analog output voltage is to it’s theoretical value. Thus, accuracy indicates the deviation of actual output from the theoretical value.It depends on the accuracy of the resistors used in the ladder. Accuracy is given in terms of % of the full scale output of the DAC. Linearity: It describes the relationship between digital input and analog output.Also it is a measure of how well the output responds to increase in the input. Temperature sensibility: This describes how well the DAC can withstand the changes in the temperature. Settling Time: Ideally, the analog output voltage should change instantaneously in response to the change in it’s digital input. But in practice, the output doesn’t change instantaneously. Due to resistors & OPAMP in the 80 circuit, oscillations are observed at the output. The time required to settle the analog output within ½ LSB of the final value after the change in digital input is called as settling time. This should be as small as possible. Speed: It is the time needed for conversion from digital to analog. Also, it is the number of conversions that can be performed per second. Sources of Errors in DAC’s: There are three major types of errors in DASC’s. (i)Linearity error: This is the amount by which the actual output of A DAC differs from the ideal straight line transfer characteristics. (ii)Offset error: When all the inputs to a DAC are zero, ideally the analog output is zero.But in practice this doesn’t happen. This may lead to the offset voltages of OPAMP & leakage currents in the switches. (iii) Gain Error: DAC employs current to voltage converter. Gain of this, determines the analog output of the DAC.Gain error is the difference between the calculated gain & the practical gain. ADC: ADC converts the input analog voltage V A is converted into an ‘n’ bit digital word.It’s function is exactly opposite to that of ADC The input voltage VA is converted into an equivalent digital output given as, D d1 2 1 d 2 2 2 d n 2 n -------------------------- (1) In addition to the analog input voltage VA, the ADC block has a reference. Voltage VR, input & two control lines SOC&EOC.The SOC input is used to start th A to D conversion where as the EOC output goes high to indicate that the conversion is complete. TYPES OF ADC’s: Based on the method employed, ADC’s are classified as’ 1. Flash ADC 2. Counter type ADC 3. Successive approximation ADC 4. Dual slope ADC (Integrator type) 81 Successive Approximation ADC: The above figure shows the block diagram of a successive approximation ADC. ORERATION: 1. The SAR receives the comparator output, clock & SOC signals & produces an n-bit digital output along with the EOC signal. 2. As soon as we initiate the SOC input, the SAR will set MSB, d1 = 1 with all the other bits to zero. Thus the trial code at the SAR output is 1000 0000 for an 8 bit ADC. This trial code is then applied to a DAC. T he DAC output VD is applied to the comparator.If trial code is less than the correct digital representation then comparator output goes high which is applied to SAR. 3. In response to high comparator output, the MSB ‘d1’ is maintained at ‘1’ and the next lower significant bit ‘d2’ is made ‘1’.The trial code at the SAR output now becomes 1100 0000. The corresponding DAC output is compared with VA and the process continues as explained in step (ii). 4. However for the first trial code of 1000 0000 only if VA < VD , then the comparator output will go low. The SAR will respond to it by resetting it’s MSB bit d1 =0 and making the next bit d2 =1 so that the new trial code is 0100 0000. 5. This procedure is repeated for all the subsequent bits one at a time, until all bit positions are tested. 6. As soon as the DAC output VD crosses VA (i.e. VD >VA ), the comparator changes state & this is taken as end of conversion command. ADVANTAGES: 1. The conversion time is equal to the ‘n’ clock cycle period for an n-bit ADC.Thus it is very short. 2. Conversion time is constant and independent of the amplitude of analog signal . ADC Characteristics: The important characteristics of ADC are (i) Resolution (ii) Conversion time (iii) Quantization error. Resolution: It can be defined as the ratio of the change in the value of the input analog voltage V A required to change the digital output by 1LSB. V Hence Resolution = n FS 2 1 Conversion time: It is the time required to convert the analog input signal into a corresponding digital output.The conversion time depends on the conversion techniques for ADC.Also, the conversion time depends on the propagation delays introduced by the circuit components. Conversion time should be as low as possible. 82 Quantization error: When an analog signal is converted into digital, there will be some approximation due to rounding of errors. This is called as quantization error.This is called as quantization error. It can be reduced by increasing the no’ of bits. VOLTAGE REGULATORS: Electronic circuits need dc voltages for biasing. But the power available every where is ac. Hence the ac is first converted into DC. The rectifier does this function. The rectifier output contains ripples, which can be eliminated by filters. Again, the output of a dc power supply varies with changes in load current as well as line voltage. Hence, there is a need to regulate the output voltage inspire of the changes. This is performed by the voltage regulator. A block diagram of a power supply is shown below. \ Three terminal IC Regulators: The discrete voltage regulators using zener are not much used in practice.Now a days, the voltage regulator circuits are available in the form of IC ‘s. Advantages of IC regulators: 1. Design of power supply become easy & quick. 2. IC regulators are cheap. 3. Being small in size, IC regulators make the power supply compact. 4. They have fatures such as programmable output, facility to boost the output voltage or current, internal protections such as thermal set down etc. Regulators have only 3 pins. Hence they are called as 3 pin regulators. 3 Pin IC regulators can be of fixed type or adjustable type. Both can be either +ve & -ve. 83 Above figure shows the common & V0. blockdiagram of a 3 pin IC regulatorThe three terminals used are V in, Operation: 1. The resistors R1 & R2 form the sampling N/W to produce the feedback signal proportional to the output voltage. 2. The internally generated reference voltage is compared with the feedback signal, to produce the control signal. 3. The control signal is routed through the thermal set down & current limiting block to the series pass transistor, which is acting as the control element. The voltage across the control element is varied by the control signal to get a constant output voltage. 4. The thermal shut down & current limiting block provides the protection against increased internal temperature or over current. The three terminal fixed voltage regulators: 78xx Series Adjustable voltage regulator using 78xx series. From the above figure, we can write Output voltage, V0 VR V A VR ( I Q I R1 ) R2 VR R1 V Hence, V0 VR I Q R2 R R2 R1 But I R1 R V0 VR 1 2 I Q R2 R1 Thus the output voltage V0 is dependent on two factors. First is the R2 /R1 and the other is the product IQR2. 84