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Co-Design of ESD Protection and Integrated Circuits An IEEE Electron Devices Society Distinguished Lecture Lunes/Monday 2/20/2017 18Hs LAB 109 Departamento de Ingeniería Electrónica, Facultad Regional Buenos Aires, UTN, Av. Medrano 950 1º Piso Prof. Albert Wang, IEEE Fellow Dept. of ECE, University of California, Riverside, CA 92521, USA Tel: 1-951-827-2555, email: [email protected], URL: http://lics.ee.ucr.edu Registration: [email protected] ABSTRACT Electrostatic discharge (ESD) failure is a major IC reliability problem. On-chip ESD protection is required for all ICs. As IC technologies continue to advance to nano nodes, ESD protection design is becoming a big IC design challenge. This lecture discusses all aspects of practical ESD protection designs, including ESD protection mechanisms, ESD protection structures, mixed-mode ESD simulationdesign method, and ESD-IC co-design techniques. Real-world ESD protection circuit design examples will be presented BIOGRAPHY Albert Wang received the BSEE degree from the Tsinghua University, China, and the PhD EE degree from The State University of New York at Buffalo in 1985 and 1996, respectively. He was with the National Semiconductor Corporation before joining the faculty of the Illinois Institute of Technology. Since 2007, he has been a Professor of Electrical and Computer Engineering at University of California, Riverside, where he is Director for the Laboratory for Integrated Circuits and Systems and Director for the University of California Center for Ubiquitous Communications by Light (UC-Light). His research interests focus on analog/mixedsignal/RF ICs, integrated design-for-reliability, IC CAD and modelling, 3D heterogeneous integration of devices and circuits, emerging nano devices and circuits, and LED-based visible light communications. Wang received the CAREER Award from the National Science Foundation. He is the author for the book “On-Chip ESD Protection for Integrated Circuits” (Kluwer, 2002) and more than 240 peer-reviewed papers in the field, and holds thirteen U.S. patents. Wang was Associated Editor for IEEE Transactions on Circuits and Systems I, Editor for IEEE Electron Device Letters, Associate Editor for IEEE Transactions on Circuits and Systems II, Guest Editor-in-Chief for the IEEE Transactions on Electron Devices and Guest Editor for IEEE Journal of Solid-State Circuits. He has been IEEE Distinguished Lecturer for the Electron Devices Society, the Circuits and Systems Society and the Solid-State Circuits Society. He is Jr. Past President (2016-2017) and was President (2014-2015) for IEEE Electron Devices Society. He was Chair for the IEEE CAS Analog Signal Processing Technical Committee (ASPTC). He was committee member for the SIA International Technology Roadmap for Semiconductor (ITRS). He was TPC Chair (2015) and General Chair (2016) for IEEE RFIC Symposium. He served as committee member for many IEEE conferences, e.g., IEDM, BCTM, ASICON, IRPS, IEDST, ICSICT, CICC, RFIC, APC-CAS, ASP-DAC, ISCAS, IPFA, ICEMAC, NewCAS, ISTC, AP-RASC, MAPE, EDSSC, MIEL, EDTM, etc. He is a Fellow of IEEE and a Fellow of AAAS. 1