Download Dual Processor Supervisors (Rev. C)

TPS3305
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SLVS198C – DECEMBER 1998 – REVISED MARCH 2008
DUAL PROCESSOR SUPERVISORS
FEATURES
DESCRIPTION
1
• Dual Supervisory Circuits for DSP- and
Processor-Based Systems
• Power-On Reset Generator with Fixed Delay
Time of 200ms; no External Capacitor Needed
• Watchdog Timer Retriggers the RESET Output
at SENSEn ≥ VIT+
• Temperature-Compensated Voltage Reference
• Maximum Supply Current of 40µA
• Supply Voltage Range: 2.7V to 6V
• Defined RESET Output From VDD ≥ 1.1V
• MSOP-8 and SO-8 Packages
• Temperature Range: –40°C to +85°C
2
APPLICATIONS
•
•
•
•
•
•
Processor Supply Monitoring
Industrial Equipment
Automotive Systems
Portable/Battery-Powered Equipment
Wireless Communication Systems
Notebook/Desktop Computers
The TPS3305 family is a series of micropower supply
voltage supervisors designed for circuit initialization.
Its dual monitor topology is well-suited to use in DSP
and processor-based systems, which often require
two supply voltages, core and I/O.
RESET is asserted when the voltage at either
SENSEn pin falls below its threshold voltage, VIT.
When both SENSEn pins are again above their
respective threshold voltages, RESET is held low for
the factory-programmed delay time (200ms typ).
RESET is also asserted if the watchdog input (WDI)
is not toggled for more than 1.6s typ.
The TPS3305-xx devices are available in either 8-pin
MSOP or SO packages, and are specified for
operation over a temperature range of –40°C to
+85°C.
5V
TPS73233
VIN
GND
3.3V
VOUT
GND
VIN
D OR DGN PACKAGE
(TOP VIEW)
SENSE1
VDD
SENSE2
MR
WDI
GND
RESET
RESET
External
Reset
Source
TPS73618
VOUT
VDD
SENSE1
MR
SENSE2
1.8V
DSP
VI/O
VCORE
TPS3305-18
RESET
WDI
GND
RESET
WDO
GND
1
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 1998–2008, Texas Instruments Incorporated
TPS3305
www.ti.com
SLVS198C – DECEMBER 1998 – REVISED MARCH 2008
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION (1)
NOMINAL SUPERVISED VOLTAGE
(1)
THRESHOLD VOLTAGE (TYP)
DEVICE
SENSE1
SENSE2
SENSE1
SENSE2
TPS3305-18
3.3 V
1.8 V
2.93 V
1.68 V
TPS3305-25
3.3 V
2.5 V
2.93 V
2.25 V
TPS3305-33
5.0 V
3.3 V
4.55 V
2.93 V
For the most current specifications and package information, see the Package Option Addendum at the end of this document, or see the
TI website at www.ti.com.
ABSOLUTE MAXIMUM RATINGS (1) (2)
Over operating junction temperature range (unless otherwise noted).
UNIT
Supply voltage range, VDD
–0.3V to +7V
VMR, VWDI
–0.3V to VDD + 0.3V
Input voltage at SENSE1 and SENSE2, VI
(VDD + 0.3)VIT / 1.25V
VRESET, VRESET
–0.3V to +7V
Maximum low output current, IOL
5mA
Maximum high output current, IOH
–5mA
Input clamp current, IIK (VI < 0 or VI > VDD)
±20mA
Output clamp current, IOK (VO < 0 or VO > VDD)
±20mA
Continuous total power dissipation
See Dissipation Ratings Table
Operating junction temperature range, TJ
–40°C to +85°C
Storage temperature range, Tstg
–65°C to +150°C
Soldering temperature
(1)
(2)
+260°C
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating
conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values are with respect to GND.
DISSIPATION RATINGS TABLE
TA ≤ +25°C
POWER RATING
DERATING FACTOR
ABOVE TA = +25°C
DGN
2.14W
17.1mW/°C
1.37W
1.11W
D
725mW
5.8mW/°C
464mW
377mW
PACKAGE
2
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TA = +70°C
POWER RATING
TA = +85°C
POWER RATING
Copyright © 1998–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS3305
TPS3305
www.ti.com
SLVS198C – DECEMBER 1998 – REVISED MARCH 2008
ELECTRICAL CHARACTERISTICS
Over operating junction temperature range (unless otherwise noted).
TPS3305-xx
PARAMETER
TEST CONDITIONS
VDD
Input supply range
TJ
Operating junction temperature range
VOH
High-level output voltage
VOL
Low-level output voltage
Power-up reset voltage (1)
VSENSE1,
VSENSE2
VSENSE1,
VSENSE2
Vhys
Hysteresis at VSENSEn input
V
V
VDD = 2.7V to 6V,
IOL = 20µA
0.2
V
VDD = 3.3V, IOL = 2mA
0.4
V
VDD = 6V, IOL = 3mA
0.4
V
VDD ≥ 1.1V, IOL = 20µA
0.4
V
VDD = 2.7V to 6V,
TA = 0°C to +85°C
VDD = 2.7V to 6V,
TA = –40°C to +85°C
V
2.30
V
2.86
2.93
3.0
V
4.46
4.55
4.64
V
1.64
1.68
1.73
V
2.20
2.25
2.32
V
2.86
2.93
3.02
V
4.46
4.55
4.67
V
VIT– = 2.25V
20
mV
VIT– = 2.93V
30
mV
VIT– = 4.55V
40
mV
Low-level input voltage at MR and WDI
Δt / ΔV
Input transition rise and fall rate at MR
(1)
(2)
1.72
2.25
mV
VIL
Input capacitance
1.68
2.20
15
High-level input voltage at MR and WDI
CI
1.64
VIT–= 1.68V
VIH
Supply current
°C
VDD – 0.4V
WDI = 0V, VDD = 6V
Time average (dc = 12%)
IDD
+85
VDD – 0.4V
Average low-level input current
Low-level input current
–40
VDD = 6V, IOH = –3mA
IL(AV)
IL
V
VDD = 3.3V, IOH = –2mA
Average high-level input current WDI
High-level input current
UNIT
6.0
V
IH(AV)
IH
MAX
VDD – 0.2V
WDI = VDD = 6V
Time average (dc = 88%)
WDI
TYP
2.7
VDD = 2.7V to 6V,
IOH = –20µA
Negative-going input threshold
voltage (2)
VIT–
MIN
100
150
µA
–15
–20
µA
0.7 x VDD
V
0.3 x VDD
V
50
ns/V
120
170
µA
WDI
WDI = VDD = 6V
MR
MR = 0.7 × VDD, VDD = 6V
–130
–180
µA
SENSE1
VSENSE1 = VDD = 6V
5
8
µA
SENSE2
VSENSE2 = VDD = 6V
6
9
µA
WDI
WDI = 0V, VDD = 6V
–120
–170
µA
MR
MR = 0V, VDD = 6V
–430
–600
µA
SENSEn
VSENSE1,2 = 0V
1
µA
40
µA
VI = 0V to VDD
–1
10
pF
The lowest supply voltage at which RESET becomes active. tr, VDD ≥15 µs/V.
To ensure best stability of the threshold voltage, a bypass capacitor (0.1 µF ceramic) should be placed close to the supply terminals.
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Copyright © 1998–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS3305
3
TPS3305
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SLVS198C – DECEMBER 1998 – REVISED MARCH 2008
TIMING DIAGRAM
SENSEn
V(nom)
VIT-
t
MR
1
t
0
tt(out)
WDI
1
t
0
RESET
1
t
0
td
td
td
td
RESET because
of SENSE below VIT-
RESET because of WDI
RESET because of MR
RESET because of SENSE below VIT-
RESET because of SENSE below VIT-
TIMING REQUIREMENTS
At VDD = 2.7V to 6V, RL = 1MΩ, CL = 50pF, and TJ = +25°C.
PARAMETER
TEST CONDITIONS
SENSEn
tw
Pulse width
MR
WDI
MIN
VIH = 0.7 × VDD, VIL = 0.3 × VDD
TYP
MAX
UNIT
6
µs
100
ns
100
ns
VSENSEnL = VIT– –0.2V, VSENSEnH = VIT+ +0.2V
SWITCHING CHARACTERISTICS
At VDD = 2.7V to 6V, RL = 1MΩ, CL = 50pF, and TJ = +25°C.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
1.1
1.6
2.3
s
140
200
280
ms
tt(out)
Watchdog time-out
VI(SENSEn) ≥ VIT+ +0.2V, MR ≥ 0.7 ×
VDD
See Timing Diagram
td
Delay time
VI(SENSEn) ≥ VIT+ +0.2V, MR ≥ 0.7 × VDD
See Timing Diagram
tPHL
Propagation (delay) time,
high-to-low level output
MR to RESET,
MR to RESET
VI(SENSEn) ≥ VIT+ +0.2V,
VIH = 0.7 × VDD, VIL = 0.3 × VDD
200
500
ns
tPLH
Propagation (delay) time,
low-to-high level output
MR to RESET,
MR to RESET
VI(SENSEn) ≥ VIT+ +0.2V,
VIH = 0.7 × VDD, VIL = 0.3 × VDD
200
500
ns
tPHL
Propagation (delay) time,
high-to-low level output
SENSEn to RESET,
SENSEn to RESET
VIH = VIT+ +0.2V, VIL = VIT– –0.2V,
MR ≥ 0.7 × VDD
1
5
µs
tPLH
Propagation (delay) time,
low-to-high level output
SENSEn to RESET,
SENSEn to RESET
VIH = VIT+ +0.2V, VIL = VIT– –0.2V,
MR ≥ 0.7 × VDD
1
5
µs
4
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Copyright © 1998–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS3305
TPS3305
www.ti.com
SLVS198C – DECEMBER 1998 – REVISED MARCH 2008
DEVICE INFORMATION
FUNCTION/TRUTH TABLE (1)
(1)
MR
SENSE1 > VIT1
SENSE2 > VIT2
RESET
RESET
L
X
X
L
H
H
0
0
L
H
H
0
1
L
H
H
1
0
L
H
H
1
1
H
L
X = Don't care
FUNCTIONAL BLOCK DIAGRAM
VDD
TPS3305
14kW
MR
R1
SENSE1
RESET
R2
RESET
Logic + Timer
R3
SENSE2
RESET
R4
GND
Reference
Voltage
of 1.25V
Transition
Detection
WDI
Oscillator
Watchdog
Logic + Timer
40kW
TERMINAL FUNCTIONS
TERMINAL
NAME
NO.
DESCRIPTION
GND
4
Ground
MR
7
Manual reset
RESET
5
Active-low reset output
RESET
6
Active-high reset output
SENSE1
1
Sense voltage input 1
SENSE2
2
Sense voltage input 2
WDI
3
Watchdog timer input
VDD
8
Supply voltage
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Copyright © 1998–2008, Texas Instruments Incorporated
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5
TPS3305
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SLVS198C – DECEMBER 1998 – REVISED MARCH 2008
TYPICAL CHARACTERISTICS
NORMALIZED SENSE THRESHOLD VOLTAGE
vs
JUNCTION TEMPERATURE AT VDD
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
18
VDD = 6V
16
MR = Open
1.004
14
TPS3305-33
1.003
12
1.002
IDD - Supply Current - mA
Normalized Input Threshold Voltage - VIT(TA), VIT(+25°C)
1.005
1.001
1
0.999
0.998
0.997
0.996
10
8
6
4
2
0
−2
−4
SENSEn = VDD
−6
MR = Open
TJ = +25°C
−8
0.995
−40
−15
10
35
60
−10
−0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5 6 6.5 7
85
VDD - Supply Voltage - V
TJ - Junction Temperature - °C
Figure 1.
Figure 2.
INPUT CURRENT
vs
INPUT VOLTAGE AT MR
MINIMUM PULSE DURATION AT SENSE
vs
THRESHOLD OVERDRIVE
100
10
VDD = 6V
VDD = 6V
TJ = +25°C
−100
−200
II - Input Current - mA
MR = Open
9
tW - Minimum Pulse Duration at Vsense - ms
0
−300
−400
−500
−600
−700
−800
8
7
6
5
4
3
2
1
−900
−1 −0.5 0 0.5 1 1.5 2 2.5 3 3.5 4 4.5
VI - Input Voltage at MR - V
0
5 5.5 6 6.5
0
100
300
400
500
600
700
800
900 1000
SENSE - Threshold Overdrive - mV
Figure 3.
6
200
Figure 4.
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Copyright © 1998–2008, Texas Instruments Incorporated
Product Folder Link(s): TPS3305
TPS3305
www.ti.com
SLVS198C – DECEMBER 1998 – REVISED MARCH 2008
TYPICAL CHARACTERISTICS (continued)
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
HIGH-LEVEL OUTPUT VOLTAGE
vs
HIGH-LEVEL OUTPUT CURRENT
2.5
6.5
VDD = 2V
VDD = 6V
6
MR = Open
MR = Open
2
VOH - High-Level Output Voltage - V
VOH - High-Level Output Voltage - V
5.5
1.5
-40°C
1
+85°C
5
4.5
4
-40°C
3.5
3
+85°C
2.5
2
1.5
0.5
1
0.5
0
0
0 −0.5 −1 −1.5 −2 −2.5 −3 −3.5 −4 −4.5 −5 −5.5 −6
0
−5
−10 −15 −20
IOH - High-Level Output Current - mA
−25
−30
−35 −40 −45 −50
IOH - High-Level Output Current - mA
Figure 5.
Figure 6.
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
LOW-LEVEL OUTPUT VOLTAGE
vs
LOW-LEVEL OUTPUT CURRENT
6.5
2.5
VDD = 2V
VDD = 6V
6
MR = Open
MR = Open
VOL - Low-Level Output Voltage - V
VOL - Low-Level Output Voltage - V
5.5
2
1.5
1
+85°C
0.5
5
4.5
4
3.5
3
2.5
+85°C
2
1.5
-40°C
-40°C
1
0.5
0
0
0
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
5.5
6
0
5
10
15
20
25
30
35
40
45
IOL - Low-Level Output Current - mA
IOL - Low-Level Output Current - mA
Figure 7.
Figure 8.
50
55
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7
PACKAGE OPTION ADDENDUM
www.ti.com
8-Nov-2014
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPS3305-18D
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
30518
TPS3305-18DG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
30518
TPS3305-18DGN
ACTIVE
MSOPPowerPAD
DGN
8
80
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AAM
TPS3305-18DGNG4
ACTIVE
MSOPPowerPAD
DGN
8
80
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AAM
TPS3305-18DGNR
ACTIVE
MSOPPowerPAD
DGN
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AAM
TPS3305-18DGNRG4
ACTIVE
MSOPPowerPAD
DGN
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AAM
TPS3305-18DR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
30518
TPS3305-18DRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
30518
TPS3305-25D
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
30525
TPS3305-25DG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
30525
TPS3305-25DGN
ACTIVE
MSOPPowerPAD
DGN
8
80
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AAN
TPS3305-25DGNG4
ACTIVE
MSOPPowerPAD
DGN
8
80
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AAN
TPS3305-25DGNR
ACTIVE
MSOPPowerPAD
DGN
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AAN
TPS3305-25DGNRG4
ACTIVE
MSOPPowerPAD
DGN
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AAN
TPS3305-25DR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
30525
TPS3305-25DRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
30525
TPS3305-33D
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
30533
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
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Orderable Device
8-Nov-2014
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
TPS3305-33DG4
ACTIVE
SOIC
D
8
75
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
30533
TPS3305-33DGN
ACTIVE
MSOPPowerPAD
DGN
8
80
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AAO
TPS3305-33DGNG4
ACTIVE
MSOPPowerPAD
DGN
8
80
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AAO
TPS3305-33DGNR
ACTIVE
MSOPPowerPAD
DGN
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AAO
TPS3305-33DGNRG4
ACTIVE
MSOPPowerPAD
DGN
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
AAO
TPS3305-33DR
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
30533
TPS3305-33DRG4
ACTIVE
SOIC
D
8
2500
Green (RoHS
& no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
-40 to 85
30533
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability
information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that
lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between
the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight
in homogeneous material)
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
Addendum-Page 2
Samples
PACKAGE OPTION ADDENDUM
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8-Nov-2014
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
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Addendum-Page 3
PACKAGE MATERIALS INFORMATION
www.ti.com
13-Feb-2016
TAPE AND REEL INFORMATION
*All dimensions are nominal
Device
TPS3305-18DGNR
Package Package Pins
Type Drawing
MSOPPower
PAD
SPQ
Reel
Reel
A0
Diameter Width (mm)
(mm) W1 (mm)
B0
(mm)
K0
(mm)
P1
(mm)
W
Pin1
(mm) Quadrant
DGN
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
TPS3305-18DR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TPS3305-25DGNR
MSOPPower
PAD
DGN
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
TPS3305-25DR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
TPS3305-33DGNR
MSOPPower
PAD
DGN
8
2500
330.0
12.4
5.3
3.4
1.4
8.0
12.0
Q1
TPS3305-33DR
SOIC
D
8
2500
330.0
12.4
6.4
5.2
2.1
8.0
12.0
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
13-Feb-2016
*All dimensions are nominal
Device
Package Type
Package Drawing
Pins
SPQ
Length (mm)
Width (mm)
Height (mm)
TPS3305-18DGNR
MSOP-PowerPAD
DGN
8
2500
358.0
335.0
35.0
TPS3305-18DR
SOIC
D
8
2500
367.0
367.0
38.0
TPS3305-25DGNR
MSOP-PowerPAD
DGN
8
2500
358.0
335.0
35.0
TPS3305-25DR
SOIC
D
8
2500
367.0
367.0
38.0
TPS3305-33DGNR
MSOP-PowerPAD
DGN
8
2500
358.0
335.0
35.0
TPS3305-33DR
SOIC
D
8
2500
367.0
367.0
38.0
Pack Materials-Page 2
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