Download Prof. NA Gajjar Prepared by - 130230109018 : Hemaxi Halpati

OP-AMP FEEDBACK AMPLIFIERS
Guided by Prof. N A Gajjar
Prepared by 130230109018 : Hemaxi Halpati
130230109019 : Priyank Hirani
130230109020 : Manish Jatiya
130230109022 : Rakesh Joshi
130230109023 : Piyush Kanani
Chart of preparation of presentation
July
August
Topic
 OP-AMP feedback amplifier analysis.
 Differential amplifier with one OP-AMP.
 Differential amplifier with two OP-AMP.
 Differential amplifier with three OP-AMP.
 OP-AMP parameters.
 Offset nulling methods.
Feedback in OP-AMP circuits
 The structures of OP-AMP circuits using various types of negative feedback are
shown in figure
Voltage – series feedback amplifier
 The schematic diagram of non – inverting amplifier is as shown in figure.
 From figure it is clear that voltage sampling is taking place on outside, because the
feedback voltage is proportional to the output voltage.
 And series mixing takes place at the input because the feedback voltage appears to be
in series with input voltage.
Conti.
 Type of negative feedback : voltage sampling + series mixing = voltage series
feedback.
 Closed loop gain : AVF = AV (R1 + RF)
(Exact) , AVF = 1 + RF (For ideal)
R1 + RF + AVR1
 Gain of feedback circuit B = VF
=
VO
 AVF =
AV
Ro
1 + AV B
R1
(R1 + RF)
&
1 + AV B
 RoF =
R1
RiF =
Ri
1 + AV B
&
fF = (1 + AV B) fo
Voltage shunt feedback amplifier
 The schematic diagram of an inverting amplifier is as shown in figure.
 The feedback is proportional to the output voltage.
 Hence it is voltage sampling and the feedback voltage appears in parallel (shunt) with
the input voltage. Hence it is shunt mixing.
Conti.
 Type of negative feedback : voltage sampling + shunt mixing = voltage shunt feedback.
 Closed loop gain : AVF =
- AV R1
(Exact) , AVF =
R1 + RF + AVR1
 Gain of feedback circuit B = VF
=
VO
 AVF = - AV K
- RF (For ideal)
R1
R1
& Attenuation factor K = RF
(R1 + RF)
&
RiF =
(R1 + RF)
Ri (Ideal)
1 + AV B
 ROF =
Ro
1 + AV B
&
fF = (1 + AV B) fo
AV
Differential amplifier
 The differential amplifier is used to obtain the output proportional to the subtraction
of two input voltages. The circuit diagram of the difference amplifier using OPAMP is shown in figure.
Differential amplifier using one OP-AMP
 The difference amplifier and subtractor circuit is used to obtain the subtraction of
two input voltages.
 The circuit diagram of the difference amplifier using OP-AMP is shown in figure.
Conti.
 Output voltage, VO = RF (V2 - V1)
R1
 Voltage gain, AD = - RF
R1
 Input resistance, RiF1 = R1
(If V2 is grounded)
RiF2 = (R1 + R2 )
 For subtractor,
R1 = RF = R
 Then output voltage, VO = (R2 – R1)
Differential amplifier with two OP-AMP
 The gain and input resistance of the differential amplifier can be increased if we use
two OP-AMPs.
 The differential amplifier with two OP-AMPs is shown in figure.
 The characteristics of this circuit are identical to those of non-inverting amplifier.
 A1 is the non-inverting amplifier whereas A2 is difference amplifier.
Conti.
 Output voltage of first stage, V3 = 1 + R1
V2
RF
 Voltage gain of first stage, AV1 =
1 + RF
R1
 Total output voltage, VO =
1 + RF
(V1 - V2)
R1
 Total gain of the circuit, AD = 1 + RF
R1
 Input resistance of first stage,
RiF = Ri (1 + Aβ)
where, β =
R2
R2 + R3
 Input resistance of second stage, RiF1 = Ri (1 + Aβ)
where, β =
R
R1 + RF
Differential amplifier with three OP-AMPs
 The difference amplifier discussed earlier has a low input impedence. Whereas the
input impedence of a high quality instrumentation amplifier should be very high.
 This problem of the difference amplifier can be overcome by using a buffer stage on
the input side as shown in figure. Buffer is nothing but a unity gain voltage follower
circuit.
 The voltage gain of the buffer stage is 1. But it provides a very high input
impedence. The gain of the circuit shown in figure is same as the gain of the
difference amplifier discussed in the previous section.
 The gain of difference amplifier can be varied by keeping the resistance R2.
Conti.
 Out put of difference amplifier, VO = R2 (V2 - V1)
R1
Practical OP-AMP parameters
OP-AMP characteristics
DC characteristics
 Input bias current
AC characteristics
Frequency responce
 Input offset current
Stability
 Input offset voltage
Frequency compensation
 Thermal drift
Slew rate
Input bias and offset currents
 Input bias current IB is the average of the currents flowing into the two input
terminals of the OP-AMP i.e. IB1 and IB2 are two currents then
Input bias current IB = IB1 + IB2
2
 The algebraic difference between the currents flowing into the inverting and noninverting terminals of OP-AMP is called as “input offset current” Iios .
Iios = │ IB1 - IB2│
 Ideally the value for both should be zero.
 Practically it should be as low as possible.
Input and output offset voltages
 The small differential voltage applied at the input of the OP-AMP to make the output zero
is known as input offset voltage Vios.
 Ideally it should be zero and practically as low as possible.
 Total input offset voltage of OP-AMP, Vios (total) = Vios (initial) + T.C.(Vios)
ΔV + ΔVo
PSRR
AD
ΔT + ΔV1 +
CMRR
where, Vios (initial) = Initial input offset voltage (at ambient voltage)
 The output voltage produced due to input offset voltage is called as output offset voltage,
Voos.
 Total output offset voltage of OP-AMP, Voos =
1 + RF
Vios + RF IB
R1
 Where, IB is replaced by Iios ,when Rcomp is connected with non-inverting amplifier.
Thermal drift
 The thermal drift is defined as the average rate of change of input offset voltage per
unit change in temperature and is denoted by Δ Vios / Δ T. It is expressed in μ V/ oC.
 Thermal drift in the input offset current = Δ Iios / Δ T. It is expressed in p A/ oC and
 Thermal drift in the input bias current = Δ IB / Δ T. It is expressed in p A/ oC.
Error voltage
 Error voltage (EV) can be defined as maximum possible change in VOOT. It can be
calculated for non-inverting amplifier by following equationEV = Δ VOOT =
1 + RF
R1
Δ Vios
Δ T + RF
ΔT
Δ Iios
ΔT
ΔT
 It can be negative or positive. Hence the expression for the output voltage of an
invering amplifier is given by,
VO = - RF Vi ± EV
R1
 Ideally it should be zero but in practice EV can’t reduced to zero.
Common mode rejection ratio (CMRR)
 CMRR is the capability of OP-AMP to successfully reject the common mode signals
.It is denoted by p and it is generally expressed in decibels (dB).
 CMRR (dB) = 20 log10
ACM
Ad
 CMRR of a practical OP-AMP is not ∞. However it is very high. For IC 741, the
CMRR is 90 dB or 31622. Such a high CMRR helps to reject the common mode
signals such as noise, successfully.
 In absence of input offset voltage, the OP-AMP should respond only to the
differential input voltage Vd. But a practical OP-AMP is sensitive to the common
mode input VCM = (V1 + V2)
2
 Vo = Ad Vd + ACM VCM
Power supply rejection ratio (PSRR)
 The change in an OP-AMP’s input offset voltage (Vios) caused by variation in the
supply voltage is called as power supply rejection ratio (PSRR).
 It is also called as supply voltage rejection ratio (SVRR) or power supply sensitivity
(PSS).Mathematically PSRR is expressed as :
PSRR = Δ Vios
Δ V
 It is expressed either in microvolts per volt or in decibels.
 For IC 741c, PSRR = 150 μ V/ V. The value of PSRR should ideally be equal to
zero and practically it should be as small as possible.
Effect of variation in power supply voltage
on offset voltage
 The values of Vios , Iios , and IB are dependent on the variation in the power supply
voltage (VCC and VEE) as well.
 For an OP-AMP, when the values of + VCC and – VEE are decided for a particular
application, we do not change them deliberately. But due to poor filtering or poor
regulation of power supplies, sometimes these voltages may change.
 The variation in input bias current IB and input offset current Iios with change in
supply voltage is shown in figures (a) and (b) respectively.
Change in input offset voltage, and input
bias current with time
 The last factor that affects the values of Vios and IB of an OP-AMP is time.
 As OP-AMPs are made from diode and transistors, the input offset voltage and
input bias current will vary with time. This will adversely affect the long term
stability of an OP-AMP.
 In data sheets of some OP-AMPs, the values of input bias current drift and input
offset voltage drift with respect to time is specified. These drifts are denoted by Δ
Vios / Δ t and Δ IB /Δ t.
 The value of Δ Vios / Δ t is specified in microvolts per week and the value of Δ IB /
Δ t is specified in nanometers per week.
 The maximum change in the output offset voltage with respect to time is given by,
VOOT =
1 + RF
Vios
R1
Δt
Δ t + RF
Δ Iios
Δt
Δt