Download Tail Current-Shaping to Improve Phase Noise in LC Voltage

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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 8, AUGUST 2006
Tail Current-Shaping to Improve Phase Noise
in LC Voltage-Controlled Oscillators
Babak Soltanian, Student Member, IEEE, and Peter R. Kinget, Senior Member, IEEE
Abstract—This paper introduces a tail current-shaping technique in LC-VCOs to increase the amplitude and to reduce the
phase noise while keeping the power dissipation constant. The tail
current is made large when the oscillator output voltage reaches
its maximum or minimum value and when the sensitivity of the
output phase to injected noise is the smallest; the tail current is
made small during the zero crossings of the output voltage when
the phase noise sensitivity is large. The phase noise contributions
of the active devices are decreased and the VCO has a larger
oscillation amplitude and thus better DC to RF conversion compared to a standard VCO with equal power dissipation. A circuit
design to implement tail current-shaping is presented that does not
dissipate any extra power, does not use additional (noisy) active
devices and occupies a small area. The operation and performance
of the presented circuit is extensively analyzed and compared to an
ideal pulse biased technique. The presented analysis is confirmed
by measurement results of two 2-GHz differential nMOS VCOs
fabricated in 0.25- m BiCMOS process.
Index Terms—CMOS integrated circuits, LC oscillators, oscillation amplitude, phase noise, radio frequency, tail current-shaping,
voltage-controlled oscillators.
I. INTRODUCTION
IGHLY integrated radio-frequency (RF) integrated transceivers for wireless communications rely on fully integrated oscillator for carrier generation. Transceivers in communication applications such as high-speed electrical wired or
fiber optic communications require high-quality voltage-controlled oscillators (VCOs) to generate local clocks. Differential
cross-coupled LC oscillators have been extensively used thanks
to their simplicity, differential operation and relaxed start-up
condition. The spectral purity of the oscillator’s output waveform or the timing accuracy of its zero crossings depend on the
phase noise generated in the oscillator. Extensive research has
been done to understand the origins of phase noise and to improve the phase noise performance of oscillator designs without
increasing their power dissipation.
Fig. 1 depicts an nMOS implementation of a cross-coupled
differential LC VCO. The main contributors to the phase noise
of this VCO are the cross-coupled switching transistors M1
and M2, the tail current source, and the thermal noise associated with the loss in the LC resonator. The resonator’s thermal
H
Manuscript received December 6, 2005; revised March 14, 2006. This
work was supported in part under SRC Sponsored Research Contract No.
2004-HJ-1191. Measurement equipment support was provided by NSF MRI
Grant ECS-03-20666.
The authors are with the Department of Electrical Engineering, Columbia
University, New York, NY 10027 USA (e-mail: [email protected];
[email protected])
Digital Object Identifier 10.1109/JSSC.2006.877273
Fig. 1. Circuit schematic of a cross-coupled differential nMOS LC-VCO.
noise contribution can be reduced by using inductors, capacitors and varactors which have a high quality factor, . Howfor passive components is
ever, the maximum achievable
mainly determined by technology limitations and can only be
slightly improved by design or layout techniques. Different filtering techniques have been proposed to reduce the contribution
of the tail current source to the phase noise [3], [4]. Most of
tail current filter techniques are focused on filtering the noise
at the second harmonic and they often consume large areas.
AM-to-FM noise conversion by the varactors [1], [5] can make
the oscillator very sensitive to circuit noise. This conversion can
be lowered by reducing the VCO’s tuning gain through the use
of discrete tuning, e.g., with a switched capacitor array in the
LC resonator [2]. Depending on the oscillator’s state, current
or voltage noise present in the components is converted more
efficiently into phase or into amplitude noise [6], [7]. The sensitivity of the VCO’s output phase to current or voltage noise
impulses is often referred to as the impulse sensitivity function
(ISF) [6] and is a periodic function of the VCO’s state or phase.
The ISF is typically large when the output voltage is close to the
zero-crossing instants and it is typically small when the output
voltage is close to its maximum or minimum value. To sustain
the oscillations, active devices have to be used to compensate
for the losses in practical resonators, but there is always noise
associated with the energy injection into the resonator. The associated phase noise in VCOs can be reduced if the energy is
injected at the right moments, i.e., when the ISF is minimum.
In Section II, we first analyze an LC-VCO biased with an ideal
periodic pulsed current source which positions the energy injection into the resonator at the most favorable time. We derive
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SOLTANIAN AND KINGET: TAIL CURRENT-SHAPING TO IMPROVE PHASE NOISE IN LC VCOs
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the associated oscillation amplitude and phase noise improvements compared to a standard VCO biased with a constant current source and with the same power dissipation. Section III then
introduces a compact implementation of a tail current-shaping
technique to bias the VCO with a periodic pulse current waveform. We analyze the performance of tail current-shaping technique and present experimental results in Section IV. Discussion
and conclusions are presented in Sections V and VI.
II. PERIODIC PULSE BIASING FOR LC-VCOS
In this section we study the benefits of pulse biasing in differential cross-coupled LC-VCOs using an ideal pulsed tail current
source. This allows the calculation of the limits on amplitude
and phase noise improvement under ideal pulse biased operation compared to standard constant bias operation.
The LC resonator in each branch of the differential nMOS
LC-VCO in Fig. 1 is composed of an inductor with inductance
and a variable capacitor with capacitance . Loss in the LC
resonator is represented by an equivalent parallel resistor . In
the steady-state, the VCO’s output voltages can be well approxand
imated by
where and
are the single-ended amplitude and the supply
. The
voltage, and is the oscillator’s phase given by
oscillation frequency, , is given by
where
is the total single-ended resonator capacitance including and
the capacitive parasitics of L and the active devices. Assuming a
sufficiently large output swing, the cross-coupled devices (M1
and M2) steer the tail current alternatively to one of the differential output nodes.
A. Oscillation Amplitude
Constant Tail Current: The voltage and current waveforms
are
in a VCO biased with a constant tail current source of
presented in Fig. 2(a), assuming the crossed-coupled devices
M1 and M2 act like ideal switches. The drain currents of M1
and M2 are
(1)
Fig. 2. Voltage and current waveforms for the VCO in Fig. 1. (a) Biased with
a constant current source. (b) Biased with a periodic pulse current source with
period T =2.
(2)
is a single pulse centered at the origin with unity
where
amplitude and duration of 1:
otherwise.
(3)
Pulsed Tail Current: We now assume that the tail current,
, in the oscillator of Fig. 1 is a periodic signal with period
, where
is the period of the output signal, with
and with pulse duration or conduction angle
amplitude
(in radians) as shown in Fig. 2(b); the pulses are aligned with
and
which are the least phase sensitive
the maxima of
can be expressed as
instants,1
The DC component, , and the magnitude of the first harmonic
at , , of the square currents waveforms in each branch are
and
. Given that the resonator
impedance is low except around , the single-ended oscillation
[12]:
amplitude can be calculated as the product of and
(4)
(5)
1Although the exact location of the least phase sensitive instants can slightly
deviate from the peaks of the voltage waveform [7], we are making this simplifying assumption in our analysis.
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 8, AUGUST 2006
and the drain current of M1,
for
in (2):
, is derived by substituting
(6)
(7)
can be found using the Fourier
The Fourier expansion of
expansion for a pulse train given Appendix I:
(8)
The DC component, , and the magnitude of the first harand
monic, , of the drain current now are
. To keep the power dissipation in the
pulse biased VCO equal to the VCO with the constant bias
and thus
.
current, we assume
The the oscillation amplitude is then
(9)
where
.
For very narrow tail current pulses, i.e., in the limit when
, the oscillation amplitude becomes
which
times (57%) larger than the oscillation amplitude in the
is
.
same VCO with a constant bias current of
B. Phase Noise Analysis
We now study the phase noise in a standard and a pulsed bias
VCO. We first focus on the effect of thermal noise with a white
power spectral density in the components which leads to phase
dependency as a function of the frequency
noise with a
, from the carrier at . We do a single-ended phase
offset,
noise analysis which keeps the equations simpler but the phase
noise in the single-ended and differential signals are identical.
The VCO’s phase noise in dBc/Hz at the offset frequency
can be calculated using (10) [6], shown at the bottom of the page,
taking into account the three main sources of phase noise, i.e.,
loss in the resonator, switching devices, and tail current source.
is the power spectral density of the thermal current
and
noise from the resonator’s equivalent parallel resistance
is the RMS value of its effective ISF; the current
thermal noise power of M1 and the tail source are represented
and
;
and
by
are the RMS values of their effective ISF.
;
): We now
Constant Tail Current (
derive the appropriate expressions for the RMS values of the
ISFs for the different noise sources and for their power spectral
densities for substitution into (10). The thermal noise from the
[8];
is
resonator’s loss is
[10]
a good approximation for the ISF associated with the
.
and it is easy to calculate that
The thermal noise power spectral density of M1 is
when M1 is conducting current
(and in saturation2), and it is close to zero when the transistor
is the transconductance
is OFF and highly resistive [9];
of M1 and is a coefficient determined by the used technology
as
and device size and type. We define
the transconductance of M1 when operating in saturation with
and
is the current gain,
a drain-source current of
where
is the mobility
defined as
is the oxide capacitance, and (W/L) is the
of electrons,
aspect ratio [9]. To guarantee oscillation startup, the loop-gain
defined as
(11)
must be larger than one for all process corners. The power spectral density of the thermal current noise of M1 can now be expressed as
(12)
The effective ISF of M1 is defined as
where
is the noise modulation waveis a (0,1) square wave
form [6]; for a constant tail bias
as can be concluded from the waveforms
with frequency of
[11], the RMS value of the
in Fig. 2. Given
effective ISF becomes
(13)
(14)
We assume that the constant tail current is generated
by a MOS device biased in saturation with a drain-source
, so that
;
current of
2We assume the switching devices are in saturation when conducting current; this assumption is valid as long as the VCO operates in its current-limited
regime, and as long as the output voltage swings are not too large. The devices
in the tail current-shaped VCO we present in Section III, operate under these
conditions since they are required to achieve tail current-shaping.
(10)
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SOLTANIAN AND KINGET: TAIL CURRENT-SHAPING TO IMPROVE PHASE NOISE IN LC VCOs
is transconductance of the tail MOS
as the ratio of the size of the tail device
device. We define
. The tail
and the size of M1 and
current thermal noise power spectral density is then
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Using
ISF is now (14):
, as before, the RMS value of the effective
(23)
(15)
(24)
When the cross-coupled devices switch quickly, the ISF of the
tail node is approximately [10]
for
for
(16)
and the
for a constant tail current source of
is calculated as
(17)
We can now substitute the expression for the amplitude (4)
and the noise power spectral densities and RMS values of their
respective ISFs into (10), and obtain the phase noise:
We assume that the tail current source is implemented using
an nMOS device (M3) with the appropriate gate-source voltage
waveform to obtain the pulsed bias. Its peak current, , is increased by scaling the device aspect ratio while keeping the
overdrive voltage the same when the pulses are made narrower.
and
Under these assumptions, (19) leads to
now becomes
(25)
When the tail nMOS conducts, its transconductance equals
and thus
(26)
Using (16), the
is calculated as
(18)
Pulsed Tail Current Source: We now calculate the phase
noise for a VCO biased with a pulsed tail current source with
duration of
in radians; as before, the peak value, , is set at
(27)
Substituting (9), (11), (22), (24), (26) and (27) in (10), the
phase noise for the pulse biased VCO is
(19)
(28)
to keep the average tail current in the pulse biased VCO equal
to
as in the standard VCO.
The phase noise contribution due to the resonator loss is not
affected by the pulse biasing. However, the noise modulation
, now becomes
function for the switching devices,
as can be shown by evaluating thermal
noise power spectral density of M1 when the device is conducting:
(20)
(21)
(22)
where
and
are functions of the conduction angle:
(29)
(30)
Comparison: We expect to obtain an improvement in phase
noise for the pulse biased VCO by making the current pulses
narrower, i.e., by reducing the conduction angle,
. Fig. 3(a)
shows the total thermal phase noise reduction for a pulsed bias
VCO compared to a constant bias VCO as a function of conduction angle; the reduction is calculated using (18) and (28)
,
, and
. Lower phase noise is
assuming
indeed achieved for narrower pulse widths. Three mechanisms
contribute to this phase noise reduction: the larger oscillation
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 8, AUGUST 2006
frequency is expected to move to lower frequencies by making
smaller.
III. TAIL CURRENT-SHAPING
Fig. 3. Comparison of the phase noise analysis results for a VCO biased with
a periodic rectangular pulse current source to a reference VCO biased with a
constant current source. The results are plotted for different current pulse widths
in radians (conduction angels, 28). (a) shows total phase noise reduction w.r.t
8. (b) shows phase noise reduction breakdown into the contributions from the
active devices through F ()+E () and the oscillation amplitude; it is assumed
= 2=3, = 2, and = 3:2.
amplitude [see (9)], smaller cross-coupled device noise up-con), and less tail current noise upconversion
version (smaller
). The breakdown of these contributions is plotted
(smaller
in Fig. 3(b). The phase noise improvement at the limit when
, is about 9.1 dB [Fig. 3(a)] where 3.9 dB is from larger
oscillation amplitude and 5.2 dB is from eliminating phase noise
contributions of the cross-coupled and the tail current source
nMOS devices.
Flicker Noise: So far we have investigated the phase
noise due to thermal noise in the circuit elements. Here
we show pulse biasing also reduces the DC component of
the effective ISF for both M1 and M3 which translates to
less conversion of flicker noise in the circuit components
dependence in the oscilto phase noise with a
lator [6]. If we decompose each ISF into AC and DC parts,
, the corresponding effective ISF
is
where
is the noise modulation function. The
for
M1 and M3 are usually odd functions of and their product
doesn’t
with the noise modulation function of
create any significant DC component; the DC component
becomes smaller for narrower pulses
of
(smaller
) and as a result the
has a smaller DC
component and smaller flicker noise upconversion in the pulsed
the phase noise in the
bias VCO. In the limit when
region can be made very small whereas the
phase noise cannot be reduced below the contribution from
the loss in the resonator. We thus expect a more significant
region compared
reduction of the phase noise in the
region and as a result the phase noise corner
to the
The implementation of the periodic pulse current source
using active devices requires extra power and can introduce
additional noise. The creation of narrow current pulses and their
synchronization with the VCO’s output is challenging since
the associated circuits need to operate at the second and higher
order harmonics of the output frequency. However, as technology scaling continues an active approach may become more
feasible in the future. We now introduce a tail current-shaping
circuit technique with an inherent synchronization mechanism
requiring only one passive element.
Fig. 4 shows the schematic of the VCO with the tail current-shaping technique; we will refer to it as VCO2. The caparallel to the tail current source M3 is carefully
pacitor
. An identical
designed to shape the effective tail current
is used as our reference ososcillator, VCO1, but without
cillator to evaluate the effectiveness of tail current-shaping. The
circuit is biased and the devices are sized such that the VCO
operates in the current limited regime such that M1 and M2 do
not enter the deep triode region. The voltage at the tail node
is then approximately a sinusoid with frequency
:
, where
is its amplitude and is its phase
delay compared to the output voltage.3 This frequency doubling
is the characteristic of a nonlinear circuit and linear analysis
is not generally applicable here, but we show that resorting to
the linear circuit analysis during half a cycle provides useful insight and design guidelines that are presented in Section III-C.
In each half cycle, e.g., when M1 is on and M2 is off, the circuit is similar to a source follower [8] with its simplified small
signal equivalent circuit shown in Fig. 5. Assuming that the
output resistance of the tail current source is much larger than
at ,
is calculated using phasor analthe impedance of
ysis from
(31)
with
the gate-source capacitance and
the transconductance of M1 or M2.
and
are phasors of the common
source node and single-ended output voltages. From (31) the
amplitude and phase delay are obtained:
(32)
(33)
, the current through
, , is now
. The tail current injected into VCO2,
, is
where
is the DC current through M3.
Through appropriate circuit sizing we can set the amplitude of
Given this
3If the VCO operates in the voltage-limited regime, the voltage at the tail node
(V ) is not a second harmonic sinusoid and contains strong higher harmonics
as well.
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SOLTANIAN AND KINGET: TAIL CURRENT-SHAPING TO IMPROVE PHASE NOISE IN LC VCOs
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Fig. 4. Schematic of the fabricated VCO2 core and auxiliary measurement circuits including differential bipolar peak detector and output buffer.
Fig. 5. Simplified small signal equivalent circuit for M1, M2 and M3 from
Fig. 4 when M1 is in saturation and M2 is off.
equal to the DC current so that
obtain
, and we
(34)
Fig. 6 shows the simulated voltage and current waveforms in
is a sinusoidal waveform with a peak-to-peak
the VCO2.
. If we size the devices so that is set to
amplitude of
approximately
, the tail current peaks align with the peaks
of the output voltage:
(35)
Fig. 6. Simulated voltage and current waveforms of VCO2 with the tail currentshaping technique.
A. Oscillation Amplitude
The single-ended oscillation amplitude,
, for VCO2 is
and the Fourier series
again calculated by multiplying
coefficient for the first harmonic, , of the current going into
the resonator. Assuming M1 and M2 act as ideal switches, and
,
using the tail current waveform in (35),
and
(36)
Based on (4) and (36), VCO2 is expected to have a 33% larger
amplitude than VCO1 for the same DC bias current. The actual
improvement in the oscillation amplitude is somewhat lower because the cross-coupled transistors are not ideal switches. Fig. 7
shows the simulated waveforms in VCO1 and VCO2. Table I
summarizes the simulation results for different process corners;
the measured amplitude improvement in VCO2 compared to
VCO1 is about 20%.
B. Phase Noise Analysis
To calculate the phase noise using (10), we assume that the
to different
cross-coupled transistors switch fast and steer
branches in each half cycle. The drain current of M1 is obtained
when M1 is on
from
, and
when M1 is off (
and
). The VCOs are designed to operate in the current-limited
regime. To keep M1 and M2 in saturation when they are ON
, which is equal to the differential oscillation
their maximum
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TABLE I
OSCILLATION AMPLITUDE INCREASE IN VCO2 COMPARED TO VCO1
and
) in VCO1 and VCO2 are shown in Fig. 7 and their
amplitude is indeed less than 0.7 V. When the transistor M1 is
on and steers tail current into the resonator, the noise current
power density of M1 is then
(37)
(38)
(39)
(40)
Again after [11] we assume the ISF of M1 is
and from (40) the noise modulation function is
, so the RMS value of the effective ISF is
obtained from
(41)
(42)
(43)
(44)
Fig. 7. Simulated output voltage and drain current waveforms in (a) VCO1 (no
tail current-shaping) and (b) VCO2 (with tail current-shaping) for the nominal
C = 8 pF and 25% tolerance.
6
amplitude, needs to be kept below the threshold voltage. In the
used technology the threshold voltage of the nMOS transistors is
about 0.7 V. The simulated single-ended output voltages (
Comparing (44) with (14) shows that the mean-square value
of the effective ISF of M1 in VCO2 is about 15% smaller than
for VCO1 which translates to smaller phase noise contribution
from the cross-coupled devices in the tail-current-shaping VCO.
The simulated4 ISFs and their effective waveforms for VCO1
and VCO2 are presented in Fig. 8; the simulated mean-square
value of the effective ISF for M1 is about 5% smaller in VCO2
than in VCO1. The difference with the calculated values is attributed to the fact that the cross-coupled devices do not act
as ideal switches. Additionally, the drain current reported by
the simulator includes drain-source channel currents as well the
4ISF is simulated by injecting a very narrow current pulse at the desired node
for different VCO states. This technique is described in [6].
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SOLTANIAN AND KINGET: TAIL CURRENT-SHAPING TO IMPROVE PHASE NOISE IN LC VCOs
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Fig. 9. Simulated ISF of the tail node for VCO1 and VCO2 at carrier frequency
of 1.75 GHz.
Fig. 8. Simulated V , I , 0
frequency of 1.75 GHz.
, and 0
for VCO1 and VCO2 at carrier
capacitive charging and discharging currents for the parasitics
such as
,
,
, and etc.; only the channel current needs
to be taken into account in the noise estimation because only the
drain-source current generates device noise. With the available
models these currents could not be separated.
parallel to the tail current source transistor M3,
By placing
the high frequency noise of M3 is filtered so that the phase noise
contribution of M3 is reduced [3], [4]. This phase noise reducdefined as the ratio of
tion can be captured in a parameter
the effective tail current ISF in VCO2 compared to VCO1:
(45)
The simulated tail ISFs for the VCO1 and VCO2 are presented
is obtained at
GHz.
in Fig. 9 and
We now have all necessary terms to calculate the phase noise
region for VCO2 by substituting
in the
from (44),
from (40), and the oscillation amplitude
from (36) into (10):
(46)
whereas the phase noise for VCO1 is obtained from (18). Using
,
,
, and
to compare the
phase noise of VCO1 and VCO2 given by (18) and (46), we find
Fig. 10. Simulated phase noise of the VCOs with SpectreRF at carrier frequency of 1.75 GHz; VCO2 has tail current-shaping and VCO1 is a reference
VCO with a constant tail current source.
a 5.6 dB phase noise improvement in the tail current-shaping
region. This improvement is composed of
VCO for the
2.5 dB due to the larger oscillation amplitude and about 3.1 dB
from a reduced phase noise contribution of the active devices.
Phase noise simulations using SpectreRF presented in Fig. 10
show about 3 dB improvement in the phase noise of VCO2 at an
offset frequency of 600 kHz from a 1.75-GHz carrier by implementing tail-current-shaping technique. The discrepancy with
the calculated value can probably be attributed to the non-ideal
switching in the cross-coupled devices.
This analysis proves that tail current-shaping technique
improves the phase noise through three different mechanisms.
reduces the
First, the increased oscillation amplitude
phase noise. Second, the narrower drain current pulses reduce
.A
the RMS value of the effective ISF of M1,
and
comparison of the simulated drain current waveforms (
) in VCO1 [Fig. 7(a)] and in VCO2 [Fig. 7(b)] shows that
the drain currents in VCO2 are narrower pulses and inject more
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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 8, AUGUST 2006
current when the output is close to its peak. Third, the capacitor
is a noise filter for the tail current source and reduces its
contribution in the phase noise similar to [3].
Flicker noise:
can be associated with the fact that
the parallel capacitor attenuates the higher frequency components of the noise of the tail current source M3 [4]. Simulations
further show a reduction in the phase noise contribution of M3
region. The harmonic analysis of the simulated
in the
is
ISFs in Fig. 9 reveals that the DC component of
. As a
about 12% less than the DC component of the
result M3’s flicker noise upconversion is smaller in VCO2 compared to VCO1. This effect is not observed for a tail capacitor
that acts only as a high frequency noise filter.
The analysis and simulation of flicker noise upconversion of
M1 and M2 are very complex because the cross-coupled devices
operate in different regions of operation. Additionally, the effect
of switching on the flicker noise power spectral density [13] is
not captured by the simulator.
The contribution of the resonator loss in the thermal phase
noise is not reduced and this noise contribution sets the lower
region. We expect the
phase noise
limit in the
corner to move towards lower frequencies when the reduction
in the flicker phase noise is larger than the total reduction in
the thermal noise. Analysis in Section II showed that
noise corner frequency becomes smaller for a VCO biased with
a periodic narrow pulse current source. Circuit simulation in
Fig. 10 shows that for the VCO with tail current-shaping the
phase noise corner located at a lower frequency (about
80 kHz) compared to the standard VCO (about 140 kHz).
C. Circuit Design
The presented guidelines along with other VCO design considerations such as startup loop gain, tuning range, power dissipation, signal level and phase noise were used to optimize the
component sizing. The circuit design starts with calculating the
, from the loss in the resonator and the required loop
, is selected to keep the differengain. The bias current,
tial oscillation amplitude close to the device threshold voltages
to make sure M1 and M2 stay in saturation. Next, the aspect
and
.
ratio of the active devices is derived from
, is selected such that the
Then the parallel tail capacitor,
phase delay, , in (33) becomes close to
which implies
. A good approximation to start with
. From here the circuit design becomes
is
an iterative process to optimize the circuit for different process
corners and operating frequencies.
We extensively used transient and phase noise simulations
to verify circuit operation over different process corners and
temperatures and to verify robustness of the design. For example,
after sizing, we simulated the VCO’s performance for different
. Fig. 7(b) shows the results for the nominal
values of
pF and 25% variations. The resulting
value of
variation in the output voltage amplitude is small and the
shape of drain currents does not change considerably. The
simulated phase noise variations are within a 1.2 dB range.
This demonstrates that tail current-shaping is robust in the
presence of process variations.
Fig. 11. Die photograph of the reference oscillator (VCO1) and the oscillator
with tail current-shaping technique (VCO2).
Fig. 12. Measured phase noise of the VCOs; VCO2 has tail current-shaping
and VCO1 is a reference VCO without tail current-shaping.
IV. EXPERIMENTAL RESULTS
Fig. 11 shows the microphotograph of the two differential
nMOS VCOs fabricated in a 0.25- m BiCMOS process. The
electromagnetic simulator EMX was used to design a differennH
tial octagonal inductor with differential inductance of
and a of about 12 at 2 GHz. Inversion-mode MOS varactors
are used to tune the VCO from 1.755 GHz to 2.123 GHz by adfrom 0 to 1.5 V. The VCOs both operate from a
justing
1.5-V supply voltage and both draw 1.5 mA bias current. A RF
bipolar peak detector [14] and a MOS open drain output buffer
are also included on chip to facilitate the measurements (Fig. 4).
The peak detector enables accurate on chip oscillator amplitude
measurements independent of the output buffer attenuation.5
Four sets of circuits were measured on a Cascade RF probe-station with an Agilent Technologies E4446A spectrum analyzer
equipped with phase noise measurement software. The measured data was very consistent and the results of a typical set are
presented here. Fig. 12 shows overlaid phase noise plot versus
the offset frequency from a 1.755-GHz carrier for both VCOs.
VCO2, with the tail current-shaping technique, demonstrates
5 dB and 4.4 dB improvements in the phase noise at 100 kHz
and 600 kHz offset frequencies, respectively, compared to the
reference VCO1. The VCOs dissipate 2.25 mW, and VCO2 has
a measured phase noise at 600 kHz offset from 1.755-GHz and
5To accurately measure the oscillation amplitude, the differential bipolar peak
detector is first calibrated [14] by applying V to its inputs via the differential
inductor of the VCO while the bias current of the VCO is turned off to prevent
the circuit from oscillating.
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SOLTANIAN AND KINGET: TAIL CURRENT-SHAPING TO IMPROVE PHASE NOISE IN LC VCOs
2.123-GHz carriers of 120 dBc/Hz and 117.5 dBc/Hz, respectively. As we expected from analysis and simulations, the
oscillation amplitude is larger for the tail current-shaping VCO
(Table I) because of the narrower current pulses going into the
resonator in each cycle.
V. DISCUSSION
The analysis in Section II-B shows the phase noise improvement trend in a VCO biased with a periodic pulse current source
comparing to a standard VCO reaches 9.1 dB in the limit (for
,
, and
), where the tail current waveform
. This ideal case shows the trend of imis an impulse train
proving thermal phase noise in a differential VCO with pulsed tail
biasing. Despite challenges in implementation of a narrow pulse
generation circuit with active devices, the presented technique in
Section III shows promising results. The analysis promised 5.6
dB thermal phase noise improvement over a standard VCO and
4.4 dB improvementat 600 kHz offset frequencyfroma 1.75-GHz
carrier was recorded in the measurements.
To compare the performance of the introduced pulse biased
VCO to the state of the art, we use the following figure of merit
(FoM)6 [12]:
(47)
is the phase noise at the
offset from the carwhere
rier, and is the VCO’s core power dissipation in mW. The
FoM for VCO2 is 185.8 at 1.755 GHz and 185 at 2.123 GHz.
In [3], a 2.1-GHz differential LC-VCO with noise filter consumes 4 mA from a 2.7-V supply, uses a differential inductor
, and has a measured phase noise of 134 dBc/Hz
with
at 3 MHz offset resulting in a FoM of 180.6. The noise-shifting
differential Colpitts 1.8-GHz VCO in [15] has a phase noise of
139 dBc/Hz at 3 MHz offset for a 10 mW power dissipation,
; its FoM is 184.6. The 1.9-GHz
and has an inductor with
LC CMOS VCO using a bondwire inductor with
(minimum of the resonator is about 14) in [16] dissipates 2 mW,
and has a measured phase noise of 120.5 dBc/Hz at 600 kHz
offset frequency resulting in a FoM of 187.5. The FoM is 185.7
for a 2.5-GHz CMOS VCO using helical inductors [17]. The
performance of the reported VCO2 with tail current-shaping
compares favorably with these high-performance designs which
demonstrates the effectiveness of the proposed solution.
1801
tributions of the active devices vanish when the VCO is driven
by an impulse train.
A circuit implementation of the tail current-shaping technique incorporating a parallel tail capacitor is proposed. The
sizes of the cross-coupled MOS devices and the size of a
parallel tail capacitance are optimized to generate a periodic
tail current waveform that is better adapted to the periodic
nature of the ISF. It is shown that the parallel tail capacitor
operates in large signal mode and its role is more than a simple
noise filter because there is larger DC-to-RF conversion, lower
thermal phase noise contribution from the switching devices,
noise upconversion of the tail device, where
and lower
none of these effects are observed for a noise filter capacitor.
The phase noise analysis is presented and effectiveness of this
solution is verified by simulation and measurement results for
a 2-GHz differential nMOS LC-VCO fabricated in 0.25- m
BiCMOS technology. The measurement results are compared
with a reference standard VCO; the tail current-shaping technique improves the phase noise by more than 3 dB at the
600 kHz offset frequency, for 1.75-GHz and 2.12-GHz output
carriers. The VCO draws 1.5 mA from a 1.5-V supply. The
VCO’s FoM compares favorably with the state of the art. The
presented technique does not require extra power dissipation
and consumes only a small silicon area. The presented circuit
techniques can be applied for other VCOs as well.
APPENDIX I
FOURIER SERIES OF A PULSE TRAIN
If
of W
is a periodic pulse train with period
and pulsewidth
(48)
then its Fourier series expansion is
(49)
where
(50)
VI. CONCLUSIONS
Tail current-shaping technique is presented to improve the
phase noise in LC-VCOs. Narrow current pulses deliver energy
to the resonator at the less phase sensitive instances and the active devices are turned off at the most sensitive instances, i.e.,
zero-crossings. It is shown that larger phase noise improvements
are obtained by making the current pulses narrower but maintaining the same average value. In the limit, the phase noise con-
Q
6Ideally
the FoM should account for the difference in resonator between
different oscillator designs which strongly affects the oscillator performance.
However, a widely accepted FoM incorporating the effect of is not available
so we are using the standard FoM definition.
Q
(51)
(52)
ACKNOWLEDGMENT
The authors would like to thank Philips Semiconductors for
chip fabrication, and S. Kapur and D. Long of Integrand Software for the use of the EMX simulation tool.
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1802
IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 41, NO. 8, AUGUST 2006
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Babak Soltanian received the B.Sc. and M.Sc. degrees in electrical engineering from Sharif University
of Technology, Tehran, Iran, in 1992 and 1995, respectively, and the Licentiate in Technology in communications engineering from Tampere University of
Technology, Tampere, Finland, in 2004. He is currently working toward the Ph.D. degree at Columbia
University, New York, NY.
During summer 2004, he was with IBM T. J.
Watson Research Center and designed high-frequency CMOS integrated circuits for high-speed
serial link applications. He was a Research Staff Member at the Department of
Microwave and Signal Processing, NEC Laboratories America, Princeton, NJ,
from 2001 to 2002, where he designed analog circuits for a direct conversion
WCDMA RFIC using SiGe BiCMOS technology. From 1999 to 2001, he was a
Researcher at the Institute of Communications Engineering, Tampere, Finland,
developing low-complexity baseband receivers for CDMA systems. His current
research includes analog and RF integrated circuits, communication systems,
and signal processing.
Peter R. Kinget received the engineering degree
(summa cum laude) in electrical and mechanical
engineering and the Ph.D. degree (summa cum
laude) in electrical engineering from the Katholieke
Universiteit Leuven, Belgium, in 1990 and 1996,
respectively.
From 1991 to 1995, he received a graduate fellowship from the Belgian National Fund for Scientific
Research (NFWO) to work as a Research Assistant
at the ESAT-MICAS Laboratory of the Katholieke
Universiteit Leuven. From 1996 to 1999, he was at
Bell Laboratories, Lucent Technologies, Murray Hill, NJ, as a Member of Technical Staff in the Design Principles Department. From 1999 to 2002, he held
various technical and management positions in IC design and development at
Broadcom, CeLight, and MultiLink. In the summer of 2002, he joined the faculty of the Department of Electrical Engineering, Columbia University, New
York, NY. His research interests are in analog and RF integrated circuits and
signal processing. He has published over 50 papers in journals and conferences
and holds three U.S. patents with several applications under review. His research
group has received funding from the National Science Foundation, the Semiconductor Research Corporation, an IBM Faculty Award and from several grants
from semiconductor companies.
Dr. Kinget has served on the Technical Program Committee of the IEEE
Custom Integrated Circuits Conference (CICC) and currently serves on the
Technical Program Committee of the IEEE Symposium on VLSI Circuits,
the European Solid-State Circuits Conference, and the IEEE International
Solid-State Circuits Conference. He has been an Associate Editor for the
JOURNAL OF SOLID-STATE CIRCUITS since 2003.
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