Download Analysis of the OPA569 Bridge

Analysis of the OPA569 Bridge-Tied-Load
defaults
Background
Our design follows the TI verified design document:
SLAU503-June 2013-Revised June 2013 [RD1]
This Voltage-to-Current converter design has been chosen because our load is driven with a
current. Our actual load is equivalent to an RL series component; however in view of our
frequency requirements and to simplify our troubleshooting analysis, we have simplified the
load to a simple resistor.
The problem still exists, even when the circuit is driven by a DC voltage.
Figure 1 shows the circuit as is currently used in our design
R = 2.5kΩ
Imon
VIN
Input from a
DAC
U1
Iout(U1)
Rload = 10 Ω
R = 14kΩ
Vm
Vload = Vp-Vm
Iload~=-Iout(U1)
U2
R = 14kΩ
Vp
Figure 1 - Circuit schematic
Expected performance
System operation is calculated as follows:
𝐼𝑚𝑜𝑛 =


𝑉𝑟𝑒𝑓 −𝑉𝑖𝑛
𝑅𝑠𝑒𝑡
with Rset = 2500Ω
(1)
Current is negative/flows into U1 if Vin >Vref
Current is positive/flows out of U1 if Vin <Vref
𝐼𝑜𝑢𝑡 (𝑈1 ) = 475 ∙ 𝐼𝑚𝑜𝑛 = −𝐼𝐿𝑜𝑎𝑑


(2)
Op Amp U1 sinks current if Vin >Vref
Op Amp U1 sources current if Vin < Vref
𝑉𝑙𝑜𝑎𝑑 = −475 ∙ 𝐼𝑚𝑜𝑛 ∙ 𝑅𝐿𝑜𝑎𝑑 = 475
𝑉𝑖𝑛 −𝑉𝑟𝑒𝑓
 Vload is positive for Vin > Vref
 Vload is negative for Vin < Vref
𝑉
𝑅𝑠𝑒𝑡
𝑅𝐿𝑜𝑎𝑑
𝑉𝑜𝑢𝑡 (𝑈1 ) = 𝑉𝑟𝑒𝑓 − 𝑙𝑜𝑎𝑑
& 𝑉𝑜𝑢𝑡 (𝑈2 ) = 𝑉𝑟𝑒𝑓 +
2
 Vout(U1) < Vref < Vout(U2) if Vin > Vref
 Vout(U1) > Vref > Vout(U2) if Vin < Vref
𝑉𝑙𝑜𝑎𝑑
2
(3)
(4)
Theoretical operation is detailed in the enclosed Excel file. The math in the Excel file takes
into account the U2 input resistor values.
Imonitor limit condition
Datasheet constraints state that:
When the OPA569 sources current, the Imonitor pin should be at least 200 mV less than the
output voltage.
For our design, the Imonitor pin is fixed at Vref=2.048V
Therefore, this constraint is equivalent to:
>If U1 sources current, U1 output voltage should be over 2.248 V. In this case, U2 sinks
current.
>If U1 sinks current, output voltage should be under 1.848 V. In this case, U2 sources current.
Table 1 - Op Amp output voltages
Vin
Imonitor
Iout(U1)
Vout(U1)
Vout(U2)
<1.84V
>84 µA
>40 mA
>2.248V
<1.848V
1.84 V
84 µA
40 mA
2.248V
1.848V
1.84V to 2.048V
84µA to 0µA
40mA to 0 mA
2.248V to 2.048V
1.848V to 2.048V
2.048V to 2.26 V
0 µA to -84 µA
0 mA to -40 mA
2.048V to 1.848V
2.048V to 2.248V
Vin > 2.26V
< -84 µA
< -40 mA
< 1.848V
> 2.248V
As seen in the above table, the Imonitor condition is not verified when the circuit operates near
the resting point.
This operation is also coherent with the Verified Design values: in the TI design, the Imonitor
condition is not verified for 2.1V< Vin <2.9V
In more general terms, the Imonitor condition is not verified if:
𝑅𝑠𝑒𝑡 100 𝑚𝑉
𝑅𝑠𝑒𝑡 100 𝑚𝑉
𝑉𝑟𝑒𝑓 − 2
< 𝑽𝒊𝒏 < 𝑉𝑟𝑒𝑓 + 2
𝑅𝐿𝑜𝑎𝑑 475
𝑅𝐿𝑜𝑎𝑑 475
Experimentally, we have never observed a current default flag within this range.
Note:
In the verified design, the Imon pin of U2 is left floating, which is allowed [When not being
used, the Current Monitor pin may be left floating]
In our design, this pin is connected to a transimpedance circuit, which forces the Imon pin of
U2 to Vref. The feedback resistor is small enough to guarantee linear operation.
Conclusion:
Our flag default conditions are as follows:
 For Vin < ~200 mV, amp U1 shows a current default flag. In this setting, U1 output
voltage is around 3.8V.
 For Vin > ~4 V, amp U2 shows a current default flag. In this setting, U2 output
voltage is around 3.9V
 In both of the above cases, the concerned amps are sourcing current when the flag
appears. Therefore, no flag should appear as the corresponding output voltage is
>>2.25V.
Output clamping condition
On page 3 of the datasheet, voltage swing is stated to be 0.3V from supply rails for a 2 amp
output drive. This is roughly twice the typical value.
Typical curves (page 5) show that the swing to rail range is much lower in low output current
conditions. We expect, for an output drive of 350 mA, that the range should be at least
150mV to 4.8V
In addition, page 14 of the datasheet states:
A quick way to estimate the output swing with various output current requiremens is by using
the equation:
Vswing[typical] = 0.1*I0 ; which in our application is around 40 mV.
In any case, our output voltages should never go beyond [0.10V; 3.99 V] in theory.
Using a traditional voltage feedback
The considered solution is to add a 2.5k resistor as feedback between U1 output and inverting
input (standard inverter design)
Unfortunately, this solution is not possible for us; we require a current drive. Our actual load
is an RL series circuit and we wish to generate a current, independently of the R/L value
dispersion.
Note that the problem is independent of the inductance value: the problem is visible at all our
operating frequencies, including DC. In addition, the problem is also present when the real
load is replaced by a simple resistor.
Followup questions
1. There doesn’t seem to be any link mentioned in the datasheet between the Imonitor pin
and the Ilimit pins. How does a non-linearity current recopy error create an Ilimit flag?
2. In addition, as we have seen in this document, non-linearity appears around the resting
point, not at maximum swing values. This is not compatible with the Imonitor / 200 mV
condition. Why would flags appear near maximum swing and not near resting point?
3. The schematic on page 9 shows floating Imon pins (which is allowed by datasheet);
however, this doesn’t generate any current limit flag. This is expected operation:
current monitor is non-linear, but is independent of the current limitation.
4. You suggest transforming the circuit into a traditional inverter type. In this circuit,
output current swing is larger and voltage range is closer to rails (comparing
simulation results on page 5 and 10). Despite this, there is no clamping.