Download Extracting More Accurate FET Equivalent Circuits

Extracting
More Accurate
FET Equivalent
Circuits
This article appeared in
Monolithic Technology
October 1987, a supplement
to Microwave Systems News
& Communications Technology,
and is reprinted here with
permission of the publisher.
CASCADE MICROTECH
TM
GaAs FETs
Extracting More Accurate FET
Equivalent Circuits
Some recently developed techniques are discussed for verifying on- wafer
microwave calibrations and measurements, quickly and automatically extracting
FET equivalent circuits, and using the resulting data.
BY
Eric W. Strid
Cascade Microtech, Inc.
1. The microwave linear equivalent circuit of a GaAs MESFET, MODFET, or JFET is shown.
ccurate RF data are very important when second-order effects
A
are extracted herein. Corrected
vector-network-analyzer measurements made with microwave wafer
probes calibrated at the probe tips
result in extreme1 high-resolution
S-parameter data.” Y,3
FET Parameters at DC and at RF
The microwave linear equivalent
circuit of a GaAs FET or MODFET
biased in the saturation region can be
shown empirically and theoretically to
be that shown in Figure 1.4-6 In contrast, the nonlinear equivalent circuit
of a GaAs FET or MODFET is much
more difficult to determine either
theoretically or empirically, and considerable controversy over nonlinear
modeling remains. 6-10
Probably the toughest GaAs FET
phenomenon to model is the change of
drain I-V (current voltage) characteris-
tics with frequency. It is known that
the small-signal drain conductance
(Rds) is a strong function of frequency.11,12 Typically, Rds decreases
from its highest value at DC, to about
1/3 to 1/30 of its DC value above
about 10 MHZ. This effect is caused by
electron traps in the GaAs material
and/or the surface-dielectric interface,
and is very sensitive to temperature
and process variations.
If the device dissipates enough heat,
the thermal time constant of its thermal mass and conductivity can also
appear as a drain-conductance change
with frequency, because the FET' S
channel current decreases with higher
temperature.
A third and possibly unrelated
effect is that a GaAs FET'S small
signal transconductance also changes
(typically about 10 percent) with frequency. At some bias conditions and
for some wafers, the gm is lower at
RF than at DC, and the reverse is true
at other times. It is typical that the
gm changes occur at frequencies as
high as 300 MHZ.
These effects, plus short-channel
and Gunn-domain effects (which are
not accurately predicted by even the
most number-crunching of physicsbased FET models), create a different
scenario from silicon bipolar or MOS
modeling. Analytical models or twodimensional Monte Carlo simulations
of the device physics give roughly
correct results, but are in glaring error
on details. Also, DC drain characteristics are not representative of RF smallsignal or large-signal characteristics.
For example, Figure 2 shows the drain
current and voltage of a FET with a
fixed gate voltage that has been pulsed
Eric W. Strid is president of Cascade Microtech, Inc.. P.O. Box 2015, Beaverton, OR
97075-2015; (503) 626-8245.
MONOLITHIC TECHNOLOGY OCTOBER 1987
GaAs FETs
on or off quickly. When the drain
voltage is pulsed on (about 1 /us. or
less rise time), the current increases
with the slope of the high-frequency
drain conductance. If the voltage is
held fixed, then the electron traps fill
and deplete the channel more, thus
decreasing the drain current to its DC
value. If the drain voltage is pulsed off
quickly, then the current again follows
the slope of the high-frequency drain
characteristics down to zero. Consequently any accurate nonlinear III-V
FET modeling method must treat the
low and high-frequency drain I-V
characteristics separately.
Since most microwave circuits bias
the FET to an operating point and then
operate around that quiescent condition, most designers want measured
high-frequency device characteristics
at the expected bias condition. A linear
equivalent circuit taken at the bias
condition most closely simulates the
small-signal operating environment of
the FET. Nonlinear RF behavior has
been shown to be derivable through
small-signal models at a variety of bias
conditions.’ Whether linear or nonlinear RF models are the objective,
high-frequency linear equivalentcircuit extraction is the starting point.
Model Uniqueness
It is useful to consider the physical
origin and measurability of various
elements of the FET circuit (Fig. 1).
First, the transconductance ( g m)
models the current-controlling capability of the partially depleted channel.
gm varies with frequency, but rarely
have we seen gm variations above
1 GHz. The gate-to-source capacitance
(C s) models the gate-depletion region
an8.is the largest and most important
capacitance of the FET under saturated
bias. R, is the parasitic resistance of
the source Ohmic contact plus the
resistance of the channel between the
source metal and the gate-depletion
region.
A FET with only these three elements is shown in Figure 3a. R, causes
negative feedback, which decreases
the effects of both C,, and g, by a
factor of (1 + g, x R,). A little
algebra shows that the terminal
characteristics of the circuit in Figure
3a are identical to that of the circuit in
Figure 3b. Since the other elements of
MONOLITHIC TECHNOLOGY OCTOBER 1987
2. The pulsed-drain characteristic of a typical GaAs FET is presented.
Figure 1 generally have lower admittances than g, and Cgs the difference
between R, effects and g,, Cgs and
Ri, effects is second-order and is
usually evident only at frequencies
above about 10 GHZ. The measurable
effect of R, on the terminal parameters is most prominent in S12, but
unfortunately $2 is the most difficult
S-parameter of a saturated FET to
measure accurately.
There are some accepted methods
of measuring R, at DC.'~,'~ One of
these methods could be used to measure R, at DC, and this value of R,
could be constrained in the RF param-
eter extraction. However, these DC
methods measure R, with the F E T
biased into forward-gate conduction
and a very low drain voltage, a condition in which the gate-depletion region
is arguably very different from a saturated-bias condition. Experimental
results show that the R, from Sparameter extractions fits SQ best
when it is less than half of the D C
measured value. Either R, is changing
significantly with bias, or another
effect is involved with the S12 shape.
The measurement of R, in the circuit of Figure 1 is similarly complicated by uniqueness problems. The
3. Simplified FET equivalent circuits are shown, (a) having only C,,, intrinisic g,,,, and R,
elements; and (b) having only a series input resistance, extrinsic gate-source capacitance
C s, and extrinsic transconductance gm. The two circuit topologies are equivalent, and the
ePfect of R, in the full GaAs FET model is possible to discern only by using frequencies
above 10 GHz.
GaAs FETs
4. A 0.7 x 300-pm GaAs FET is measured with the probe tips contacting at the (a) outside
edges and (b) inside edges of the bond pads.
sum of R,, Rin, R,, and the effective
resistance g, x L,/C,, can be determined accurately, since this sum determines the magnitude of S11. However,
the only difference between R, and Ri,
is the connection point of C& Again,
the main difference in terminal effects
between R, and Ri” is a small change
in S12. R, models the gate-metal
resistance. Since R, is typically less
than an Ohm, it is probably measured
best on a gate-stripe test structure at
DC (or between the gate pads of a
r-gate FET at DC). The DC value can
then be used in the RF parameter
extraction.
A capacitance (Cdc) between the
intrinsic drain node and the junction
of C,, and Ri, in (Fig. 1) has been
shown to be physically necessary for
the conservation of charge. Since the
main difference between the effects
of Cdc and L, is barely visible only in
Sl2 at millimeter-wave frequenciesi
any extra complication of the model
with Cdc only leads to another element that cannot be uniquely determined below 26 GHz.
In the case of wafer-probed FETs,
the inductances L, and Ld model the
self-inductance of the connection
between the probe connection and the
effective center of the device. The measured values of L, and Ld agree with
predicted values of self-inductance.
Figure 4 shows the effect of measuring
a FET with the RF probes placed on the
outside of the test pads vs. the inside
of the pads close to the device. FetFitter was used to extract the equivalent circuit, with only R, constrained
(to a value measured at DC). The extracted equivalent circuits agree with
each other except for L, and Ld. as
expected.
The FET bond pads also contribute
small parasitic capacitances from the
gate or drain pads to the source metal
(or equivalently, the gate- and drainpad metal form little open-transmission-line stubs). Here again, the effects
of the gate- and drain-pad capacitances
are not uniquely discernible from C,,
and Cds. respectively, in terminal
measurements. A good way to find the
effect of pad capacitance is to measure
two or more FET structures built with
the same active area but different sizes
of pads. Figure 5 shows an example
of the differences between the measured Cgs and C& values because of
different pad lengths. A practical
problem with subtracting capacitance
values is that the C,, or Ck values can
vary enough on identical devices that
the effect of pad sizes is lost in the
noise of the capacitance value variations. In Figure 5, nine devices of each
type were measured in one area of the
wafer to get average values. Note that
C,, had much greater variations than
Cds. but that the same capacitance per
pad length was measured on each pad
after the C,, values were averaged.
The pad capacitance also compared
very well with the calculated metal
capacitance. This approach can be
used to determine fringing capacitances at the ends of FET fingers by
building FETS with various combinations of finger lengths and numbers.
MONOLITHIC TECHNOLOGY OCTOBER 1987
GaAs FETs
5. Since the FET capacitances cannot be uniquely extracted from S-parameter data, two or
more oad sizes are used to measure the effect of the pad capacitances; then the Cds and C,,
of the’active area alone can be extrapolated.
All ion-implanted GaAs FETS that
we have measured have shown an
interesting effect. At drain-source
voltages greater than about 3 or 4
Volts, the $2 magnitude increases at
frequencies above about 15 GHz, and
often the S22 magnitude exceeds unity
above about 20 GHz (Fig.6).2 The
effect is stronger as Vds increases, and
stronger with longer gate-drain
spacings. The measured $2 values are
well modeled by a negative-drainparasitic resistance Rd. (Note that at
low frequencies the small resistance
Rd is in series with the high impedance
of I& and C& Only above I5 or 20
GHz canRd be measured uniquely,
since the C& impedance drops to a
range where the RF effect is different
from the I& effect.)
Develop a Data Base
of FET Parameters
The philosophy of the FetFitter software routines is to gather a statistically significant quantity of FET
equivalent-circuit data. In MIC design,
the accuracy of FET data is not so
critical, since both inaccuracies in the
measurement and variations from FET
to FET can be compensated by manual
tuning. MMIC design, on the other
hand, needs accurate average and
standard-deviation information. For
example, Figure 7 shows the result of
measuring 1,030 test FETS on about
50 production wafers, fitting each to
a linear equivalent circuit and plotting
the instances of the measured values
of the high-frequency Pds in a histogram. The parameter spread is signifi-
Computed 0
- 611
- - St2 Radius: 0 . 1 0
_ _ 92, Radius: 5 . 0 0
Measured X
- 622
0.046 - 20.15 GHz
0.75%
EII
3.99%
612
2.93%
621
1.12%
622
15.76 GHz
Ft
14.32 GHz
St&
Q,,,&~ 37.49 msec.
38.02 msec.
Qm
403.17 fF
CQS
19.69 fF
94.69 fF
2
5.22 ps.
Tt
0.60 Ohm
RQ
28.36
kilohm
R95
4.04 Ohm
Rin
0.37 Ohm
Rs
574.99 Ohm
%s
-5.19 Ohm
Rd
49.4 pH
L9
2.5 pH
73.2 pH
6. Measured S-parameters of a GaAs FET are biased with 4 Volts on the drain and 0 Volts on
the gate. The SZ2 shape is well modeled by a negative drain resistance Rd.
MONOLITHIC TECHNOLOGY OCTOBER
1987
cant (and this is a relatively good
process), obviating the need to try
ranges of parameters during the design
phase. Note that the parameter distribution is basically Gaussian.
FET S-parameter windows can be
defined by specifying ranges of each
element in the linear equivalent circuit. This is a much more compact
means of specifying windows than
listing S-parameter ranges directly,
since the equivalent circuit applies to
any frequency.
Figure 8 shows a Monte Carlo
simulation of a MMIC amplifier operating near its maximum available gain,
using Gaussian FET equivalent-circuit
parameter distributions. Note that the
yield of a given range of gains or other
specified parameters can be read
directly from such histograms by integrating the area under the distribution
between the performance limits.
The simulation in Figure 8 was done
without any correlations between FET
element variations. Predictions of FET
parameters from physical parameters
(such as gate length, channel thickness, and channel doping) would
suggest that the equivalent-circuit
parameters should show a significant
correlation between the various
parameters. If good correlations can
be verified experimentally, the number
of worst-case parameter-variation
combinations can be reduced greatly.
For example, if there are six uncorrelated parameter variations in the FET
elements, 64 worst-case simulations
would be necessary in general. However, if the six elements can be shown
to vary with only three significant
independent variations, only eight
worst-case simulations are required.
Continuous monitoring of RF parameters is required for yield improvement
efforts, just as DC parameter monitoring is done. Obviously, one of the
goals of a manufacturing operation
must be to decrease the standard
deviations of as many parameters as
possible. Gathering enough data
implies measurement and equivalentcircuit extraction on hundreds to
thousands of FETS each month, and
often at several bias conditions for
each FET. The throughput necessary
for manufacturing monitoring implies
a great deal of S-parameter data, but
the circuit and device designers only
GaAs FWTs
wafer-level ATE has been created, and
for the first time microwave designers
can design without guesswork.
n
32
69
66
63
60
57
54
51
48
45
42
35
References
36
1. E.W. Strid, "26-GHz Wafer Probing for
MMIC Development and Manufacture,”
Microwave Journal, Aug. 1986.
2. K. Jones, et. al., “Millimeter-Wave Wafer
Probes Span O-50 "GHz," Microwave Journal, April 1987.
3. Cascade Microtech Model 42 Probe Station
Operating Manual, 1987.
4. P. Wolf, “Microwave Properties of
Schottky-Barrier Field-Effect Transistors,”
IBM J. Res. Develop., March 1970,
pp. 125-41.
5. P.L. Hower and N.G. Bechtel, “Current
Saturation and Small-Signal Characteristics of GaAs Field-Effect Transistors,”
IEEE Trans. on ED, March 1973,
pp. 213-20.
6. R.A. Pucel, et al., “Signal and Noise
Properties of Gallium Arsenide Field-Effect
Transistors,” Advances in Electron Physics
(New York: Academic Press, 1975),
pp. 195-265.
7. R.H. Engelmann and C.A. Leichti, “Bias
Dependence of GaAs and InP MESFET
Parameters,” IEEE Trans. on ED, NOV.
1977, pp. 1288-96.
8. M.S. Shur and L.F. Eastman, CurrentVoltage Characteristics, Small-Signal
Parameters, and Switching Times of GaAs
FETs," IEEE Trans. on ED, June 1978,
pp. 606-11.
9. W.R. Curtice and M. Ettenbere. "N-EXT, a
New Software Tool for Large-Signal GaAs
FET Circuit Design,” RCA Review, Sept.
1985, pp. 321-40.
10. H. Statz, et al., "GaAs"GaAs FET Device and
Circuit Simulation in Spice,” IEEE Trans.
on ED, Feb. 1987, pp. 160-69.
11. L.E. Larson, “An Improved GaAs MESFET
Equivalent Circuit Model for Analog Integrated Circuit Applications,” IEEE J. of
Solid State Circuits, Aug. 1987,
pp. 567-74.
12. N. Scheinburg, “High-Speed GaAs Operational Amplifier,” IEEE J. of Solid State
Circuits, Aug. 1987, pp. 522-27.
13. H. Fukui, “Determination of the Basic
Device Parameters of a GaAs MESFET,”
BSJT March 1979, pp. 771-97.
14. R.P. Holmstrom and W.L. Bloss, “A Gate
Probe Method of Determining Parasitic
Resistance in MESFETs," IEEE EDL July
1986, pp. 410-12.
15. M.B. Steer and R.J. Trew, “High-Frequency
Limits of Millimeter-Wave Transistors,”
I E E E EDL, Nov. 1968, pp. 640-42.
33
30
27
24
21
18
15
12
9
6
3
0
300
7. The measured high-frequency drain conductance on many test FETs is shown.
s
Magnitude 21
+
at 16 GHz
2.246
in 500 Trials
3.675
N
Ilncr=0.1409)
5.0
4.905
8. A Monte Carlo simulation of a MMIC amplifier uses Gaussian FET equivalent-circuit
parameter distributions.
want the equivalent-circuit data. The
FetFitter software package drives bias
supplies, a network analyzer, and an
autoprober; and can extract the linear
equivalent circuit elements in less than
10 seconds each. It logs die numbers,
bias conditions, and either or both
S-parameter or equivalent-circuit data
in an ASCII data file. It can also sort
the data files to output parameter
average and standard-deviation information. Thus, the first microwave
MONOLITHIC TECHNOLOGY OCTOBER 1987
FefFitter Operating
Environment
The FetFitter software package is
available for use with the HP 9000
series workstations and peripherals
FetFitter supports selected autoprobers, and various measurement,
voltage/current supply and multimeter hardware.
Please refer to the FetFitter
datasheet for details.
Wafer Probes. Cascade probes
provide clean, accurate on-wafer
measurement from dc to 18 GHz,
26.5 GHz or 50 GHz. Probes with 2
to 11 contacts, with a wide range of
standard and custom footprints are
available. The probes provide the
device interface for chips, hybrids,
and Ics containing up to 44 bond
pads.
Probe Stations. Cascade probe
Autoprober Top Plates. Allow
Probe Cards. Hold Cascade
stations provide the precision
mechanical system needed for manual on-wafer measurements.
probes in precise alignment for use
in many manual and automatic
orobers.
Cascade probes and probe cards to
be used with a wide range of popular autoprobers.
Support and Update Policy
Cascade Microtech software
includes one year of direct factory
support, including all program
updates and application notes.
CASCADE MICROTECH
TM
Cascade Microtech, Inc., 2430 NW 206th Avenue, Beaverton, OR 97219 Telephone (503) 601-1000, e-mail: [email protected]
Copywright 1987 Cascade Microteh, Inc. FetFitter 1M IS a trademark of Cascade Microtech, Inc
All specificatiions and information subject to change without notice
HP is a trademark of Hewlett-Packard Corp
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