Download final documentation - EE Senior Design

The University of
Notre Dame
Team SYNTH:
FINAL DOCUMENTATION
William Andrews
Angela McKenzie
John Simmons
EE Senior Design
2007-2008
Prof. Schafer
Table of Contents
Team SYNTH
FINAL DOCUMENTATION
I. Introduction..........................................3
Objective............................................3
Problem..............................................3
Solution.............................................4
Final Implementation.................................4
II. Detailed Project Description..........................6
System Theory of Operation...........................6
Software..................................................6
Hardware..................................................6
Modifications.............................................7
Block Diagrams.......................................8
Subsystems..........................................10
MIDI.....................................................10
Envelope Generator.......................................17
Voltage Controlled Oscillator............................24
Low Frequency Oscillator.................................28
Voltage Controlled Filter................................32
Voltage Controlled Amplifier.............................36
Ring Modulator...........................................41
Power Circuit............................................45
System Integration Testing..........................49
III. User Manual.........................................51
IV. Conclusion...........................................53
V. Appendices............................................54
I. INTRODUCTION
Objective
2
Team SYNTH
FINAL DOCUMENTATION
3
The vision for project SYNTH was to create a modular synthesizing/music
mixing system that afforded users not only the ability and dexterity to create sounds
unique to their tastes, but to also present to the user a more tactile and interface friendly
means of doing so. The only restriction to the user is the limit of his creativity. The
primary objective was to create an affordable music system that allowed users enough
control to keep them satisfied but not too many options to be daunting.
Problem
Our primary objective is to create a relatively affordable music system in which
the user is afforded technical and higher level options in music creation. Current music
synthesizers and mixers run on the order of hundreds to thousands of dollars. We want a
product that is relatively low cost but also offers control.
Current issues facing amateur music makers are the various investments involved
(monetarily and time wise) and mobility. Because current higher end music synthesizers
and mixers of are relatively expensive, such systems may not be conducive to the
hobbyist or amateur who is looking for an affordable system in which to dabble. There
currently exists a synthesizer market, containing various types of music synthesizers and
mixers. Other music products such as electronic keyboards also exist that contain special
features such as various pre recorded sounds and recording capabilities. A problem is
that while individual units exist—one for mixing music, one for synthesizing music, one
for actual music creation, external hardware for saving samples—there lacks a device that
utilizes all of these attributes in a compact, affordable and user friendly package.
Solution
Team SYNTH
FINAL DOCUMENTATION
4
Per our proposal, we planned to design and construct a self-contained, high
caliber, affordable music system that acts as the common link between multiple music
creation apparatuses. A top priority is to produce a quality system where professional
experience in music creation is not needed for device operation, thus addressing the issue
of an extensive learning curve. By integrating recording capabilities and audio
processing, the user will be able to create and store music without needing an additional
system.
Final Implementation
Originally we planned on making a self-contained system that did not require a
computer or other recording source to save music. There were problems in fully
implementing an on board file saving system. The time that it would have taken to
develop the on board saving capability as well as institute the other software features
desire would be a project in itself. What was desired for implementation was much more
suited for a Computer Engineering senior design project. We initially scaled down from
on-board recording to computer recording with an onboard analog-digital-converter
(ADC) and Matlab converting to WAV. However, a variety of issues surfaced with the
ADC chip and we eventually decided to focus on the more electrical engineering aspects
of our original design, namely the MIDI input and the analog synthesizer circuits.
Additionally, we planned on using an LCD screen to display pertinent information as
well as visual effects to the user. However, as we trimmed down our project, the number
of digital components that could interact with the device kept decreasing; we eventually
eliminated it to focus on the core aspects of the project.
Team SYNTH
FINAL DOCUMENTATION
5
Even with this added focus, we ran into our share of problems. We decided that
making boards for our analog component heavy circuits would be exceedingly costly, so
instead we purchased solderable protoboards and wired everything together. This proved
to be a bad decision, as there were innumerable points of failure on each circuit and
debugging the circuits became a chore that cost us most of the second half of the
semester.
The second issue concerned implementing the MIDI protocol on the
microcontroller. We will discuss this more in the MIDI subsystem section.
The final issue we had dealt with the voltage controlled filter circuit. The circuit
had been verified on the protoboards, but once it was soldered, we could never get it
working effectively, despite much debugging. Because of this we had to adjust our block
diagram somewhat. However, because of the modular nature of most of our circuits, this
was a fairly minor change.
Additionally, we wanted to make a unit that was able to be expanded and
reconfigured by those feeling up to the task. With this in mind, we designed a case that
allowed the user to remove a side cover and the power circuit and slide out the two main
boards. This allows a user to expand the system if they outgrow it.
II. Detailed Project Description
System Theory of Operation
Team SYNTH
FINAL DOCUMENTATION
6
Software
The keyboard outputs a MIDI signal as current between two wires. This current
is converted into a 31.25 kbaud asynchronous serial signal using a 6N137 Optoisolator.
This serial signal is fed into the EUSART of a Microchip PIC LF4620 microcontroller.
The microcontroller interprets the note-on and note-off commands from the keyboard and
generates two output signals.
The first signal is the pitch waveform, which is a square wave that oscillates at the
frequency corresponding to the note pressed. The second is a gate signal that feeds into
the envelope generator.
Hardware
The amplitude of the pitch waveform is modified by the voltage controlled
amplifier (VCA). The input voltage is based on the output of the envelope generator.
Our envelope is created through attack, decay, sustain, and release inputs, as well
as input from the gate pulse. Attack is used when the key is initially pressed. Prompted
by the gate, attack indicates the time taken for the sound to reach its maximum volume.
Decay follows, indicating the volume at which the sound is currently set, entering the
sustain phase. Sustain corresponds to the volume level of the note as longs as the key is
pressed. Release controls the time until the note fades once the gate is removed. This
overall four mode system stores information on how the sound levels change before,
during, and after key pushes. The final analog output of the envelope generator is the
inputted into the voltage controlled amplifier.
Team SYNTH
FINAL DOCUMENTATION
7
The Voltage Controlled Oscillator (VCO) output a square, ramp or sawtooth wave
based on user input. The frequency of this wave can be adjusted over the human hearing
spectrum using rough and fine potentiometers. The VCO feeds into the Voltage
Controlled Filter (VCF) which applies any combination of low-pass, band-pass and highpass filters. The cutoff frequency of these filters is determined by the control voltage.
The user can either control it manually using a potentiometer, or they can use the Low
Frequency Oscillator (LFO). This generates waveforms that vary between 40 Hz and
0.002 Hz. If desired, the VCF has the option of resonance, further enhancing the sound.
The output of the VCF is modulated with the output of the VCA to generate our
final signal.
Modifications
We had to slightly modify our system because our voltage controlled filter wasn’t
fully functional. Since the filtering part wasn’t working right, but the resonance was, we
decided to mix the resonance into the final signal to provide a sort of rhythm section in
the background. We disconnected the output of the VCO from the input of the VCF and
put it directly into the ring modulator. This allowed us to modulate our keyboard tones
and still have some resonance in the background. We will get into the details of how the
VCF isn’t working later in the paper.
Original Block Diagram
Team SYNTH
FINAL DOCUMENTATION
8
Square
Ramp
Low Frequency
Oscillator (LFO)
Green: Digital
Pink: Analog
Keyboard
Switch
Square
MIDI Input
Ramp
Sawtooth
Microcontroller
Control Knob
Pitch
Waveform
Gate
Voltage
Controlled
Oscillator
(VCO)
Voltage
Controlled
Filter (VCF)
Voltage
Controlled
Amplifier (VCA)
Ring
Modulator
Envelope
Generator
Attack
Decay
Sustain
Release
A
Modified Block Diagram
D
S
R
Keyboard
Audio Out
Team SYNTH
FINAL DOCUMENTATION
9
Square
Ramp
Low Frequency
Oscillator (LFO)
Green: Digital
Pink: Analog
Keyboard
Switch
Square
MIDI Input
Ramp
Sawtooth
Microcontroller
Pitch
Waveform
Gate
Voltage
Controlled
Oscillator
(VCO)
Voltage
Controlled
Filter (VCF)
Voltage
Controlled
Amplifier (VCA)
Ring
Modulator
Envelope
Generator
Attack
Decay
Sustain
Release
A
Subsystems
Control Knob
D
S
R
Keyboard
Audio Out
Team SYNTH
FINAL DOCUMENTATION
10
MIDI
The MIDI circuit is based on the Asynchronous receiver module of the Enhanced
Universal Asynchronous Receiver Transmitter (EUSART) of the 18F4620
microcontroller. The Asynchronous signal is created from the MIDI output of the MIDI
Output Keyboard and has a baud rate of 31.25 Kbauds. The MIDI signal sends three
bytes during its cycle. The first byte of information is a 0x90 in hexadecimal which
represents a note-on key press. The second byte of information is the pitch byte. This
represents the note at which the note should be played. The third byte represents the
velocity or duration at which the note should be played.
1
1
This schematic was taken from a website that is no longer online.
Team SYNTH
FINAL DOCUMENTATION
11
The MIDI port is read on pins 4 and 5 as shown in the above circuit. It is
connected to the microcontroller through an opto-isolator. The MIDI signal is 10 bits in
total: a start bit, 8 data bits, and an end bit. There are 128 possible MIDI notes, ranging
from 0 to 127. Each bit takes 32 us and each data byte is 10 bits long (including start and
stop bits), so each cycle takes 320 us.
The following code gathers the data polled from the ESUART and generates an
output tone on the microcontroller. The code generates a tone when a key is pressed on
the keyboard. The software processes the MIDI signal when a key on the keyboard is
pressed through communication with the EUSART module. Issues arose with the
gathering and processing of the MIDI signal. The Asynchronous reception module of the
microcontroller can only gather three bytes of information before enabling an interrupt.
During the implementation process, the asynchronous reception module would
sometimes cause errors. The ESUART buffer would be overrun with data and would
have to be reset manually by clearing the MCLR pin of the microcontroller. In order to
eliminate this issue, we had to remove time-dependent code such as delays. In further
implementations, we would hope that the register of the receiver would not overflow.
Another problem faced in MIDI processing concerned overall timing. Timing
became an issue in processing MIDI data if it ever became out of sync with the reception.
Should this occur, the incoming MIDI signal would not be processed.
CODE:
// YIN SYNTH CODE
#include <system.h>
#include "EESD.h"
#pragma DATA _CONFIG1H, _OSC_HS_1H
#pragma DATA _CONFIG2H, _WDT_OFF_2H
Team SYNTH
FINAL DOCUMENTATION
#pragma DATA _CONFIG4L, _LVP_OFF_4L
#pragma DATA _CONFIG3H, _MCLRE_ON_3H
#pragma CLOCK_FREQ 20000000
#define
#define
#define
#define
void
void
void
void
void
void
void
void
void
void
void
void
void
void
void
void
void
char
void
yin_in
yin_out
idle
note_on
portc.1
portc.2
0x01
0x02
timer3_refresh(char,char);
timer3_init(void);
tone_width2(char,char);
timer1_refresh(char,char);
timer1_init(void);
timer0_init(void);
timer0_refresh(char,char);
play_note(char note, int sec);
LCD_shift(char* char1);
tone(char,char,char,char,int);
tone_width(char,char);
master_init(void);
slave_init(void);
ssp_send(char);
ssp_call_receive(void);
button_select(void);
init_serial(void);
getc(void);
serial_printf( const char*);
void main(void)
{
trisb.0 = 0; // sets portb.0 as an output
trisb.1 = 0; // sets portb.1 as an output
trisb.2 = 0; // sets portb.2 as an output
trisb.3 = 0; // sets portb.3 as an output
trisb.4 = 0; // sets portb.4 as an output
trisb.5 = 0; // sets portb.5 as an output
trisc.1 = 0; // sets portc.1 as an output
trisd = 0x00; // sets portd as an output
trisa.0 = 1; // sets porta.0 as an input
master_init();
init_serial();
timer0_init();
timer1_init();
timer3_init();
char tmr3_msb,tmr3_lsb,tmr1_msb,tmr1_lsb,tmr0_msb,tmr0_lsb,a,b;
tmr0_msb = 0xF5;
tmr0_lsb = 0xF9;
tmr1_msb = 0x75;
tmr1_lsb = 0x00;
tmr3_msb = 0x75;
tmr3_lsb = 0x00;
12
Team SYNTH
FINAL DOCUMENTATION
char count = 0x00;
char count1 = 0x00;
char count2 = 0x00;
char state
= idle;
char nextstate;
int note_state = false;
while(1)
{
switch(state)
{
case idle:
count = getc();
if (rcsta.1 == 1)
{ rcsta.4 = 0; } // Clearing CREN
if(count == 0xFE)
{
nextstate = idle;
state = nextstate;
note_state = false;
}
else
{
nextstate = note_on;
state = nextstate;
note_state = true;
}
break;
case note_on:
count1 = getc();
if (rcsta.1 == 1)
{ rcsta.4 = 0; }// Clearing CREN
while(note_state)
{
tone(tmr0_msb,tmr0_lsb,count1 + 0xA0,count1 + 0xA0,5);
count = getc();
if (rcsta.1 == 1)
{ rcsta.4 = 0; }// Clearing CREN
if(count != 0xFE)
{
nextstate = note_on;
state = nextstate;
note_state = true;
}
else
{
nextstate = idle;
state = nextstate;
13
Team SYNTH
FINAL DOCUMENTATION
note_state = false;
}
}
break;
}
}
}
void tone(char tmr0_msb,char tmr0_lsb,char tmr1_msb,char tmr1_lsb, int
sec)
{
int j;
for(j = 0; j < sec; j++)
{
timer0_refresh(tmr0_msb,tmr0_lsb);
portb.1 = 0;
while(!intcon.2)
{
tone_width(tmr1_msb,tmr1_lsb);
portb.1 = 1;
}
}
}
void tone_width(char tmr1_msb,char tmr1_lsb)
{
while(!pir1.0)
{
portb.0 = 1;
}
timer1_refresh(tmr1_msb,tmr1_lsb);
while(!pir1.0)
{
portb.0 = 0;
}
timer1_refresh(tmr1_msb,tmr1_lsb);
}
void timer3_init(void)
{
pie2.1 = 0x01; // enables timer3 interrupt
pir2.1 = 0x00; // clears timer3 interrupt flag
t3con = 0xB9; // sets up timer3
14
Team SYNTH
tmr3h = 0x00;
tmr3l = 0x00;
FINAL DOCUMENTATION
// clears tmr1h
// clears tmr1l
}
void timer3_refresh(char tmr3_msb,char tmr3_lsb)
{
pir2.1 = 0x00; // clears timer3 interrupt flag
tmr3l = tmr3_msb;
// sets the lsb of 16 bit timer
tmr3h = tmr3_lsb;
// sets the msb of 16 bit timer
}
void timer1_refresh(char tmr1_msb,char tmr1_lsb)
{
pir1.0 = 0x00; // clears timer1 interrupt flag
tmr1l = tmr1_msb;
// sets the lsb of 16 bit timer
tmr1h = tmr1_lsb;
// sets the msb of 16 bit timer
}
void timer1_init(void)
{
pie1.0 = 0x01; // enables timer1 interrupt
pir1.0 = 0x00; // clears timer1 interrupt flag
t1con = 0xD9; // sets up timer1
tmr1h = 0x00; // clears tmr1h
tmr1l = 0x00; // clears tmr1l
}
void timer0_init(void)
{
intcon.5 = 0x01; //
intcon.2 = 0x00; //
t0con = 0x84;
//
tmr0l = 0x00;
//
tmr0h = 0x00;
//
}
enables timer0 interrupt
clears timer0 interrupt flag
sets up timer0
sets the lsb of 16 bit timer
sets the msb of 16 bit timer
void timer0_refresh(char tmr0_msb,char tmr0_lsb)
{
intcon.2 = 0x00; // clears timer0 interrupt flag
tmr0l = tmr0_lsb; // sets the lsb of 16 bit timer
tmr0h = tmr0_msb; // sets the msb of 16 bit timer
}
void master_init(void)
{
pie1.3 = 1; // SSP Flag enabled
pir1.3 = 0; // SSP Flag cleared
trisc.5 = 0; // SDO
trisc.3 = 0; // SCK Master Mode
trisc.2 = 0;
portc.2 = 0;
15
Team SYNTH
FINAL DOCUMENTATION
trisc.1 = 0;
portc.1 = 0;
trisa.5 = 1; // ~SS
sspcon1 = 0x20;
sspstat = 0x80;
}
void slave_init(void)
{
pie1.3 = 1; // SSP Flag enabled
pir1.3 = 0; // SSP Flag cleared
trisc.5 = 0; // SDO
trisc.3 = 1; // SCK Slave Mode
trisc.2 = 0;
portc.2 = 0;
trisc.1 = 0;
portc.1 = 0;
trisa.5 = 1; // ~SS
sspcon1 = 0x24;
sspstat = 0x00;
}
void ssp_send(char data)
{
sspbuf = data;
}
void init_serial(void)
{
// Setting the registers in order to enable EUSART
trisc.6 = 1;
portc.6 = 0;
trisc.7 = 1;
portc.7 = 0;
rcsta.7 = 1; // SPEN
rcsta.6 = 0; // RX9
rcsta.4 = 1; // CREN
intcon.7 = 1; // PEIE
intcon.6 = 1; // GIE
txsta.4 = 0; // SYNC
txsta.2 = 0; // BRGH
baudcon.3 = 0; // BRG16
pie1.5 = 1;
pir1.5 = 0;
// Enabling interrupt flag for receiving
//Clearing RCIF flag
// Port E is the designated port to the RS-232 chip
16
Team SYNTH
FINAL DOCUMENTATION
17
trise.2 = 0;
porte.2 = 1;
// Registers that are used in EUSART
spbrg = 0x09;
}
char getc(void)
{
while(!pir1.5);
char output = rcreg;
return output;
}
Envelope Generator
Function
The function of the envelope generator is to create an ADSR envelope that has
five controllable parameters. This envelope could feed into any control voltage input on
our circuits, but we are using it to control the amplitude or loudness of our keyboard
output.
We got the schematic for the envelope generator from Ray Wilson’s website.2 We
modified the design somewhat, removing the option for longer times by taking out
capacitor C16 and its equivalent switch.
Inputs
Attack time – The time it takes for the envelope to reach its peak (10 V in this case)
Decay time – The time it takes for the envelope to reach its sustain level. This is
somewhere between 0 and 10 volts, and is user-adjustable
Sustain level – The voltage level that the signal decays to while the gate is being held
Release time – The time it takes for the envelope to reach 0 volts once the gate is released
Level – The output level of the envelope
2
http://musicfromouterspace.com/analogsynth/ADSR001/ADSR001.html
Team SYNTH
FINAL DOCUMENTATION
18
These parameters are all controllable by the user using potentiometers on the
interface. In addition to the 5 potentiometers, there are three other inputs to the circuit.
The first is the trigger signal. This is a short pulse generated by a keyboard when a note
is pressed. The second is the gate signal. It is a signal that remains high for as long as
the key is pressed. The third input is a push button that simulates a gate signal. This was
mostly used for testing.
Output
The only output of the envelope generator is the ADSR envelope itself.
3
How it works
When there is no input on the gate or trigger, point A on U4-B is low, while point
R on U4-C is high. This causes the output of the U5-B operational amplifier to be
grounded, since its non-inverting input is connected to ground. If a voltage greater than 2
volts is applied to the gate input (or if the manual gate is pressed), it sends a positive
3
http://musicfromouterspace.com/analogsynth/ADSR001/ADSR001_cyclediags.gif
Team SYNTH
FINAL DOCUMENTATION
19
voltage to pin one of the U2-A U2-B gates, which form a flip-flop circuit. When the
voltage is high, it flips the output of U2-B high as well, which causes point A to go high
and point R to simultaneously go low. Once this happens, capacitor C15 begins charging
since it’s now exposed to 12 V and not ground. The rate that this occurs depends on the
resistance value of R16, which is the attack control. This controls how quickly the
envelope reaches its peak voltage.
While this is happening, the circuit of U5-D is providing around 10 volts to the
inverting input of op-amp U5-C, which is functioning as a comparator. When the output
of U5-B surpasses 10 volts, it causes the output of U5-C to quickly go from negative to
positive voltage. This spike once again triggers the U2-A and U2-B flip flop, sending
point R low and shutting off the envelope from its 12 volt source. Since the gate is still
being applied, pin 13 of U2-D is still low and the switch at point R is still off. However,
point D is high, and U4-A is active. Capacitor C15 will drop to the sustain level set by
R18 at a rate set R17 (the decay potentiometer).
The envelope will remain at this level until the gate is released. When this
happens, point D goes low and point R goes high. This exposes the output to ground
once again and the capacitor C15 discharges at a rate dependent upon the release
resistance.
Testing
We tested this circuit by first observing the outputs at point R and A. We made
sure that point R was high and A was low with no input. Then we checked to see if these
voltages swapped when the gate push button was pressed. If it didn’t (and it didn’t quite
a bit), we would trace the output from the pushbutton all the way to the inputs of the
Team SYNTH
FINAL DOCUMENTATION
20
NOR gates to see if there was any interference from any other components or if
something had disconnected. We verified the switches were acting properly with the
inputs provided, and that the capacitor was charging as it was supposed to. Then we
checked the output of the comparator and verified that it was producing the negative to
positive spike when the output reached 10 volts. We made sure that this spike turned off
point A while turning on point D and leaving point R off. We made sure that the output
remained at the proper sustain level. Then we verified that releasing the gate turned on
point R and turned off point D. We hooked up the oscilloscope lead to the ADSR point
before the level potentiometer to verify that that part of the circuit wasn’t the point of
failure. Finally, we put a lead on the ADSR output and watched the voltages as we tried
different positions on the input potentiometers, as well as different inputs to the gate and
trigger.
Oscilloscope Readings
An example of a full attack, decay, sustain release cycle
Team SYNTH
FINAL DOCUMENTATION
A = 0, D = 0, S ~ 5V, R = 0
Another example
21
Team SYNTH
Envelope Generator Schematic
FINAL DOCUMENTATION
22
Team SYNTH
FINAL DOCUMENTATION
Voltage Controlled Oscillator (VCO)
23
Team SYNTH
FINAL DOCUMENTATION
24
Function
This circuit generates three distinct oscillators that all oscillate at the same
frequency. The user controls the frequency by adjust coarse and fine potentiometers. We
adapted this circuit from Ray Stone’s website.4 We adjusted it by removing the sine
output, as well as the CV in, linear in and sync in and out. Additionally we removed the
pulse width modulation in. We decided that for our purpose we didn’t need these
features on our VCO.
Inputs
Two potentiometers are the main input for our VCO. They both adjust the
frequency of the oscillators. The coarse adjust goes through the full audio spectrum,
while the fine allows for fine tuning after using the coarse. The third input is a switch
that allows the user to pick between using a square wave and a triangle wave.
Outputs
The VCO outputs three different waveforms: a square wave, a triangle wave and a
ramp wave. We decided to not use the ramp for this project.
How it works
IC2-A and IC2-B and the components around them take an input voltage and
convert it over to a current with a logarithmic response. The current doubles for every
volt applied to the input. IC2-C is an integrator that works similarly to the integrator in
the LFO. IC2-D is a comparator that resets the voltage at the input of IC2-C, which
creates the oscillation. This creates the ramp wave which oscillates about ground.
4
http://musicfromouterspace.com/analogsynth/vco.html
Team SYNTH
FINAL DOCUMENTATION
25
IC3-D and the associated circuitry rectify the ramp wave into the triangle wave.
IC4-A and IC4-B are a comparator that takes the triangle wave and turns it into the
square wave.
Testing
This circuit was constructed in pieces. Since the way it works is that it generates
a ramp, which is then converted into a triangle, which is in turn converted into a square
wave, we started with the ramp oscillator circuit. We constructed up to the raw ramp
output, then tested using the oscilloscope. We found that we got a waveform with a
frequency that varied with changing the values of the potentiometers. After this we
constructed the remaining circuits, testing along the way. Once we verified they were all
working properly, we needed to adjust the trimpots to make the waves look better. We
adjust R17 to make the triangles symmetrical. R1 is to null out some of the glitch
showing at the peak shown in the oscilloscope waveforms. R20 adjusts the DC offset.
One thing to note is that we were using a generic op-amp for this circuit and getting bad
response from both the triangle waves and the square wave. Once we replaced these with
TL084s, all the problems went away.
Team SYNTH
FINAL DOCUMENTATION
Oscilloscope Reading
An Example of the three waveforms: Triangle, Ramp, Square
26
Team SYNTH
FINAL DOCUMENTATION
Voltage Controlled Oscillator Schematic
27
Team SYNTH
FINAL DOCUMENTATION
28
Low Frequency Oscillator (LFO)
Function
The purpose of this circuit is to produce an oscillation that is below audible range
and used as a control voltage input. We were prompted to make this circuit while testing
the voltage controlled filter with a low frequency control voltage. This circuit will output
either a square wave or a triangle wave. Its high frequency is 40 Hz and will take
minutes to cycle through at a low setting. Additionally, the triangle wave is adjustable to
any point between sawtooth, ramp, and triangle waves.
We also got this circuit from Ray Stone’s website.5 Since it’s such a basic circuit,
the only modification we made was to add a switch to toggle between the two outputs.
Inputs
There are two potentiometer inputs to this circuit. The first directly controls the
frequency of the output. The second controls the shape of the triangle wave.
Additionally, there are two switches. One changes the value of the capacitors used to
create the oscillation, which allows options for shorter and longer periods. The second
allows the user to choose between square and triangle waves.
Outputs
There are two outputs. The first is the LFO waveform. The second is an LED
that is on whenever the circuit is high, which amounts to blinking at the rate of
oscillation.
5
http://musicfromouterspace.com/analogsynth/coolnewlfo.html
Team SYNTH
FINAL DOCUMENTATION
29
How it works
IC1-D is an integrator that is central to this oscillator. As current flows into or out
of it, the voltage level rises or falls linearly. IC1-C is a unity gain follower. The LFO
frequency potentiometer (R14) determines the output voltage of IC1-C, which in turn
determines the current through R1. IC1-B is a comparator that is currently set at 6 volts.
When the output of the integrator increases past 6 volts, IC1-B flips from negative to
positive. This causes the current flowing into the integrator to change direction, which
causes a change in voltage direction. This allows for a +/- 6 volt waveform, which is
consistent with our other components.
IC1-B’s output is the square waveform, but we need IC1-A to attenuate to the
standard +/- 6 volts. The potentiometer at R13 controls how much current flows for
positive and negative, which allows us to control the triangle wave shape. Changing the
value of the capacitors that form the integrator using S1 changes the rate at which the
voltage changes relative to the current.
Testing
We didn’t have very much trouble with this circuit since it was fairly simple. It
didn’t work at first so we did a visual test and found that a resistor wasn’t properly
connected. We tested it by attaching an oscilloscope to each of the outputs and observing
the responses. We verified that the frequency was adjusting appropriately.
Team SYNTH
FINAL DOCUMENTATION
Oscilloscope Readings
An example of the square wave generated
The square wave at 38.80 Hz
The triangle output as you adjust from ramp to triangle to sawtooth
30
Team SYNTH
FINAL DOCUMENTATION
Low Frequency Oscillator Schematic
31
Team SYNTH
FINAL DOCUMENTATION
32
Voltage Controlled Filter (VCF)
Function
The purpose of this circuit is to take an audio input and pass it through a band
pass, low pass, high pass filter or any combination of all three. The cut-off frequency of
these three filters is controlled via a potentiometer or a control voltage. We chose to use
the LFO to control it. Additionally, you can add resonance to the output signal.
The inspiration for this VCF came from Ken Stone.6 He in turn got it from an
article written by Nyle Steiner concerning his Steiner-Parker Synthacon VCF from
Electronic Design 25, Dec 6th, 1974.
Inputs
The inputs for the VCF include an onboard mixer circuit. This allows level
controls for inputs to all three filters. In addition to these three potentiometers, there is
one for the initial cutoff frequency, the amount of resonance that should be present in the
circuit. There is a control voltage input that also controls the cutoff frequency, as well as
a level potentiometer for that input.
Output
There is one output for the VCF that takes the output of the filters and sends it to
the ring modulator.
How it works
The main feature of this circuit is the 12 diode chain. These diodes act as a
voltage controlled resistor. As the voltage at either end increases, so does the resistance
6
http://cgs.synth.net/modules/pic/schem_cgs35euro_steiner.gif
Team SYNTH
FINAL DOCUMENTATION
33
in the chain. This change in resistance combined with the capacitors C9, C10, and C11
create an RC filter with adjustable cut-off frequency.
The voltage comes from Q3 and Q4, and differential amplifier that produces
opposing signals at each emitter. The voltage comes from the circuitry at the base of Q3.
The reason for the opposed signals is to eliminate control voltage bleed through. We did
this by adjusting the CV reject potentiometer.
The three filters are formed through where they enter the diode chain. This is
what causes the different pass bands. The amps and potentiometers are part of the mixer
circuit which allows different signals to be entered.
The resonance in the circuit is due to Q1 and Q2. These form a Sziklai Pair.7 As
you adjust the resonance potentiometer, the gain of this circuit increases, which causes
the resonance.
Testing
Initially, we tested this circuit by providing a 1 Hz signal to the control voltage
input. We adjusted the CV span (R40, this allows a certain amount of the CV into the
circuit) to get some response. We turned resonance all the way down so there’s no
interference. We attached a speaker to the VCF output. There was a slight thump as the
CV input bled through to the output. We adjusted the CV reject (R37) to minimize this
noise. Then we turned the resonance up. We adjusted the value of R41 until the
resonance was controllable even at the maximum value. We experimented with adjusting
the initial frequency potentiometer and got a good range from low frequencies to high
frequencies. After this we fed various signals into the ALL IN input and experimented
with different levels of filtering and resonance until we got a response that we liked. In
7
http://en.wikipedia.org/wiki/Sziklai_pair
Team SYNTH
FINAL DOCUMENTATION
34
fact, we liked the resonance so much that we decided to figure out how to make a lowfrequency oscillator to feed into the CV in.
Unfortunately, this success was all in the breadboard phase. When we transferred
to the solderable protoboard we ran into issues of uncontrollable resonance. Adjusting
the resonance potentiometer merely adjusted the frequency of the resonance rather than
eliminating it at low levels. Despite weeks of testing, we were never able to pinpoint the
problem. In the end, we decided to go with a slightly different configuration to still use
the VCF’s resonance but not its filter.
Team SYNTH
VCF Schematic
FINAL DOCUMENTATION
35
Team SYNTH
FINAL DOCUMENTATION
36
Voltage Controlled Amplifier (VCA)
Function
The VCA is a circuit which takes in an input signal and modifies it according to
the voltage levels at the control voltage input. The signals are transposed together,
amplified and outputted. Various parameters can be set to ensure an optimal signal such
as modifying the control voltage rejection to eliminate “thumping” in the circuit, which
can be verified by connecting an audio jack at the output. Also, extra gain at the input is
eliminated so that the output reflects only the signal inputted as well as the specific
voltage level set by the control voltage input. The final output of the circuit should reflect
the form of the initial inputted signal modified to voltage level of the control voltage
input.
This circuit and tips in troubleshooting the circuit were taken from Ken Stone’s
CGS module website8. There were no major modifications needed for the circuit. The
transistors used in our circuit were the 2N2222 NPN and 2N2906 PNP. These transistors
were chosen because they were easily accessible and deferred project costs on parts. The
op amps used in our circuit were TL084. This change was done to optimize board space.
The TL084 is a quad-operational amplifier chip, which is the same amount of op amps
needed for this circuit. The decoupling capacitor configuration was used for the power
buses minus the ferrite bead. When initially testing this circuit, it was noted that a 15
ohm resistor could be used in place of the ferrite beads. However, when testing the
voltage levels on the resistor, the resistor would begin to burn. Removing the resistor did
8
Ken Stone VCA. http://www.cgs.synth.net/modules/cgs64_vca.html
Team SYNTH
FINAL DOCUMENTATION
37
not alter the voltage levels from what we could tell. The resistor seemed slightly
redundant since, for the power module, the power delivered would not need cleaning up.
Inputs
Our voltage controlled amplifier is a circuit that takes in two inputs, the signal to
be amplified and the voltage level. The first is the input which is being modified and the
other input, the control voltage, inputs the various modifications that are to occur to the
circuit. For our purposes, this circuit is connected to the output of the envelope generator
and the MIDI circuit pitch wave output respectively.
How it works
The circuit consists of various amplifiers that are used to amplify the magnitude
of each signal as well as reflect the desired shape of the signal based on the pitch wave.
The information from the envelope generator relays the duration and sustaining
information of the signal. A summer circuit is used at the input of the control voltage to
ensure that excess gain would be present at the output except that which is specified by
the control voltage input. This prevents the signal input from producing an output at
voltage levels unspecified by the control voltage. To achieve this, the preset used for the
control voltage was set for zero gain at zero volts, i.e. no output when voltage levels are
not inputted.
Testing
To test the circuit, verification was first done at the control voltage input. The
signal inputted was a 1 Hz ramp wave, which produced nothing that was audible. The
amplitude was at 1.00 volts (peak-to-peak). There nothing else attached to the actual
signal input. According to the output, bleed through was present. To eliminate bleed
Team SYNTH
FINAL DOCUMENTATION
38
through, the offset and rejection potentiometers were both adjusted accordingly to reduce
this.
Next, the signal was moved to the input of the circuit to test the control voltage
presets. This adjustment varies the voltage present at the output of the circuit which in
turn modified the gain. For this particular circuit, we wanted zero gain at the output.
This was desired so that any output produced by the voltage controlled amplifier would
directly correlate to the signal being input not a voltage value entered by the preset.
For a final verification check, the signal was moved to the signal input of the circuit and
changed to a frequency in the audible range, 451 Hz. The amplitude was kept the same.
A 100 K ohm potentiometer was attached to the control voltage input to act as an optional
initial gain. Turning this potentiometer was, in essence, mimicking the output pitch wave
information outputted by the MIDI circuit. The outer leads of the potentiometer were
attached to ground and positive 15 volts.
Team SYNTH
FINAL DOCUMENTATION
39
Oscilloscope Readings
The waveform to the left shows bleed through present on the circuit. The waveform
to the right show bleed through eliminated.
The waveform of the output prior to altering the preset is to the right. The
waveform of the circuit with zero gain as the preset and no inputs at the control
voltage input is to the left.
Team SYNTH
FINAL DOCUMENTATION
40
These demonstrate the controlled amplification of the signal. The waveform to the
left demonstrates is when the control voltage input is set to its maximum, i.e. at 15
volts. The wavefore to the right is the ouput of the circuit when the control voltage
is set to approximately half of the maximum voltage, 7.5 volts. This was verified
using the voltmeter to measure the output of the control voltage.
Voltage Controlled Amplifier Schematic
Team SYNTH
FINAL DOCUMENTATION
41
Ring Modulator
Function
The Ring Modulator is relatively simple circuit that takes in two different signals
(Carrier and Modulation), amplifies them through various operational amplifier circuits
and multiplies their results together and then amplifies the signal once more. The amount
of the signal that is multiplied is controlled by the carrier, modulation and the
potentiometers connected to the non inverting inputs of the multiplier chip.
Inputs
The input at the carrier is signal which indicates the oscillation or frequency by
which the final output is to be modified by. The carrier signal generated for this circuited
is the output of the VCF, a signal generated either by the Low Frequency Oscillator
(LFO) or by user input.
Outputs
The output of the ring modulator is the final synthesizer output.
How it works
The inverted inputs of the op amps used in the AD633 chip are the results of the
respective RC filter at the inputs and the voltage follower circuit that follows. The non
inverting inputs of the AD633 are the voltage levels that arise from a voltage divider
created by the 270 K and 1K ohm resistor. This is the reference voltage used in the
comparator op amp inside the multiplier chip. This voltage is influenced by the voltage
divider generated by adjusting the respective 100 K potentiometer.
Outputs of the X op amp and Y op amp are then multiplied together and
multiplied by a gain factor of 1/10. This result is then summed with the Z term. Since Z
Team SYNTH
FINAL DOCUMENTATION
42
goes to ground in our circuit, this value is directly inputted into another op amp in the
AD633, creating a voltage follower.
The chip shown in the circuit diagram differs from the chip used in our circuit.
IC2 on the above circuit diagram is not the chip used (AD632), but is part of the same
family. The chip used in the modulator on the project is the AD633. AD633 is very close
to AD632 except that the AD633 has eight pins (four on each side) and the labeling is
different for the final output of the chip (Q instead of W). Accordingly, the ground, the
op amp inputs, and voltage supplies are on different pins. The logic that occurs in the
AD632 is identical to the AD633. This chip is essentially acting a place holder for the
AD632. The AD632 connections correspond to the AD633 according to the following:
1(AD633) to 6(AD632), 2 to 7, 3 to1, 4 to 10, 5 to 5, 6 to 3, 7 to 4, and 8 to 2.
The final product of the AD633 is a signal with a frequency value and overall
amplitude that varies from either of the one inputs. This output is then connected to a 10
k ohm potentiometer with that other end of the potentiometer connected to a differential
amplifier. The voltage created by adjusting the potentiometer then enters into another
differential amplifier circuit before outputting the final product.
Testing
Testing for this circuit was done by inputting two signals of varying frequencies
and wave forms into the carrier and modulation inputs. Results of this can be seen in the
Oscilloscope section below.
Team SYNTH
FINAL DOCUMENTATION
43
Oscilloscope Readings
The waveforms below depict the output produced when the low frequency oscillator
and voltage controlled oscillator are used as inputs. The ring modulator output is
channel 4. The form to the left shows a triangle wave while the waveform to the
right depicts a sawtooth wave.
Team SYNTH
FINAL DOCUMENTATION
The waveform on the right shows the output as a ramp waveform, while the
waveform on the left demonstrates a modulated pulse wave.
Ring Modulator Schematic
44
Team SYNTH
FINAL DOCUMENTATION
45
Power Module
Function
This module interfaces all of the subsystems of the project by providing the
various voltage needs and grounds necessary for circuit operation. One of the features of
this particular module is the ability afforded to the user to modify specific elements if
desired or to connect the filter, oscillator and amplifier circuits in a certain manner that
would produce different sounds. To that end, a plug was installed on the power module
board that allows another means of disconnecting the circuit board from the other two,
making board analysis or modifications more easily accessible and possible.
Inspiration for this module comes from Ken Stone CGS power module circuit9 as
well as the testing circuits presented in the data sheets of the regulators. There were
design issues initially as to whether we would uses a wall plug or some other circuit that
would generate negative voltages. There was another power circuit considered prior to
this that did not use a wall plug with the transformer. This circuit was not chosen due to
its configuration. While it delivered +/- 15 VDC, there was a charging time required for
the circuit to reach the +/-15 VDC. Modifications to the circuit include the removal of
adjustment potentiometers and the 1.5 K-ohm resistors at the grounds of the regulators.
This adjustment was not deemed as necessary.
Inputs
The only input to this circuit is AC Mains stepped down to a rated voltage of
18VAC.
9
Ken Stone. http://www.cgs.synth.net/modules/cgs66_psu.html
Team SYNTH
FINAL DOCUMENTATION
46
Outputs
This circuit outputs +/- 15, +/-12, 9, and 5 VDC.
How it works
The power module receives its power from AC mains via a 120/18 VAC wall
plug. It uses 2220uF capacitors rated at 35 V and two 100 nF capacitors connected at the
common nodes of a bride rectifier circuit. The bridge rectifier circuit consists of four
IN4002 diodes. Using the bridge rectifier, the positive and negative cycles of the VAC
wave were separated by the orientation of the diodes and flow of current. The rectified
DC voltages are then cleaned via the 2200 uF and 100 nF capacitors before entering the
positive and negative voltage regulators to eliminate any remnants of an AC ripple.
The primary voltage supplies on this module are the positive and negative 15
volts. From these supplies, all other voltage are generated via regulators. The only
negative voltage supplies generated are 15 and 12. No circuit in our system uses 9 VDC
for power. This regulator is used as a mediator between the positive 12 VDC and 5 VDC
regulator. It was decided as a precaution that 12 VDC may be too high of a drop for the 5
VDC regulator to pull down.
Testing
It was noted that the voltage stepped down by the wall plug was not at the 18
VAC rating, but much higher, hovering around 24 VAC, which, at first, was thought to
be too high for the regulator. The rating of the transformer was not realized until during a
round of endurance testing where after being plugged in for approximately 2.5 hours, it
was noted that the 15 volt output was continually dropping. It reached values as low as
14.3 volts. This drop of 0.7 volts could not be explained during testing.
Team SYNTH
FINAL DOCUMENTATION
47
Measuring the input voltage lead us to the conclusion that the 24 VDC input may
have been too much for the regulator. The minimum tolerated voltage on the regulator
was around 16 VDC. At this point, the regulator drops below 15 VDC to approximately
14.8 VDC. We tested the voltage regulators on the bread boards at 18 VDC as an upper
limit. For fear of killing the regulator, an additional series resistor was implemented.
Previously and when implementing the power circuit for the Design Review II, the
voltage inputted into the module was closer to +/- 17 volts. We attempted to create an
input voltage closer to the 17 volts.
The desired 15 VDC output was achieved, however the current was greatly
reduced. This was evident not only from the reduction of brightness in the colored LEDS
(red for negative 15 VDC, green for positive 15 VDC) but once the load was attached to
the power circuit (the load at this time was the VCA, VCF and Ring Modulator), the
voltage at the power inputs of the ICs hovered around 12.5 to 13 volts.
After reviewing the datasheets on the regulators, we decided to try plug the
module to mains one more time without an additional resistance On the positive
regulator, this yield an output of 15.089 volts. However, there tended to be fluctuation in
the voltage, giving values between 14.8 and 15.1 volts. This fluctuation, we believe,
should not have much of an affect on the circuit as a whole. The source of this is not yet
known though a potential cause could be the capacitors that are being used at the input of
the voltage as well as the fluctuations in the DC converted voltage from the transformer
which, along the positive terminals, does fluctuate more than at the negative terminals.
The rectified voltage produced was 23.60 VDC and -24.07 VDC. The regulators
produced acceptable voltage values, so this configuration was kept.
Team SYNTH
FINAL DOCUMENTATION
48
The following is a table of the voltage values recorded at the outputs of the
circuit.
Voltage Regulator
ratings(VDC)
Voltage Regulator
output(VDC)
+15 .00
-15.00
+12.00
-12.00
9.00
5.00
+15.09
-15.13
+11.90
-11.99
8.91
4.98
Power Module Schematic
Team SYNTH
FINAL DOCUMENTATION
49
System Integration Testing
Each of our analog synthesizers was modular and designed to work with one
another. We had a general idea of what we wanted our final synthesizer to look like, but
we did experiment with a few different configurations.
Before attempting the Systems Integration Test, we once again verified that all of
the subsystems were working individually. We fixed any problems that may have risen
due to moving them around. We then began to integrate the subsystems in a specific
order so that any problems could be isolated to one or two subsystems.
The first subsystems we combined were the envelope generator and the voltage
controlled amplifier. We used the function generator to create an audible sine wave at the
input of the VCA. We connected the ADSR output of the envelope generator to the
control voltage input of the VCA. We then hooked up a speaker as well as an
oscilloscope lead to the output of the VCA. We verified that the output was behaving as
expected. Next we attached the MIDI module to the VCA and the envelope generator.
We verified that we were getting proper output from the VCA.
Next we moved on to the voltage controlled filter. We had two different systems
integrations tests for this circuit because for some reason it began malfunctioning when
transferred onto the solderable protoboard. The first time (for the second design review),
we attached two unstable oscillators to the input of the VCF and used the potentiometer
inputs of the VCF to verify that we were getting lowpass, bandpass, and highpass
response from it. For the final integration test, we could only get the oscillation feature to
work on the circuit. Thus we provided a low frequency oscillator at the control voltage
Team SYNTH
FINAL DOCUMENTATION
50
input to get some audible response from the circuit. We felt that mixing this on top of the
other output was more valuable than using the ring modulator.
Originally, the output of the VCF was modulated with the input signal from the
VCA. Once the VCF lost some of its functionality, we decided to use the voltage
controlled oscillator with the ring modulator. Once again we verified that both circuits
were working independently and then combined them. We listened to the output of the
circuit to make sure it was working properly.
In our final configuration, we took the output of the ring modulator and directly
mixed it with the resonance output of the VCF. We added a level circuit to the output of
the VCF because it was dominating the VCA output.
Once everything was connected, we played around with all the user inputs. We
tried all the notes on the keyboard to verify they produced a consistent response. We
varied the attack, decay, sustain, release and level parameters of the envelope generator
and saw the full range of responses. We did similar things with the VCO, VCF and LFO.
Team SYNTH
FINAL DOCUMENTATION
51
III. User Manual
Installation Instructions
To install, plug wall plug into a wall outlet and plug any MIDI keyboard into the
MIDI cord provided.
How to control the device
VCO
Triangle
Square
Coarse
Fine
The VCO is a tone combined with the keyboard tone. Adjust the Coarse and Fine knobs
until you get a frequency you desire. Adjust between triangle and square waves to
experiment with different sounds.
Env. Gen.
Attack
Decay
Sustain
Release
Level
Manual Gate
These knobs control the various properties of the volume level of the keyboard audio.
Experiment to get different fade-in, fade-away and sustain effects. Adjust the level to
decrease or increase volume of the keyboard.
Team SYNTH
FINAL DOCUMENTATION
52
LFO
Frequency
Triangle
Short
Square
Long
Adjust the frequency potentiometer to change the beat of the song. Experiment with
changing the wave shape as well as the length to try different background effects.
VCF
Init. Freq.
Modulation
Level
Resonance
This is the background noise controller. Adjust Modulation to increase or decrease the
amount of signal from the LFO. Adjust frequency and resonance to change the response.
Adjust the level to increase or decrease the volume of this system.
Troubleshooting
If you turn up the level under VCF you should get some sound. If you don’t, ensure that
there is an amplified speaker source connected to the audio output on the front panel.
If the keyboard keys aren’t doing anything, try increasing the level of the envelope
generator. Also ensure the keyboard is powered on and properly plugged into the MIDI
cord.
Modification
If you so desire, you can remove the side of the device and detach the power jumper. Do
not do this when the power is plugged in! You can now slide out the device boards and
rearrange as you see fit.
Team SYNTH
FINAL DOCUMENTATION
53
IV. Conclusions
Our main goal for this project was to design and construct a functioning music
synthesizer. The overall construction and design process was tedious and at times very
difficult. The challenges we faced varied greatly, from settling on a design down to
component placements. One of the things we had to learn when faced with such a task as
this is to plan ahead and modify as you go along. Incorporating different methodologies
and technologies that are standard in the music industry into something compact and
relatively cost effective, we feel that we have completed what we feel to be the most
integral portions envisioned for the project.
If we could return to the beginning of the project, there are a few things we would
change. One of the main issues with the execution of our project was the overall circuit
construction. Instead of using professionally made boards, our group constructed the
circuits ourselves, plotting out strategic part placements as well was wiring every
connection. Though labor intensive, this measure allowed the project to remain very
much under budget and also allowed for design changes as needed without requiring a
new board. Unfortunately, the implementation of the boards as well as overall trouble
shooting became a daunting task. Meticulous planning and attention cannot overcome
human error. To that end, we would most likely try to buy boards. They would be
relatively small and modular so the user would still be able to vary the overall circuit
inputs if he so desired. The unfortunate drawback is that we definitely would have gone
over budget.
Another problem that occurred was developing the correct code for asynchronous
reception of for the MIDI circuit. The current version works to a degree; for our
Team SYNTH
FINAL DOCUMENTATION
54
purposes it sufficed. However, we would desire to further research and refine this
reception.
Overall, while we did not fully realize the concepts envisioned, the core of the
project was a success. We put into practice various aspects of electrical engineering as
well as utilized our problem solving skills to adeptly answer a large portion of the
questions that arose during this project. While our main focus was hardware and general
circuit analysis, we implemented software/hardware interfacing that added much more
value to the overall project. This was a frustrating, but rewarding experience.
Team SYNTH
FINAL DOCUMENTATION
V. Appendices
-Datasheets of major components used
AD633 Multiplier
http://www.analog.com/UploadedFiles/Data_Sheets/AD633.pdf
6N137 Optoisolator
http://pdf1.alldatasheet.com/datasheetpdf/view/112239/FAIRCHILD/6N137.html
PIC18LF4620 Microcontroller
http://pdf1.alldatasheet.com/datasheetpdf/view/115986/MICROCHIP/PIC18LF4620.html
All of the following will be made available via the Team SYNTH website
(http://seniordesign.ee.nd.edu/2007/Design%20Teams/Synth/ ) and/or Twiki.
- Meeting Documentation
- Datasheets of parts used
- Schedule
- Front Panel
55