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University of Leicester
PLUME
Ref: PLM-PAY-SampleHoldTesting2-039-1
Date:06/02/2010
Sample-Hold Testing 2
N. Brewster
Date
Updated Reference Number
Change
06/02/2010
PLM-PAY-SampleHoldTesting2-039-1
First version issued
Previous tests carried out determined that the main problem was the use of the breadboard.
The connection along the rails did not continue all the way down the length of the board,
instead stopping half way. This meant that the amps were not getting the ±5V supply that
they required for operation. In order to fix this, a piece of wire was simply used to connect
the top half to the bottom half of the board. Once this had been done, a test circuit that had
been in use (simply to determine whether the LF398 was in proper working order) was
removed after it was found to be functioning properly, and the full circuit reassembled on the
board. Once this had been done, and checked over, testing began.
A signal generator was being used with an output voltage varying between approximately 0V
and 1.3V. The output of the circuit was being analysed by both a voltmeter and an
oscilloscope into which the input was also connected for comparison.
Upon first inspection it appeared that the circuit was not functioning properly, as the voltage
out (without the input connected) was -2.35V. This was expected to be zero, since there
was no signal in, so the circuit should have effectively been dormant.
The input was then connected to the signal generator. The output voltage, as a result,
began varying between -2.43V and -2.30V. This also seemed to suggest that the circuit was
not working. When the frequency of the signal was increased, however, the voltage out
stayed at the upper bound of the two previous voltages, -2.30V. The voltage out compared
to the voltage in on the oscilloscope appeared to be behaving as expected, however, as the
output was not decreasing in time with the input, suggesting the capacitor was holding the
charge to an extent. It was deduced here that perhaps the circuit was functioning properly,
only with an incorrect output voltage range.
It was decided that the voltage of the comparators should be tested. Upon doing so, it was
seen that there was no change, the voltage varied with the same relation to the input as
before. The voltage across the capacitor was also measured, with a value of 0V obtained,
without any change.
Pin 8 of the LF398 (logic trigger) was then disconnected from the comparators, and instead
connected straight to the 5V input rail so that the circuit should be always sampling. This
showed a slight variance in output voltage, between -0.22V and -0.27V. Upon increasing
University of Leicester
PLUME
Ref: PLM-PAY-SampleHoldTesting2-039-1
Date:06/02/2010
frequency, it was seen that there was no variance in the voltage, it instead remained at the
higher of the two, -0.22V similar to the previous behaviour.
From this it was agreed that the circuit was believed to be functioning properly, to an extent,
however not fully operational. The circuit was sampling the voltages, however the output
was not in the expected range (should be equivalent to the upper limit of the equivalent
voltage as the hold capacitor stores the signal). More investigation is required to determine
the problem and further improve the circuit towards reaching full functionality.