Active Receive Mixer LF to 500 MHz AD8342
... The open-collector differential outputs provide excellent balance and can be used with a differential filter or IF amplifier, such as the AD8369 or AD8351. These outputs can also be converted to a single-ended signal through the use of a matching network or a transformer (balun). When centered on th ...
... The open-collector differential outputs provide excellent balance and can be used with a differential filter or IF amplifier, such as the AD8369 or AD8351. These outputs can also be converted to a single-ended signal through the use of a matching network or a transformer (balun). When centered on th ...
Manual - DATAQ Instruments
... The data acquisition device you have purchased and are about to use contains input channels that are NOT ISOLATED (all channels on DI-72x products are not isolated; only the expansion channels of DI-730 instruments are not isolated). This means that it is susceptible to common mode voltages that cou ...
... The data acquisition device you have purchased and are about to use contains input channels that are NOT ISOLATED (all channels on DI-72x products are not isolated; only the expansion channels of DI-730 instruments are not isolated). This means that it is susceptible to common mode voltages that cou ...
LM98640QML Dual Channel, 14-Bit, 40 MSPS
... Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the Electrical Characteristics. The ensur ...
... Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings indicate conditions for which the device is functional, but do not ensure specific performance limits. For ensured specifications and test conditions, see the Electrical Characteristics. The ensur ...
2.5 V to 5.5 V, 500 μA, 2-Wire Interface AD5305/AD5315/AD5325
... Their on-chip output amplifiers allow rail-to-rail output swing with a slew rate of 0.7 V/μs. A 2-wire serial interface that operates at clock rates up to 400 kHz is used. This interface is SMBus compatible at VDD < 3.6 V. Multiple devices can be placed on the same bus. The references for the four D ...
... Their on-chip output amplifiers allow rail-to-rail output swing with a slew rate of 0.7 V/μs. A 2-wire serial interface that operates at clock rates up to 400 kHz is used. This interface is SMBus compatible at VDD < 3.6 V. Multiple devices can be placed on the same bus. The references for the four D ...
AD8318 1 MHz to 8 GHz, 70 dB Logarithmic Detector/Controller
... using the INHI input. These parameters are very stable against supply and temperature variations. The AD8318 is fabricated on a SiGe bipolar IC process and is available in a 4 mm × 4 mm, 16-lead LFCSP for the operating temperature range of –40oC to +85oC. ...
... using the INHI input. These parameters are very stable against supply and temperature variations. The AD8318 is fabricated on a SiGe bipolar IC process and is available in a 4 mm × 4 mm, 16-lead LFCSP for the operating temperature range of –40oC to +85oC. ...
BU97930MUV
... This device is controlled by a 3-wire signal (CSB, SCL, and SD). First, Interface counter is initialized with CSB=“H". Setting CSB=”L”, enables SD and SCL inputs. The protocol of 3-SPI transfer is as follows. Each command starts with Command or Data judgment bit (D/C) as MSB data, followed by data D ...
... This device is controlled by a 3-wire signal (CSB, SCL, and SD). First, Interface counter is initialized with CSB=“H". Setting CSB=”L”, enables SD and SCL inputs. The protocol of 3-SPI transfer is as follows. Each command starts with Command or Data judgment bit (D/C) as MSB data, followed by data D ...
Blancett K-Factor Scaler Elbow Style Frequency Divider
... An example might be a K-Factor of 1000 (pulses per gallon). This means that if you were counting pulses, when the count total reached 1000, you would have accumulated 1 gallon of liquid. Using the same reasoning, each individual pulse represents an accumulation of 1/1000 of a gallon. This relationsh ...
... An example might be a K-Factor of 1000 (pulses per gallon). This means that if you were counting pulses, when the count total reached 1000, you would have accumulated 1 gallon of liquid. Using the same reasoning, each individual pulse represents an accumulation of 1/1000 of a gallon. This relationsh ...
Qauadruple 2-Input Positive-AND Gates (Rev. C)
... B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators ...
... B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators ...
AD6645-MIL 数据手册DataSheet下载
... Pin compatible to AD6644 Twos complement digital output format 3.3 V CMOS compatible Data-ready for output latching ...
... Pin compatible to AD6644 Twos complement digital output format 3.3 V CMOS compatible Data-ready for output latching ...
DS3231M ±5ppm, I C Real-Time Clock 2
... All voltages are referenced to ground. The parameter tOSF is the period of time the oscillator must be stopped for the OSF flag to be set. Includes the temperature conversion current (averaged). This delay applies only if the oscillator is enabled. If the EOSC bit is 1, tREC is bypassed and RST imm ...
... All voltages are referenced to ground. The parameter tOSF is the period of time the oscillator must be stopped for the OSF flag to be set. Includes the temperature conversion current (averaged). This delay applies only if the oscillator is enabled. If the EOSC bit is 1, tREC is bypassed and RST imm ...
AD7985 数据手册DataSheet下载
... Chain mode is selected if SDI is low during the CNV rising edge. In chain mode, SDI is used as a data input to daisy-chain the conversion results of two or more ADCs onto a single SDO line. The digital data level on SDI is output on SDO with a delay of 16 SCK cycles. CS mode is selected if SDI is hi ...
... Chain mode is selected if SDI is low during the CNV rising edge. In chain mode, SDI is used as a data input to daisy-chain the conversion results of two or more ADCs onto a single SDO line. The digital data level on SDI is output on SDO with a delay of 16 SCK cycles. CS mode is selected if SDI is hi ...
MAX9742 Single-/Dual-Supply, Stereo 16W, Class D Amplifier with Differential Inputs General Description
... The MAX9742 stereo Class D audio power amplifier delivers up to 2 x 16W into 4Ω loads. The MAX9742 features high-power efficiency (92% with 8Ω loads), eliminating the need for a bulky heatsink and conserving power. The MAX9742 operates from a 20V to 40V single supply or a ±10V to ±20V dual supply. F ...
... The MAX9742 stereo Class D audio power amplifier delivers up to 2 x 16W into 4Ω loads. The MAX9742 features high-power efficiency (92% with 8Ω loads), eliminating the need for a bulky heatsink and conserving power. The MAX9742 operates from a 20V to 40V single supply or a ±10V to ±20V dual supply. F ...
TPS70202 数据资料 dataSheet 下载
... over the full range of output current and full range of temperature). This LDO family also features a sleep mode; applying a high signal to EN1 or EN2 (enable) shuts down regulator 1 or regulator 2, respectively. When a high signal is applied to both EN1 and EN2, both regulators enter sleep mode, th ...
... over the full range of output current and full range of temperature). This LDO family also features a sleep mode; applying a high signal to EN1 or EN2 (enable) shuts down regulator 1 or regulator 2, respectively. When a high signal is applied to both EN1 and EN2, both regulators enter sleep mode, th ...
Quad Low Noise, Low Cost Variable Gain Amplifier AD8335
... ADCs with 1 V p-p or 2 V p-p full-scale (FS) inputs. Channel 1 and Channel 2 are enabled through the EN12 pin and Channel 3 and Channel 4 are enabled through the EN34 pin. For VGA only applications, the PrAs can be powered down, significantly reducing power consumption. The AD8335 is available in a ...
... ADCs with 1 V p-p or 2 V p-p full-scale (FS) inputs. Channel 1 and Channel 2 are enabled through the EN12 pin and Channel 3 and Channel 4 are enabled through the EN34 pin. For VGA only applications, the PrAs can be powered down, significantly reducing power consumption. The AD8335 is available in a ...
MC33291 - NXP Semiconductors
... operational somewhat below this VPWR range, but RDS(ON) will increase, causing power dissipation to increase. Outputs will reestablish their instructed state following a VPWR interruption as long as VDD remains non-interrupted. ...
... operational somewhat below this VPWR range, but RDS(ON) will increase, causing power dissipation to increase. Outputs will reestablish their instructed state following a VPWR interruption as long as VDD remains non-interrupted. ...
AN67 - Linear Technology Magazine Circuit Collection, Volume III
... with multiplexed inputs. Without autoranging only two reference values are used: one to set the full-scale magnitude and another to set the zero scale magnitude. Since it is common to have input signals with different zero scale and full-scale magnitude requirements, fixed reference voltages present ...
... with multiplexed inputs. Without autoranging only two reference values are used: one to set the full-scale magnitude and another to set the zero scale magnitude. Since it is common to have input signals with different zero scale and full-scale magnitude requirements, fixed reference voltages present ...
8-Bit, 100 MSPS, CommsDAC(TM
... The THS5641A is an 8-bit resolution digital-to-analog converter (DAC) optimized for video applications and digital data transmission in wired and wireless communication systems. The 8-bit DAC is a member of the CommsDAC series of high-speed, low-power CMOS digital-to-analog converters. The CommsDAC ...
... The THS5641A is an 8-bit resolution digital-to-analog converter (DAC) optimized for video applications and digital data transmission in wired and wireless communication systems. The 8-bit DAC is a member of the CommsDAC series of high-speed, low-power CMOS digital-to-analog converters. The CommsDAC ...
MAX1480A/B/C/MAX1490A/B Complete, Isolated RS-485/RS-422 Data Interface _________________General Description
... error-free data transmission at data rates up to 250kbps. The MAX1480A/MAX1490A driver slew rate is not limited, allowing transmission rates up to 2.5Mbps. The MAX1480A/B/C are designed for half-duplex communication, while the MAX1490A/B feature full-duplex communication. Drivers are short-circuit c ...
... error-free data transmission at data rates up to 250kbps. The MAX1480A/MAX1490A driver slew rate is not limited, allowing transmission rates up to 2.5Mbps. The MAX1480A/B/C are designed for half-duplex communication, while the MAX1490A/B feature full-duplex communication. Drivers are short-circuit c ...
MAX3380E/MAX3381E +2.35V to +5.5V, 1µA, 2Tx/2Rx RS-232 Transceivers General Description
... +3.7V, the RS-232 outputs are at ±5.5V, which is compliant with the RS-232 standard. As the supply voltage drops below the +3.1V set point, the RS-232 outputs change to ±3.7V, which is compatible with the RS-232 standard. The outputs will remain at the compatible levels until the supply voltage rise ...
... +3.7V, the RS-232 outputs are at ±5.5V, which is compliant with the RS-232 standard. As the supply voltage drops below the +3.1V set point, the RS-232 outputs change to ±3.7V, which is compatible with the RS-232 standard. The outputs will remain at the compatible levels until the supply voltage rise ...
Performance Verification of Low Noise, Low Dropout Regulators
... input (e.g. base, gate). Since drive is usually derived directly from VIN, this is difficult. Practical circuits must either generate the overdrive or obtain it elsewhere. Without voltage overdrive, the saturation loss is set by VBE in the bipolar case and channel on-resistance for MOS. MOS channel ...
... input (e.g. base, gate). Since drive is usually derived directly from VIN, this is difficult. Practical circuits must either generate the overdrive or obtain it elsewhere. Without voltage overdrive, the saturation loss is set by VBE in the bipolar case and channel on-resistance for MOS. MOS channel ...
Flip-flop (electronics)
In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems.Flip-flops and latches are used as data storage elements. A flip-flop stores a single bit (binary digit) of data; one of its two states represents a ""one"" and the other represents a ""zero"". Such data storage can be used for storage of state, and such a circuit is described as sequential logic. When used in a finite-state machine, the output and next state depend not only on its current input, but also on its current state (and hence, previous inputs). It can also be used for counting of pulses, and for synchronizing variably-timed input signals to some reference timing signal.Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered). Although the term flip-flop has historically referred generically to both simple and clocked circuits, in modern usage it is common to reserve the term flip-flop exclusively for discussing clocked circuits; the simple ones are commonly called latches.Using this terminology, a latch is level-sensitive, whereas a flip-flop is edge-sensitive. That is, when a latch is enabled it becomes transparent, while a flip flop's output only changes on a single type (positive going or negative going) of clock edge.