SP3239E 数据资料DataSheet下载
... convert TTL or CMOS logic levels to 5.0V EIA/ TIA-232 levels with an inverted sense relative to the input logic levels. Typically, the RS-232 output voltage swing is +5.4V with no load and +5V minimum fully loaded. The driver outputs are protected against infinite short-circuits to ground without de ...
... convert TTL or CMOS logic levels to 5.0V EIA/ TIA-232 levels with an inverted sense relative to the input logic levels. Typically, the RS-232 output voltage swing is +5.4V with no load and +5V minimum fully loaded. The driver outputs are protected against infinite short-circuits to ground without de ...
TAS5152 数据资料 dataSheet 下载
... A low-cost, high-fidelity audio system can be built using a TI chipset, comprised of a modulator (e.g., TAS5508) and the TAS5152. This system only requires a simple passive LC demodulation filter to deliver high-quality, high-efficiency audio amplification with proven EMI compliance. This device req ...
... A low-cost, high-fidelity audio system can be built using a TI chipset, comprised of a modulator (e.g., TAS5508) and the TAS5152. This system only requires a simple passive LC demodulation filter to deliver high-quality, high-efficiency audio amplification with proven EMI compliance. This device req ...
ADA4932-1 数据手册DataSheet 下载
... between the supply pins (VS) times the quiescent current (IS). The power dissipated due to the load drive depends upon the particular application. The power due to load drive is calculated by multiplying the load current by the associated voltage drop across the device. RMS voltages and currents mus ...
... between the supply pins (VS) times the quiescent current (IS). The power dissipated due to the load drive depends upon the particular application. The power due to load drive is calculated by multiplying the load current by the associated voltage drop across the device. RMS voltages and currents mus ...
汉王PDF转换RTF文档
... its programmed voltage (e.g., 19 V on the output of a 13 V proAfter a short circuit condition occurs, the host controller should grammed voltage). The output with the highest voltage will effecperiodically re-enable the A8292 to check if the short circuit has tively turn off the other outputs. As so ...
... its programmed voltage (e.g., 19 V on the output of a 13 V proAfter a short circuit condition occurs, the host controller should grammed voltage). The output with the highest voltage will effecperiodically re-enable the A8292 to check if the short circuit has tively turn off the other outputs. As so ...
MAX9321B Differential PECL/ECL/LVPECL/LVECL Receiver/Driver General Description
... the on-chip reference voltage, VBB, to an input as a reference. For example, the differential input is converted to a noninverting, single-ended input by connecting VBB to D and connecting the single-ended input to D. An inverting input is obtained by connecting VBB to D and connecting the single-en ...
... the on-chip reference voltage, VBB, to an input as a reference. For example, the differential input is converted to a noninverting, single-ended input by connecting VBB to D and connecting the single-ended input to D. An inverting input is obtained by connecting VBB to D and connecting the single-en ...
Design Considerations for Avoiding Timing Errors during High
... 1. If the routing distance between the ADC output and FPGA input pins is more, then care must be taken to maintain controlled differential impedance near 100 Ω. The physical length of each trace between the LVDS pairs of ADC outputs and the FPGA inputs should be matched within 5 mm of each other for ...
... 1. If the routing distance between the ADC output and FPGA input pins is more, then care must be taken to maintain controlled differential impedance near 100 Ω. The physical length of each trace between the LVDS pairs of ADC outputs and the FPGA inputs should be matched within 5 mm of each other for ...
ON REDUCTION OF SUBSTRATE NOISE IN MIXED-SIGNAL CIRCUITS Erik Backenius
... handheld computers etc., both analog and digital circuits are required. If several integrated circuits (ICs) are used in a system, a large amount of the power is consumed by the communication between the ICs. Furthermore, the communication between ICs is slow compared with on-chip communication. The ...
... handheld computers etc., both analog and digital circuits are required. If several integrated circuits (ICs) are used in a system, a large amount of the power is consumed by the communication between the ICs. Furthermore, the communication between ICs is slow compared with on-chip communication. The ...
Unit iii – ic 741 OP-AMP - AJAY KUMAR GAUTAM
... For the dc analysis of an op-amp circuit, the Input terminals are grounded. This should result in zero dc voltage at the output. However, because the op amp has very large gain, the output voltage is close to either +VCC or –VEE. To overcome this problem In the dc analysis, it will be assumed ...
... For the dc analysis of an op-amp circuit, the Input terminals are grounded. This should result in zero dc voltage at the output. However, because the op amp has very large gain, the output voltage is close to either +VCC or –VEE. To overcome this problem In the dc analysis, it will be assumed ...
Catalog - Rolls Corporation
... - The CPB7 is a smart phone breakout box. It allows you to connect various inputs and outputs to your smart phone. - The CPB7 is completely passive, requires no power. - Smart Phone cable included. ...
... - The CPB7 is a smart phone breakout box. It allows you to connect various inputs and outputs to your smart phone. - The CPB7 is completely passive, requires no power. - Smart Phone cable included. ...
UNIT-V DAC: Principles – weighted-resistor network, R
... Basic integrator of a Dual-slope Integrating ADC. The comparator, the timer, and the controller are not shown. The basic integrating ADC circuit consists of an integrator, a switch to select between the voltage to be measured and the reference voltage, a timer that determines how long to integrate ...
... Basic integrator of a Dual-slope Integrating ADC. The comparator, the timer, and the controller are not shown. The basic integrating ADC circuit consists of an integrator, a switch to select between the voltage to be measured and the reference voltage, a timer that determines how long to integrate ...
Data Sheet 85098-0003 -- Clock System
... The GE Model 24CC10 Clock Controller is a compact, microprocessor-controlled unit that enables a GE 24D20 Two-Inch Digital Secondary Clock or 24D40A Four-Inch Digital Secondary Clock to be used for count up timing, count down timing, score keeping and code blue timing. The digital clock serves as th ...
... The GE Model 24CC10 Clock Controller is a compact, microprocessor-controlled unit that enables a GE 24D20 Two-Inch Digital Secondary Clock or 24D40A Four-Inch Digital Secondary Clock to be used for count up timing, count down timing, score keeping and code blue timing. The digital clock serves as th ...
Evaluate: MAX1316–MAX1327 MAX1320 Evaluation Kit/Evaluation System General Description Features
... be connected to AGND or left floating. Note that if the inputs are buffered and exceed ±5V (i.e., when using the MAX1324–MAX1327 that support inputs up to ±10V), replace the MAX4351 buffers (U2–U5) with buffers capable of a ±10V voltage range. Jumpers on the EV kit allow evaluation of all the parts ...
... be connected to AGND or left floating. Note that if the inputs are buffered and exceed ±5V (i.e., when using the MAX1324–MAX1327 that support inputs up to ±10V), replace the MAX4351 buffers (U2–U5) with buffers capable of a ±10V voltage range. Jumpers on the EV kit allow evaluation of all the parts ...
lvc characterization information
... A desirable objective is for systems to operate at faster speeds that allow less time for performing operations. For example, consider the impact a continually increasing operating frequency has on accessing memory or on performing arithmetic computations; the faster the system runs, the less time i ...
... A desirable objective is for systems to operate at faster speeds that allow less time for performing operations. For example, consider the impact a continually increasing operating frequency has on accessing memory or on performing arithmetic computations; the faster the system runs, the less time i ...
PCA9624 1. General description 8-bit Fm+ I
... 256-step group brightness control allows general dimming (using a 190 Hz PWM signal) from fully off to maximum brightness (default) 256-step group blinking with frequency programmable from 24 Hz to 10.73 s and duty cycle from 0 % to 99.6 % Eight open-drain outputs can sink between 0 mA to 100 ...
... 256-step group brightness control allows general dimming (using a 190 Hz PWM signal) from fully off to maximum brightness (default) 256-step group blinking with frequency programmable from 24 Hz to 10.73 s and duty cycle from 0 % to 99.6 % Eight open-drain outputs can sink between 0 mA to 100 ...
PDF
... along with the MASTER/PHASE switch state to modify the proper register. A brute force approach is used to update the delay register, namely, the encoder value is compared to a previous value and the appropriate action is taken (i.e., increase or decrease the register). The code assumes that the enco ...
... along with the MASTER/PHASE switch state to modify the proper register. A brute force approach is used to update the delay register, namely, the encoder value is compared to a previous value and the appropriate action is taken (i.e., increase or decrease the register). The code assumes that the enco ...
P83862
... Typically used to trigger remote alerts or other reporting appliances. Form “C” contacts rated 28VDC at 1 AMP. Typically used to report AC or BAT Fail. An open circuit across this pair of terminals will cause IN1 and IN2 to simultaneously signal a trouble condition to the FACP. This output is capabl ...
... Typically used to trigger remote alerts or other reporting appliances. Form “C” contacts rated 28VDC at 1 AMP. Typically used to report AC or BAT Fail. An open circuit across this pair of terminals will cause IN1 and IN2 to simultaneously signal a trouble condition to the FACP. This output is capabl ...
CD4538BC Dual Precision Monostable
... (while inputs B and CD are held to VDD) a valid trigger is recognized, which turns on comparator C1 and N-Channel transistor N1(1). At the same time the output latch is set. With transistor N1 on, the capacitor CX rapidly discharges toward VSS until VREF1 is reached. At this point the output of comp ...
... (while inputs B and CD are held to VDD) a valid trigger is recognized, which turns on comparator C1 and N-Channel transistor N1(1). At the same time the output latch is set. With transistor N1 on, the capacitor CX rapidly discharges toward VSS until VREF1 is reached. At this point the output of comp ...
AD7986 数据手册DataSheet下载
... Quiet Time During Acquisition from Last SCK Falling Edge to CNV Rising Edge SCK Period (CS Mode) SCK Period (Chain Mode) SCK Low Time SCK High Time SCK Falling Edge to Data Remains Valid SCK Falling Edge to Data Valid Delay CNV or SDI Low to SDO D17 MSB Valid (CS Mode) CNV or SDI High or Last SCK Fa ...
... Quiet Time During Acquisition from Last SCK Falling Edge to CNV Rising Edge SCK Period (CS Mode) SCK Period (Chain Mode) SCK Low Time SCK High Time SCK Falling Edge to Data Remains Valid SCK Falling Edge to Data Valid Delay CNV or SDI Low to SDO D17 MSB Valid (CS Mode) CNV or SDI High or Last SCK Fa ...
Datasheet
... Recommended operating conditions; voltages are referenced to GND (ground = 0 V). Tamb = −40 °C to +85 °C ...
... Recommended operating conditions; voltages are referenced to GND (ground = 0 V). Tamb = −40 °C to +85 °C ...
MAX5915/MAX5915A/MAX5916/MAX5916A Dual PCI 2.2 Hot-Swap Controllers General Description Features
... devices provide intelligent selective thermal shutdown control that shuts down the channel with an overcurrent fault. All devices include internal power MOSFETs for the +12V, -12V, and +3.3V auxiliary outputs. These devices use internal charge pumps to activate the gates of the internal FETs control ...
... devices provide intelligent selective thermal shutdown control that shuts down the channel with an overcurrent fault. All devices include internal power MOSFETs for the +12V, -12V, and +3.3V auxiliary outputs. These devices use internal charge pumps to activate the gates of the internal FETs control ...
MC9S08QA4 Series - Data Sheet
... Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate resistance values for positive (VDD) and negative (VSS) clamp voltages, then use the larger of the two resistance values. 2 All functional non-supply pins are internally ...
... Input must be current limited to the value specified. To determine the value of the required current-limiting resistor, calculate resistance values for positive (VDD) and negative (VSS) clamp voltages, then use the larger of the two resistance values. 2 All functional non-supply pins are internally ...
Flip-flop (electronics)
In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems.Flip-flops and latches are used as data storage elements. A flip-flop stores a single bit (binary digit) of data; one of its two states represents a ""one"" and the other represents a ""zero"". Such data storage can be used for storage of state, and such a circuit is described as sequential logic. When used in a finite-state machine, the output and next state depend not only on its current input, but also on its current state (and hence, previous inputs). It can also be used for counting of pulses, and for synchronizing variably-timed input signals to some reference timing signal.Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered). Although the term flip-flop has historically referred generically to both simple and clocked circuits, in modern usage it is common to reserve the term flip-flop exclusively for discussing clocked circuits; the simple ones are commonly called latches.Using this terminology, a latch is level-sensitive, whereas a flip-flop is edge-sensitive. That is, when a latch is enabled it becomes transparent, while a flip flop's output only changes on a single type (positive going or negative going) of clock edge.