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DS1245W-100+ Datasheet
DS1245W-100+ Datasheet

TECHNICAL DATA
TECHNICAL DATA

... An E8 Rack Extender (Part # P-S20001D-01) may be used to mount the E8 in a 19” rack ...
Digital Electronics
Digital Electronics

DMX-K-DRV-23 Manual Rev 1.35
DMX-K-DRV-23 Manual Rev 1.35

... configured in analog mode, the DIR and AI (PUL-/CW-) signals are used for analog speed control. In analog speed control, the speed of the motor is determined by the analog input value [0 - +5VDC]. The direction of the motor is determined by the differential direction input. After configuring the mot ...
MAX1144/MAX1145 14-Bit ADCs, 150ksps, 3.3V Single Supply General Description Features
MAX1144/MAX1145 14-Bit ADCs, 150ksps, 3.3V Single Supply General Description Features

... MAX1144/MAX1145 have on-demand software calibration. Initiate calibration by writing a control byte with bit M1 = 0 and bit M0 = 1 (Table 1). Select internal or external clock for calibration by setting the INT/EXT bit in the control byte. Calibrate the MAX1144/MAX1145 with the same clock mode used ...
MAX11108 Tiny, 2.1mm x 1.6mm, 3Msps, Low-Power, Serial 12-Bit ADC EVALUATION KIT AVAILABLE
MAX11108 Tiny, 2.1mm x 1.6mm, 3Msps, Low-Power, Serial 12-Bit ADC EVALUATION KIT AVAILABLE

... high-speed, low-power, successive approximation analog-to-digital converter (ADC). This high-performance ADC includes a high-dynamic range sample-and-hold and a high-speed serial interface. This ADC accepts a full-scale input from 0V to the power supply or to the reference voltage. The MAX11108 feat ...
AND8252/D High Efficiency Eight Output, 60 W Set Top Box Power
AND8252/D High Efficiency Eight Output, 60 W Set Top Box Power

... from the collector of Q2 and hysteresis is provided by R25 to avoid jitter at the PF transition point. This circuit will provides approximately 5.0 ms minimum of warning time before any of the power supply outputs drop to 90% of nominal value. ...
Triple Differential Transceivers (Rev. A
Triple Differential Transceivers (Rev. A

... The driver differential outputs and the receiver differential inputs are connected internally to form three differential input/output (I/O) bus ports that are designed to offer minimum loading to the bus whenever the driver is disabled or VCC = 0. These ports feature a wide common-mode voltage range ...
7872A - Data Device Corporation
7872A - Data Device Corporation

... Maxwell Technologies’ 7872A high-speed 14-bit ADC microcircuit features a greater than 100 krad (Si) total dose tolerance; depending upon orbit. The 7872A consists of a track/ hold amplifier, successive-approximation ADC, 3V buried Zener reference and versatile interface logic. It features a selfcon ...
Polarity adaptive RS-485/RS
Polarity adaptive RS-485/RS

... RY485D has the polarity adaptive function, which will automatically match A1 and/or A2 to bus A and/or B to keep the chip polarity is identical with the bus. If A1/A2 connects with bus A, the A1/A2 will be set to the A pin of the chip and also if A1/A2 connects with bus B, the A1/A2 will be set to t ...
7872 Data Sheet 04.14.15 Rev 6.fm
7872 Data Sheet 04.14.15 Rev 6.fm

... depending upon orbit. The 7872 consists of a track/hold amplifier, successive-approximation ADC, 3V buried Zener reference and versatile interface logic. It features a self-contained, laser- trimmed internal clock, so no external clock timing components are required. To achieve the minimum noise pos ...
2002-11-08 NDC Data sheet.pub
2002-11-08 NDC Data sheet.pub

MMGmanual.
MMGmanual.

... The Vactrol based gain cells utilized in the MMG have a moderately fast attack time and a slower decay time, meaning the circuit turns on quickly, but takes a while to shut off, yielding a smooth natural decay to almost any signal processed. The STRIKE Input is a Gate input for striking or plucking ...
report
report

... The comparator can be basically defined as a quantizer where in the quantization noise forms the crux of the ADC design. A quantizer is a device that converts a continuous range of input amplitude levels into a finite set of discrete digital code words. Theoretically an analog-to-digital conversion ...
MAX3040–MAX3045 ±10kV ESD-Protected, Quad 5V RS-485/RS-422 Transmitters General Description
MAX3040–MAX3045 ±10kV ESD-Protected, Quad 5V RS-485/RS-422 Transmitters General Description

... IEC 1000-4-4 Electrical Fast Transient/Burst (EFT/B) is an immunity test for the evaluation of electrical and electronic systems during operating conditions. The test was adapted for evaluation of integrated circuits with power applied. Repetitive fast transients with severe pulsed EMI were applied ...
The Effect of Voltage Fluctuations on the Single Event Transient
The Effect of Voltage Fluctuations on the Single Event Transient

... [3] Mavis, D.G., Eaton, P.H., ”Soft error rate mitigation techniques for modern microcircuits,” Reliability Physics Symposium Proceedings, 2002. Pages: 216-225. 2007 MURI Review ...
CECS470
CECS470

AD8114 数据手册DataSheet 下载
AD8114 数据手册DataSheet 下载

High-Frequency Voltage-to-Frequency Converter
High-Frequency Voltage-to-Frequency Converter

... bypass capacitors and an output pull-up resistor, RPU, are required for this mode of operation. A 0V to 10V input voltage produces a 0Hz to 4MHz output frequency. The internal input resistor, one-shot and integrator capacitors set the full-scale output frequency. The input is applied to the summing ...
Terminal Connections Visual Indicators Models Covered Mounting
Terminal Connections Visual Indicators Models Covered Mounting

Performance Analysis of CMOS OTA
Performance Analysis of CMOS OTA

10-Bit 60 MSPS A/D Converter AD9020
10-Bit 60 MSPS A/D Converter AD9020

DS1846 NV Tri-Potentiometer, Memory, and MicroMonitor FEATURES
DS1846 NV Tri-Potentiometer, Memory, and MicroMonitor FEATURES

... Clock and Data Transitions: The SDA pin is normally pulled high with an external resistor or device. Data on the SDA pin may only change during SCL low time periods. Data changes during SCL high periods indicates a start or stop condition depending on the conditions discussed below. See the timing d ...
AD7654 数据手册DataSheet下载
AD7654 数据手册DataSheet下载

... When SER/PAR is LOW, these outputs are used as Bit 2 and Bit 3 of the parallel port data output bus. When SER/PAR is HIGH, EXT/INT is LOW, and RDC/SDIN is LOW, which is the serial master read after convert mode, these inputs, part of the serial port, are used to slow down if desired the internal ser ...
AD7679 数据手册DataSheet下载
AD7679 数据手册DataSheet下载

... In all modes except MODE = 3, this output is used as Bit 10 of the parallel port data output bus. When MODE = 3 (serial mode), this output, part of the serial port, is used as a serial data output synchronized to SCLK. Conversion results are stored in an on-chip register. The AD7679 provides the con ...
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Flip-flop (electronics)



In electronics, a flip-flop or latch is a circuit that has two stable states and can be used to store state information. A flip-flop is a bistable multivibrator. The circuit can be made to change state by signals applied to one or more control inputs and will have one or two outputs. It is the basic storage element in sequential logic. Flip-flops and latches are a fundamental building block of digital electronics systems used in computers, communications, and many other types of systems.Flip-flops and latches are used as data storage elements. A flip-flop stores a single bit (binary digit) of data; one of its two states represents a ""one"" and the other represents a ""zero"". Such data storage can be used for storage of state, and such a circuit is described as sequential logic. When used in a finite-state machine, the output and next state depend not only on its current input, but also on its current state (and hence, previous inputs). It can also be used for counting of pulses, and for synchronizing variably-timed input signals to some reference timing signal.Flip-flops can be either simple (transparent or opaque) or clocked (synchronous or edge-triggered). Although the term flip-flop has historically referred generically to both simple and clocked circuits, in modern usage it is common to reserve the term flip-flop exclusively for discussing clocked circuits; the simple ones are commonly called latches.Using this terminology, a latch is level-sensitive, whereas a flip-flop is edge-sensitive. That is, when a latch is enabled it becomes transparent, while a flip flop's output only changes on a single type (positive going or negative going) of clock edge.
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