Download Polarity adaptive RS-485/RS

RY485D DATASHEET
Polarity adaptive RS-485/RS-422
Transceivers RY485D
General Description
The RY485D is Reverse Connect Transceivers, high-speed transceiver for RS-485 communication that
contain one driver and one receiver. The device feature fail-safe circuitry, which guarantees a logic-high
receiver output when the receiver inputs are open or shorted. This means that the receiver output will be
logic high even if all transmitters on a terminated bus are disabled. The RY485 feature reduced slew-rate
driver that minimize EMI and reduce reflections caused by improperly terminated cables, allowing
error-free data transmission up to 500kbps. All transmitter outputs and receiver inputs are protected to +/15kV using the Human Body Air Gap Model. The transceiver typically draws 500 micron amper of supply
current when unloaded, or when fully loaded with the driver disabled. All devices have a 1/8-unit-load
receiver input impedance that allows up to 256 transceivers on the bus. The RY485 is intended for
half-duplex communications.
Applications
RS-485D Communications
Level Translators
Transceivers for EMI-Sensitive Applications
Industrial Control Local Area Networks
Energy Meter Networks
Power Inverters
Building Automation Networks
Telecommunications Equipment
PIN Configuration
Figure 1.
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Figure 2. Product Application Schematic Drawing（A&B on the main wire can be interchangeable）
ABSOLUTE MAXIMUM RATINGS
Supply Voltage (VCC) ..........................................................+ 7V
Control Input Voltage (RE, DE)...................-0.3V to (VCC + 0.3V
Driver Input Voltage (DI).............................-0.3V to (VCC + 0.3V)
Driver Output Voltage (A1, A2)...........................……-13V to +13V
Receiver Input Voltage (A1, A2) ...............................-13V to +13V
Receiver Output Voltage (RO)....................-0.3V to (VCC + 0.3V)
Operating Temperature Ranges...........................-40°C to +85°C
Continuous Power Dissipation ........................................…..TBD
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(VCC = +5V ±5%, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V and TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
5
V
DRIVER
Differential Driver
Output (no load)
VOD1
Figure 5
Differential Driver
Output
VOD2
Figure 5, R = 27Ω (RS-485)
ΔVOD
Figure 5, R = 27Ω
0.2
V
VOC
Figure 5, R = 27Ω
3
V
ΔVOC
Figure 5, R = 27Ω
0.2
V
VIH1
DE, DI, RE
Input Low Voltage
VIL1
DE, DI, RE
DI Input
Hysteresis
VHYS
Input Current (A
and B)
IIN1
Change in
Magnitude of
Differential
Output Voltage
(Note 2)
Driver
Common-Mode
Output Voltage
Change In
Magnitude of
Common-Mode
Voltage (Note 2)
Input High
Voltage
Driver
Short-Circuit
Output Current
(Note 4)
1.5
2
V
0.8
100
DE = GND,
VCC = GND
or 5.25V
V
mV
VIN = 12V
125
VIN = -7V
-75
µA
-7V ≤ VOUT ≤ VCC
VOD1
V
-250
0V ≤ VOUT ≤ 12V
0V ≤ VOUT ≤ VCC
250
mA
-50
mV
±25
RECEIVER
Receiver
Differential
Threshold Voltage
VTH
Receiver Input
Hysteresis
ΔVTH
Receiver Output
High Voltage
VOH
IO = -4mA, VID = -50mV
Receiver Output
Low Voltage
VOL
IO = 4mA, VID = -200mV
0.4
V
Three-State
Output Current at
Receiver
IOZR
0.4V ≤ VO ≤ 2.4V
±1
µA
RIN
-7V ≤ VCM ≤ 12V
96
IOSR
0V ≤ VRO ≤ VCC
±7
Receiver Input
Resistance
Receiver Output
Short-Circuit
Current
-7V ≤ VCM ≤ 12V
-200
-125
25
mV
VCC -1.5
V
kΩ
±95
mA
SUPPLY CURRENT
No load, RE
= DI = GND
or VCC
Supply Current
Supply Current in
Shutdown Mode
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ISHDN
DE = VCC
475
1000
DE = GND
420
800
DE = GND, VRE = VCC
40
60
µA
µA
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RY485D DATASHEET
(VCC = +5V ±5%, TA = TMIN to TMAX, unless otherwise noted. Typical values are at VCC = +5V and TA = +25°C.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
tDPLH
Figures 7 and 9, RDIFF = 54Ω, CL1
= CL2 = 100pF
10
30
60
10
30
60
-3
±100
ns
53
75
ns
Driver Input to Output
tDPHL
UNITS
ns
Driver Output Skew
| tDPLH - tDPHL |
tDSKEW
Figures 7 and 9, RDIFF = 54Ω, CL1
= CL2 = 100pF
Driver Rise or Fall Time
tDR, tDF
Figures 7 and 9, RDIFF = 54Ω, CL1
= CL2 = 100pF
Driver Enable to Output
High
tDZH
Figures 8 and 10, CL = 100pF, S2
closed
70
ns
Driver Enable to Output
Low
tDZL
Figures 8 and 10, CL = 100pF, S1
closed
70
ns
Driver Disable Time from
Low
tDLZ
Figures 8 and 10, CL = 15pF, S1
closed
70
ns
Driver Disable Time from
High
tDHZ
Figures 8 and 10, CL = 15pF, S2
closed
70
ns
Receiver Input to Output tRPLH, tRPHL
20
Figures 11 and 13; | VID | ≥ 2.0V;
rise and fall time of VID ≤ 15ns
50
80
ns
| tRPLH - tRPHL |
Differential Receiver
Skew
tRSKD
Figures 11 and 13; | VID | ≥ 2.0V;
rise and fall time of VID ≤ 15ns
3
±30
ns
Receiver Enable to
Output Low
tRZL
Figures 6 and 12, CL = 100pF, S1
closed
20
50
ns
Receiver Enable to
Output High
tRZH
Figures 6 and 12, CL = 100pF, S2
closed
20
50
ns
Receiver Disable Time
from Low
tRLZ
Figures 6 and 12, CL = 100pF, S1
closed
20
50
ns
Receiver Disable Time
from High
tRHZ
Figures 6 and 12, CL = 100pF, S2
closed
20
50
ns
Time to Shutdown
tSHDN
(Note 5)
20
60
ns
50
Driver Enable from
tDZH(SHDN)
Shutdown to Output High
Figures 8 and 10, CL = 15pF, S2
closed
50
ns
Driver Enable from
tDZL(SHDN)
Shutdown to Output Low
Figures 8 and 10, CL = 15pF, S1
closed
50
ns
Receiver Enable from
tRZH(SHDN)
Shutdown to Output High
Figures 6 and 12, CL = 100pF, S2
closed
50
ns
Receiver Enable from
tRZL(SHDN)
Shutdown to Output Low
Figures 6 and 12, CL = 100pF, S1
closed
50
ns
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Test Circuit
Figure 3. Driver DC Test Load
Figure 4. Receiver Enable/Disable Timing Test Load
Figure 5. Driver/Receiver Timing Test
Figure 6. Driver Timing Test
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Figure 7. Receiver Propagation Delays Test Circuit
Figure 8. Driver Propagation Delays
Figure 9. Receiver Propagation Delays
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Figure 10. Driver Enable and Disable Times
Figure 11. Receiver Enable and Disable Times
Figure 12. Typical Half-Duplex RS-485 Network
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RY485D DATASHEET
.Pin Description.
PIN
NAME
1
RO
FUNCTION
Receiver Output. When RE is low and if A - B ≥ -50mV, RO will be high; if A - B ≤
-200mV, RO will be low.
RE
Receiver Output Enable. Drive RE low to enable RO;
RO is high impedance when RE is high. Drive RE high and DE low to enter
low-power shutdown mode.
RE is a hot-swap input (see the Hot-Swap Capability section for more details).
3
DE
Driver Output Enable. Drive DE high to enable driver outputs. These outputs are
high impedance when DE is low.
Drive RE high and DE low to enter low-power shutdown mode.
DE is a hot-swap input (see the Hot-Swap Capability section for more details).
4
DI
Driver Input. With DE high, a low on DI forces non-inverting output low and
inverting output high.
Similarly, a high on DI forces non-inverting output high and inverting output low.
5
GND
6
A1
Bus interface, depending on bus state to decide this Pin to be A or B. A1 and A2 will
set to be A or B respectively. When powered up A1 is default to set to A point.
7
A2
Bus interface, depending on bus state to decide this Pin to be A or B. A1 and A2 will
set to be A or B respectively. When powered up A1 is default to set to B point.
8
Vcc
Positive Supply, VCC = +5V ±5%.
Bypass VCC to GND with a 0.1μF capacitor.
2
Ground
.Function Table.
(Depending on A1 or A2 are judged to A and another Pin is judged to B)
TRAMSMITTING
RE
X
X
0
1
INPUTS
DE
1
1
0
0
OUTPUTS
DI
1
0
X
X
A2/A1
0
1
High-Z
A1/A2
1
0
High-Z
Shutdown
RECEIVING
RE
0
0
0
1
1
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INPUTS
DE
X
X
X
1
0
A1-A2(A2-A1)
-0.05V
-0.2V
Open/shorted
X
X
OUTPUTS
RO
1
0
1
High-Z
Shutdown
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RY485D DATASHEET
.Polarity adaptive.
RY485D has the polarity adaptive function, which will automatically match A1 and/or A2 to bus A and/or B to
keep the chip polarity is identical with the bus. If A1/A2 connects with bus A, the A1/A2 will be
set to the A pin of the chip and also if A1/A2 connects with bus B, the A1/A2 will be set to the B pin of the chip. In
the field application A1 and A2 can connect to bus A and B randomly, without considering the chip polarity.
The principle of Polarity adaptive is as fallows. First we set DE to law voltage to shut the driver. The chip
powers up. The bus A is set to high voltage and the bus B is set to low voltage. This state keeps one second.
RY485D’s bus interface (A1 or A2) connected to bus A will be set to A pin, and the Pin connecting to bus B
will be set to B pin. After the polarity judging, the RY485D can start to operation.
The high voltage of bus A and the low voltage of bus B can realize at least in two ways. One is to use a special
driver circuit to drive bus A to high and bus B to low. Another method is to use pull up resistor to pull bus A
to high voltage and also to use pull down resistor to pull bus B to low voltage. We choose the second method
as the better way.
RY485D’s maximum data rate is 500KHz, and the minimum data rate is 20Hz.
Figure 13. a) A1/A2 connects to bus A/B
b) A1/A2 connects to bus B/A
If RY485D connects to bus as Figure 13 a), setting DE, RE to low voltage. After powering up, A1 is default to be A
pin and A2 is default to be B pin of RY485D. RO is high, after the RY485D internal polarity judgment, RO still
keeps high and to confirm A1 should be the A pin and A2 should be the B pin of RY485D. The polarity of A1 and
A2 are identical with the buses.
If RY485D connects to bus as Figure 13 b), setting DE, RE to low voltage. After powering up, A1 is default to be A
pin and A2 is default to be B pin of RY485D. RO is high, after the RY485D internal polarity judgment circuit
judges A1 should be the B pin and A2 should be the A pin of RY485D. RO turns to high voltage after the
judgment process and the polarities of A1 and A2 are identical with the buses.
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